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| author | Ben Gass <bgass@us.ibm.com> | 2017-12-05 16:23:32 -0600 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2018-06-15 10:19:27 -0400 |
| commit | 785e89f5fcf9f50e8cfb5484c43936f04e709cdf (patch) | |
| tree | 4b9f3538c9366c4b0178298166581d08fa71812c | |
| parent | 904da7128b41d3dcc415058e6689ded497902d45 (diff) | |
| download | talos-hostboot-785e89f5fcf9f50e8cfb5484c43936f04e709cdf.tar.gz talos-hostboot-785e89f5fcf9f50e8cfb5484c43936f04e709cdf.zip | |
Shorten A-link timers for sim. Add polling for A-link training.
Change-Id: Ic55d4ad2e8e11bb07f2e5f67cf8fe907782611fc
Original-Change-Id: Iad63bc098741d328c4ccf90268b3817f4cf67858
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/50536
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/60651
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Disable-CI: Daniel M. Crowell <dcrowell@us.ibm.com>
Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/nest/p9_fab_iovalid.C | 47 |
1 files changed, 32 insertions, 15 deletions
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_fab_iovalid.C b/src/import/chips/p9/procedures/hwp/nest/p9_fab_iovalid.C index 67599e5f7..5e4d3982f 100644 --- a/src/import/chips/p9/procedures/hwp/nest/p9_fab_iovalid.C +++ b/src/import/chips/p9/procedures/hwp/nest/p9_fab_iovalid.C @@ -82,6 +82,10 @@ const uint64_t TL_FRAMER4567_ERR_REG_OFFSET = 0x26; const uint64_t TL_PARSER0123_ERR_REG_OFFSET = 0x27; const uint64_t TL_PARSER4567_ERR_REG_OFFSET = 0x28; +// DL polling constants +const uint32_t DL_MAX_POLL_LOOPS = 100; +const uint32_t DL_POLL_SIM_CYCLES = 10000000; +const uint32_t DL_POLL_HW_DELAY_NS = 1000000; //------------------------------------------------------------------------------ // Function definitions @@ -464,6 +468,7 @@ fapi2::ReturnCode p9_fab_iovalid_link_validate( fapi2::ATTR_LINK_TRAIN_Type l_loc_link_train; bool l_dl_trained = false; bool l_tl_trained = false; + uint32_t l_poll_loops = DL_MAX_POLL_LOOPS; // obtain link endpoints for FFDC FAPI_TRY(p9_fab_iovalid_get_link_endpoints(i_target, @@ -479,23 +484,35 @@ fapi2::ReturnCode p9_fab_iovalid_link_validate( l_loc_link_train), "Error from FAPI_ATTR_GET (ATTR_LINK_TRAIN)"); - // validate DL training state - FAPI_TRY(fapi2::getScom(i_target, i_loc_link_ctl.dl_fir_addr, l_dl_fir_reg), - "Error from getScom (0x%.16llX)", i_loc_link_ctl.dl_fir_addr); - - if (l_loc_link_train == fapi2::ENUM_ATTR_LINK_TRAIN_BOTH) - { - l_dl_trained = l_dl_fir_reg.getBit<DL_FIR_LINK0_TRAINED_BIT>() && - l_dl_fir_reg.getBit<DL_FIR_LINK1_TRAINED_BIT>(); - } - else if (l_loc_link_train == fapi2::ENUM_ATTR_LINK_TRAIN_EVEN_ONLY) + do { - l_dl_trained = l_dl_fir_reg.getBit<DL_FIR_LINK0_TRAINED_BIT>(); - } - else - { - l_dl_trained = l_dl_fir_reg.getBit<DL_FIR_LINK1_TRAINED_BIT>(); + // validate DL training state + FAPI_TRY(fapi2::getScom(i_target, i_loc_link_ctl.dl_fir_addr, l_dl_fir_reg), + "Error from getScom (0x%.16llX)", i_loc_link_ctl.dl_fir_addr); + + if (l_loc_link_train == fapi2::ENUM_ATTR_LINK_TRAIN_BOTH) + { + l_dl_trained = l_dl_fir_reg.getBit<DL_FIR_LINK0_TRAINED_BIT>() && + l_dl_fir_reg.getBit<DL_FIR_LINK1_TRAINED_BIT>(); + } + else if (l_loc_link_train == fapi2::ENUM_ATTR_LINK_TRAIN_EVEN_ONLY) + { + l_dl_trained = l_dl_fir_reg.getBit<DL_FIR_LINK0_TRAINED_BIT>(); + } + else + { + l_dl_trained = l_dl_fir_reg.getBit<DL_FIR_LINK1_TRAINED_BIT>(); + } + + if (!l_dl_trained) + { + FAPI_TRY(fapi2::delay(DL_POLL_HW_DELAY_NS, DL_POLL_SIM_CYCLES), "fapiDelay error"); + + } + + l_poll_loops--; } + while (l_poll_loops > 0 && !l_dl_trained); FAPI_ASSERT(l_dl_trained, fapi2::P9_FAB_IOVALID_DL_NOT_TRAINED_ERR() |
