summaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorDan Crowell <dcrowell@us.ibm.com>2018-04-16 13:38:20 -0500
committerWilliam G. Hoffa <wghoffa@us.ibm.com>2018-05-30 17:08:28 -0400
commit3ecd7cf99fb44f88a24daca97874e512181ec8f1 (patch)
tree3ab24d83889006bed3bbef25dd32c833094d50da
parent7983214c3e76cca384d104cd07e9294a5ad81dca (diff)
downloadtalos-hostboot-3ecd7cf99fb44f88a24daca97874e512181ec8f1.tar.gz
talos-hostboot-3ecd7cf99fb44f88a24daca97874e512181ec8f1.zip
Add some MAGIC instructions to aid Simics optimization
8001 - Tell Simics we are waiting on the FSP 8006 - Tell Simics we shutdown 8020 - Tell Simics which istep we're running CQ: SW423959 Change-Id: Icea13d2ed7ff73de04400c46b9b1855e94db7c84 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/58104 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Hieu C. Nguyen <hieu.nguyen@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
-rw-r--r--src/build/debug/simics-debug-framework.py42
-rw-r--r--src/include/arch/ppc.H33
-rw-r--r--src/kernel/forceattn_p8.S3
-rw-r--r--src/usr/initservice/istepdispatcher/istepdispatcher.C6
-rw-r--r--src/usr/targeting/attrsync.C9
5 files changed, 42 insertions, 51 deletions
diff --git a/src/build/debug/simics-debug-framework.py b/src/build/debug/simics-debug-framework.py
index 097210198..a3bf1e63e 100644
--- a/src/build/debug/simics-debug-framework.py
+++ b/src/build/debug/simics-debug-framework.py
@@ -511,9 +511,6 @@ def magic_instruction_callback(user_arg, cpu, arg):
if arg == 7006: # MAGIC_SHUTDOWN
# KernelMisc::shutdown()
print "KernelMisc::shutdown() called."
- # Could break/stop/pause the simics run, but presently
- # shutdown() is called four times. --Monte Jan 2012
- # SIM_break_simulation( "Shutdown. Simulation stopped." )
if arg == 7007: # MAGIC_BREAK
# Stop the simulation, much like a hard-coded breakpoint
@@ -540,45 +537,6 @@ def magic_instruction_callback(user_arg, cpu, arg):
#SIM_run_alone( run_command, cmd )
print "MAGIC_LOAD_PAYLOAD not implemented\n";
- if arg == 7016:
- print "Wake up rest of CORE0 - 7017 start \n";
-
- # Set other threads on CORE0 to proper address
- setIar1 = "system_cmp0.cpu0_0_00_1->iar=0x100"
- setIar2 = "system_cmp0.cpu0_0_00_2->iar=0x100"
- setIar3 = "system_cmp0.cpu0_0_00_3->iar=0x100"
-
- setIarAll = "%s; %s; %s"%(setIar1,setIar2,setIar3)
- SIM_run_alone(run_command, setIarAll )
-
- # Enable rest of threads on CORE0
- enable1 = "system_cmp0.cpu0_0_00_1.enable"
- enable2 = "system_cmp0.cpu0_0_00_2.enable"
- enable3 = "system_cmp0.cpu0_0_00_3.enable"
- enableCore0 = "%s; %s; %s"%(enable1,enable2,enable3)
- SIM_run_alone(run_command, enableCore0 )
-
- if arg == 7017:
- print "Wake up FUSED threads - 7017 start \n";
-
- # Set CORE1 threads to proper address
- setIar4 = "system_cmp0.cpu0_0_01_0->iar=0x100"
- setIar5 = "system_cmp0.cpu0_0_01_1->iar=0x100"
- setIar6 = "system_cmp0.cpu0_0_01_2->iar=0x100"
- setIar7 = "system_cmp0.cpu0_0_01_3->iar=0x100"
- setHrmor = "system_cmp0.cpu0_0_01_0->hrmor=0x08000000"
-
- setIarAll = "%s; %s; %s; %s; %s"%(setIar4,setIar5,setIar6,setIar7,setHrmor)
- SIM_run_alone(run_command, setIarAll )
-
- # Enable all threads on CORE1
- enable4 = "system_cmp0.cpu0_0_01_0.enable"
- enable5 = "system_cmp0.cpu0_0_01_1.enable"
- enable6 = "system_cmp0.cpu0_0_01_2.enable"
- enable7 = "system_cmp0.cpu0_0_01_3.enable"
- enableCore1 = "%s; %s; %s; %s"%(enable4,enable5,enable6,enable7)
- SIM_run_alone(run_command, enableCore1 )
-
if arg == 7018: # MAGIC_BREAK_ON_ERROR
# Stop the simulation if an env var is set
if( os.environ.has_key('HB_BREAK_ON_ERROR') ):
diff --git a/src/include/arch/ppc.H b/src/include/arch/ppc.H
index 36b514f04..f63b5db2f 100644
--- a/src/include/arch/ppc.H
+++ b/src/include/arch/ppc.H
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2011,2017 */
+/* Contributors Listed Below - COPYRIGHT 2011,2018 */
/* [+] Google Inc. */
/* [+] International Business Machines Corp. */
/* */
@@ -445,7 +445,6 @@ inline void MAGIC_INSTRUCTION(int _n)
// for example), assign hap numbers in the range 7000..7999 (decimal).
// Presently, the hap handler for magic instruction is found in
// src/build/debug/simics-debug-framework.py
-// Jan 2012 Monte
enum
{
@@ -459,6 +458,7 @@ enum
// that we are waking up and expecting
// CORES to become fused.
+ // 7000-7999 are defined by Hostboot
MAGIC_SHUTDOWN = 7006, // KernelMisc::shutdown() called.
MAGIC_BREAK = 7007, // hard-code a breakpoint
MAGIC_RANDOM = 7008, // generate random number
@@ -466,12 +466,6 @@ enum
MAGIC_FAKEPAYLOAD_ENTER = 7010, // Entered the fake payload.
MAGIC_SIMICS_CHECK = 7011, // Check if system is running on simics
MAGIC_LOAD_PAYLOAD = 7012, // load payload from flash
-
- // These are used for getting threads
- // going after doing 'stop/winkle'
- MAGIC_WAKE_MASTER_THREAD = 7015, // Wake master thread
- MAGIC_WAKE_OTHER_THREADS = 7016, // Wake other threads on initial CORE
- MAGIC_WAKE_FUSED_THREADS = 7017, // Wake up fused core threads
MAGIC_BREAK_ON_ERROR = 7018, // Breakpoint in error cases if
// env var HB_BREAK_ON_ERROR
MAGIC_GET_SBE_TRACES = 7019, // Collect SBE traces
@@ -479,6 +473,13 @@ enum
MAGIC_PRINT_TWO_REGS = 7021, // Print 2 numbers passed in
MAGIC_CONTINUOUS_TRACE = 7055, // extract mixed trace buffer
+
+
+ // 8000-8999 are defined by the Simics CEC team
+ MAGIC_SIMICS_FSP_WAIT = 8001, // Notify we are/aren't waiting for FSP
+ // 1=waiting, 2=done waiting
+ MAGIC_SIMICS_SHUTDOWN = 8006, // Notify we are shutting down
+ MAGIC_SIMICS_ISTEP = 8020, // Log istep, same parms as 7020
};
/**
@@ -500,6 +501,7 @@ enum
asm volatile("mr 4, %0; mr 5, %1" :: \
"r" (_major), "r" (_minor) : "4", "5"); \
MAGIC_INSTRUCTION(MAGIC_PRINT_ISTEP); \
+ MAGIC_INSTRUCTION(MAGIC_SIMICS_ISTEP); \
/**
* @brief Display 2 numbers on the simics console
@@ -511,4 +513,19 @@ enum
"r" (_first), "r" (_second) : "4", "5"); \
MAGIC_INSTRUCTION(MAGIC_PRINT_TWO_REGS); \
+/**
+ * @brief Notify simics that we are waiting for a FSP message
+ */
+#define MAGIC_WAITING_FOR_FSP() \
+ asm volatile("mr 4, 1"); \
+ MAGIC_INSTRUCTION(MAGIC_SIMICS_FSP_WAIT); \
+
+/**
+ * @brief Notify simics that we are done waiting for a FSP message
+ */
+#define MAGIC_DONE_WAITING_FOR_FSP() \
+ asm volatile("mr 4, 2"); \
+ MAGIC_INSTRUCTION(MAGIC_SIMICS_FSP_WAIT); \
+
+
#endif
diff --git a/src/kernel/forceattn_p8.S b/src/kernel/forceattn_p8.S
index 30725e9b3..c1a31e045 100644
--- a/src/kernel/forceattn_p8.S
+++ b/src/kernel/forceattn_p8.S
@@ -5,7 +5,7 @@
#
# OpenPOWER HostBoot Project
#
-# Contributors Listed Below - COPYRIGHT 2012,2015
+# Contributors Listed Below - COPYRIGHT 2012,2018
# [+] International Business Machines Corp.
#
#
@@ -39,5 +39,6 @@ p8_force_attn:
mfspr r9, HID0
mfspr r9, HID0
isync
+ rlwimi 31,31,0,4,22 /* MAGIC_SIMICS_SHUTDOWN */
attn
b 0
diff --git a/src/usr/initservice/istepdispatcher/istepdispatcher.C b/src/usr/initservice/istepdispatcher/istepdispatcher.C
index 4b65fa661..35c7568f9 100644
--- a/src/usr/initservice/istepdispatcher/istepdispatcher.C
+++ b/src/usr/initservice/istepdispatcher/istepdispatcher.C
@@ -1434,6 +1434,9 @@ void IStepDispatcher::waitForSyncPoint()
}
else
{
+ // Tell Simics we are waiting for the FSP to do something
+ MAGIC_WAITING_FOR_FSP();
+
// Wait for the condition variable to be signalled
mutex_lock(&iv_mutex);
while((!iv_syncPointReached) && (!iv_shutdown))
@@ -1451,6 +1454,9 @@ void IStepDispatcher::waitForSyncPoint()
iv_syncPointReached = false;
mutex_unlock(&iv_mutex);
}
+
+ // Tell Simics we are done waiting
+ MAGIC_DONE_WAITING_FOR_FSP();
}
TRACFCOMP(g_trac_initsvc, EXIT_MRK"IStepDispatcher::waitForSyncPoint");
diff --git a/src/usr/targeting/attrsync.C b/src/usr/targeting/attrsync.C
index fbc8db4b9..aadb06849 100644
--- a/src/usr/targeting/attrsync.C
+++ b/src/usr/targeting/attrsync.C
@@ -28,6 +28,7 @@
#include <initservice/initserviceif.H>
#include <errl/hberrltypes.H>
#include <secureboot/service.H>
+#include <arch/ppc.H>
using namespace ERRORLOG;
@@ -143,6 +144,11 @@ namespace TARGETING
}
+ // Tell Simics we are waiting for the FSP to do something
+ // simce the vast majority of the processing time is
+ // on the FSP side of things
+ MAGIC_WAITING_FOR_FSP();
+
if(( l_errl == NULL ) && ( iv_total_pages != 0 ))
{
// tell fsp to commit the last section of data we sent
@@ -154,6 +160,9 @@ namespace TARGETING
}
}
+ // Tell Simics we are done waiting
+ MAGIC_DONE_WAITING_FOR_FSP();
+
}while(0);
return l_errl;
OpenPOWER on IntegriCloud