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| author | Swathi Madhuri Bhattiprolu <bhmadhur@in.ibm.com> | 2018-05-11 01:24:03 -0500 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2018-05-15 09:27:55 -0400 |
| commit | 5620f81ace6c31bcda641676672e322ce0d8366f (patch) | |
| tree | c3b7aeca7c5853ee14cff7b2b133b69459f1c482 | |
| parent | f3fd15c5b1231f80df25acb87e1da0da3c3bdb54 (diff) | |
| download | talos-hostboot-5620f81ace6c31bcda641676672e322ce0d8366f.tar.gz talos-hostboot-5620f81ace6c31bcda641676672e322ce0d8366f.zip | |
Disable memory mirroring in simics temporarily
- Enable back once the SW427497 is integrated
- A story 192854 is created to enable it back
Change-Id: Ia24586aea45e28da4ea4be75f9dfa1a6148de2ed
RTC:192853
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/58687
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Prachi Gupta <pragupta@us.ibm.com>
Reviewed-by: Roland Veloz <rveloz@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
| -rw-r--r-- | src/usr/isteps/istep14/call_proc_exit_cache_contained.C | 18 |
1 files changed, 17 insertions, 1 deletions
diff --git a/src/usr/isteps/istep14/call_proc_exit_cache_contained.C b/src/usr/isteps/istep14/call_proc_exit_cache_contained.C index 46ed22845..0d7699179 100644 --- a/src/usr/isteps/istep14/call_proc_exit_cache_contained.C +++ b/src/usr/isteps/istep14/call_proc_exit_cache_contained.C @@ -150,6 +150,22 @@ void* call_proc_exit_cache_contained (void *io_pArgs) l_mirrored = l_sys->getAttr<ATTR_PAYLOAD_IN_MIRROR_MEM>(); } + // In Simics mode disable mirroring for now - @todo-CQ:SW427497 + // need action file changes for P9 to enable MM + // SW427497 addresses these changes + // also force payload to zero + // @todo-RTC:192854 to enable it back once the defect SW427497 + // is integrated. + if(Util::isSimicsRunning()) + { + l_mirrored = false; + + l_sys->setAttr<ATTR_PAYLOAD_IN_MIRROR_MEM>(0); + + TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace, + "Disabling memory mirroring temporarily"); + } + if(l_mirrored) { ATTR_MIRROR_BASE_ADDRESS_type l_mirrorBaseAddr = 0; @@ -364,7 +380,7 @@ void* call_proc_exit_cache_contained (void *io_pArgs) scom_size, //Size of Scom DEVICE_SCOM_ADDRESS(EXIT_CACHE_CONTAINED_SCOM_ADDR)); } - + if ( l_errl ) { // Create IStep error log and cross reference to error |
