diff options
author | Anusha Reddy Rangareddygari <anusrang@in.ibm.com> | 2016-09-14 14:26:08 +0200 |
---|---|---|
committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2016-09-25 13:22:27 -0400 |
commit | d41642ca8cededf3ac1727fcfdc7329e1ebb790c (patch) | |
tree | b391342ab9fc63b40831d4762bcd234141d77f65 | |
parent | 5af4383ee2147812a056e4c355b43b34ce138d39 (diff) | |
download | talos-hostboot-d41642ca8cededf3ac1727fcfdc7329e1ebb790c.tar.gz talos-hostboot-d41642ca8cededf3ac1727fcfdc7329e1ebb790c.zip |
Removing checkstop checks
* p9_sbe_chiplet_init
* p9_sbe_tp_chiplet_init3
* p9_mem_startclocks
* p9_sbe_common
Change-Id: I63c4f758b71cc16b9445ec6d5d0f404c10838c43
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/29731
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Soma Bhanutej <soma.bhanu@in.ibm.com>
Reviewed-by: Sunil Kumar <skumar8j@in.ibm.com>
Reviewed-by: PARVATHI RACHAKONDA <prachako@in.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/29736
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
5 files changed, 45 insertions, 63 deletions
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_mem_startclocks.C b/src/import/chips/p9/procedures/hwp/perv/p9_mem_startclocks.C index 13eb30770..150988623 100644 --- a/src/import/chips/p9/procedures/hwp/perv/p9_mem_startclocks.C +++ b/src/import/chips/p9/procedures/hwp/perv/p9_mem_startclocks.C @@ -57,8 +57,9 @@ enum P9_MEM_STARTCLOCKS_Private_Constants DONT_STARTSLAVE = 0x0 }; -static fapi2::ReturnCode p9_mem_startclocks_check_checkstop_function( - const fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_chiplet); +static fapi2::ReturnCode p9_mem_startclocks_fence_setup_function( + const fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_chiplet, + const fapi2::buffer<uint64_t> i_pg_vector); static fapi2::ReturnCode p9_mem_startclocks_cplt_ctrl_action_function( const fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_chiplet); @@ -70,12 +71,20 @@ fapi2::ReturnCode p9_mem_startclocks(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target_chip) { uint8_t l_sync_mode = 0; - + fapi2::buffer<uint64_t> l_pg_vector; FAPI_DBG("Entering ..."); FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_MC_SYNC_MODE, i_target_chip, l_sync_mode), "Error from FAPI_ATTR_GET (ATTR_MC_SYNC_MODE)"); + for (auto l_target_cplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> + (static_cast<fapi2::TargetFilter>(fapi2::TARGET_FILTER_ALL_NEST | + fapi2::TARGET_FILTER_TP), fapi2::TARGET_STATE_FUNCTIONAL)) + { + FAPI_TRY(p9_sbe_common_get_pg_vector(l_target_cplt, l_pg_vector)); + FAPI_DBG("pg targets vector: %#018lX", l_pg_vector); + } + if (!l_sync_mode) { for (auto l_trgt_chplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> @@ -93,8 +102,8 @@ fapi2::ReturnCode p9_mem_startclocks(const DONT_STARTSLAVE, DONT_STARTMASTER, REGIONS_ALL_EXCEPT_VITAL_NESTPLL, CLOCK_TYPES)); - FAPI_INF("Call p9_mem_startclocks_check_checkstop_function for Mc chiplets "); - FAPI_TRY(p9_mem_startclocks_check_checkstop_function(l_trgt_chplt)); + FAPI_INF("Call p9_mem_startclocks_fence_setup_function for Mc chiplets "); + FAPI_TRY(p9_mem_startclocks_fence_setup_function(l_trgt_chplt, l_pg_vector)); FAPI_INF("Call p9_mem_startclocks_flushmode for Mc chiplets"); FAPI_TRY(p9_mem_startclocks_flushmode(l_trgt_chplt)); @@ -110,33 +119,42 @@ fapi_try_exit: } /// @brief --drop chiplet fence -/// --check checkstop register -/// --clear flush inhibit to go into flush mode -/// /// @param[in] i_target_chiplet Reference to TARGET_TYPE_PERV target /// @return FAPI2_RC_SUCCESS if success, else error code. -static fapi2::ReturnCode p9_mem_startclocks_check_checkstop_function( - const fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_chiplet) +static fapi2::ReturnCode p9_mem_startclocks_fence_setup_function( + const fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_chiplet, + const fapi2::buffer<uint64_t> i_pg_vector) { - fapi2::buffer<uint64_t> l_read_reg; + uint8_t l_read_attrunitpos = 0; fapi2::buffer<uint64_t> l_data64; FAPI_DBG("Entering ..."); - FAPI_INF("Drop chiplet fence"); - //Setting NET_CTRL0 register value - l_data64.flush<1>(); - l_data64.clearBit<PEC_STACK0_NET_CTRL0_FENCE_EN>(); //NET_CTRL0.FENCE_EN = 0 - FAPI_TRY(fapi2::putScom(i_target_chiplet, PERV_NET_CTRL0_WAND, l_data64)); - - FAPI_INF("Check checkstop register"); - //Getting XFIR register value - FAPI_TRY(fapi2::getScom(i_target_chiplet, PERV_XFIR, - l_read_reg)); //l_read_reg = XFIR - - FAPI_ASSERT(l_read_reg == 0, - fapi2::READ_ALL_CHECKSTOP_ERR() - .set_READ_ALL_CHECKSTOP(l_read_reg), - "ERROR: COMBINE ALL CHECKSTOP ERROR"); + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_UNIT_POS, i_target_chiplet, + l_read_attrunitpos)); + + if ( l_read_attrunitpos == 0x07 ) + { + if ( i_pg_vector.getBit<4>() == 1 ) + { + FAPI_DBG("Drop chiplet fence"); + //Setting NET_CTRL0 register value + l_data64.flush<1>(); + l_data64.clearBit<PERV_1_NET_CTRL0_FENCE_EN>(); //NET_CTRL0.FENCE_EN = 0 + FAPI_TRY(fapi2::putScom(i_target_chiplet, PERV_NET_CTRL0_WAND, l_data64)); + } + } + + if ( l_read_attrunitpos == 0x08 ) + { + if ( i_pg_vector.getBit<2>() == 1 ) + { + FAPI_DBG("Drop chiplet fence"); + //Setting NET_CTRL0 register value + l_data64.flush<1>(); + l_data64.clearBit<PERV_1_NET_CTRL0_FENCE_EN>(); //NET_CTRL0.FENCE_EN = 0 + FAPI_TRY(fapi2::putScom(i_target_chiplet, PERV_NET_CTRL0_WAND, l_data64)); + } + } FAPI_DBG("Exiting ..."); diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_mem_startclocks.H b/src/import/chips/p9/procedures/hwp/perv/p9_mem_startclocks.H index 4041d32fe..0eab7a500 100644 --- a/src/import/chips/p9/procedures/hwp/perv/p9_mem_startclocks.H +++ b/src/import/chips/p9/procedures/hwp/perv/p9_mem_startclocks.H @@ -52,7 +52,6 @@ typedef fapi2::ReturnCode (*p9_mem_startclocks_FP_t)( /// --Module clock start stop /// --Check clock stat SL, NSL , ARY /// --drop chiplet fence -/// --check checkstop register /// --clear flush inhibit to go into flush mode /// /// @param[in] i_target_chip Reference to TARGET_TYPE_PROC_CHIP target diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_common.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_common.C index 276bb714a..bb4d94e78 100644 --- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_common.C +++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_common.C @@ -282,31 +282,6 @@ fapi_try_exit: } -/// @brief --check checkstop register -/// @param[in] i_target_chiplet Reference to TARGET_TYPE_PERV target -/// @return FAPI2_RC_SUCCESS if success, else error code. -fapi2::ReturnCode p9_sbe_common_check_checkstop_function( - const fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_chiplet) -{ - fapi2::buffer<uint64_t> l_read_reg; - FAPI_INF("p9_sbe_common_check_checkstop_function: Entering ..."); - - FAPI_DBG("Check checkstop register"); - //Getting XFIR register value - FAPI_TRY(fapi2::getScom(i_target_chiplet, PERV_XFIR, - l_read_reg)); //l_read_reg = XFIR - - FAPI_ASSERT(l_read_reg == 0, - fapi2::READ_ALL_CHECKSTOP_ERR() - .set_READ_ALL_CHECKSTOP(l_read_reg), - "ERROR: COMBINE ALL CHECKSTOP ERROR"); - - FAPI_INF("p9_sbe_common_check_checkstop_function: Exiting ..."); - -fapi_try_exit: - return fapi2::current_err; - -} /// @brief check clocks status /// diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_common.H b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_common.H index adbc6462c..3d6c271a0 100644 --- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_common.H +++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_common.H @@ -52,9 +52,6 @@ fapi2::ReturnCode p9_sbe_common_check_cc_status_function( const fapi2::buffer<uint16_t> i_regions, const fapi2::buffer<uint8_t> i_clock_types); -fapi2::ReturnCode p9_sbe_common_check_checkstop_function( - const fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_chiplet); - fapi2::ReturnCode p9_sbe_common_check_status(const fapi2::buffer<uint64_t> i_regions, const fapi2::buffer<uint64_t> i_clock_status, diff --git a/src/import/chips/p9/procedures/xml/error_info/p9_sbe_common_errors.xml b/src/import/chips/p9/procedures/xml/error_info/p9_sbe_common_errors.xml index 419976835..cdd42e6ee 100644 --- a/src/import/chips/p9/procedures/xml/error_info/p9_sbe_common_errors.xml +++ b/src/import/chips/p9/procedures/xml/error_info/p9_sbe_common_errors.xml @@ -81,12 +81,5 @@ <description>sl_thold status not matching the expected value in clock start stop sequence</description> <ffdc>READ_CLK_SL</ffdc> </hwpError> - <!-- ******************************************************************** --> - <hwpError> - <sbeError/> - <rc>RC_READ_ALL_CHECKSTOP_ERR</rc> - <description>Read and or all Checkstop error</description> - <ffdc>READ_ALL_CHECKSTOP</ffdc> - </hwpError> - <!-- ******************************************************************** --> + <!-- ******************************************************************** --> </hwpErrors> |