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author | Amit Tendolkar <amit.tendolkar@in.ibm.com> | 2018-02-22 09:35:46 -0600 |
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committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2018-02-24 21:30:01 -0500 |
commit | a2c708da6e1ac1f4e5f504dae30783c149ed042f (patch) | |
tree | c30652813ce5e758add89b91566b7d3127f4403b | |
parent | 90a2c95eb96ced416b6b69c119ad4e9a6f7b628a (diff) | |
download | talos-hostboot-a2c708da6e1ac1f4e5f504dae30783c149ed042f.tar.gz talos-hostboot-a2c708da6e1ac1f4e5f504dae30783c149ed042f.zip |
Add PGPE XIRs to Special Wakeup Failure FFDC
Adds PGPE to the list of PPEs whose FFDC is collected on special-
wakeup failures for core, ex and quad. PGPE reset fail FFDC
collection mode changes from snaphot to halt.
Change-Id: I48e67f5088ea9e5298e0c2d0f786121c6f0a7896
CQ: SW418521
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54566
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Prem Shanker Jha <premjha2@in.ibm.com>
Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54591
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
5 files changed, 24 insertions, 35 deletions
diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_cpu_special_wakeup_core.C b/src/import/chips/p9/procedures/hwp/pm/p9_cpu_special_wakeup_core.C index 8031ff929..e3cc00849 100644 --- a/src/import/chips/p9/procedures/hwp/pm/p9_cpu_special_wakeup_core.C +++ b/src/import/chips/p9/procedures/hwp/pm/p9_cpu_special_wakeup_core.C @@ -123,10 +123,11 @@ fapi2::ReturnCode collectCoreTimeoutFailInfo( const fapi2::Target < fapi2::TARGE uint8_t l_exPos = 0; FAPI_ATTR_GET( fapi2::ATTR_CHIP_UNIT_POS, parentExTgt, l_exPos ); - std::vector<uint64_t> l_cmeBaseAddress; - std::vector<uint64_t> l_sgpeBaseAddress; - l_sgpeBaseAddress.push_back( SGPE_BASE_ADDRESS ); - l_cmeBaseAddress.push_back( getCmeBaseAddress( l_exPos ) ); + // Collect PPE FFDC for CME, SGPE and PGPE + std::vector<uint64_t> l_ppeBaseAddresses; + l_ppeBaseAddresses.push_back( getCmeBaseAddress( l_exPos ) ); + l_ppeBaseAddresses.push_back( SGPE_BASE_ADDRESS ); + l_ppeBaseAddresses.push_back( PGPE_BASE_ADDRESS ); FAPI_ASSERT( false , fapi2::SPCWKUP_CORE_TIMEOUT(). @@ -140,10 +141,8 @@ fapi2::ReturnCode collectCoreTimeoutFailInfo( const fapi2::Target < fapi2::TARGE set_EX_TARGET( parentExTgt ). set_CORE_TARGET( i_target ). set_PROC_CHIP_TARGET( i_processing_info.procTgt ). - set_CME_BASE_ADDRESS( l_cmeBaseAddress ). - set_SGPE_BASE_ADDRESS( l_sgpeBaseAddress ). - set_CME_STATE_MODE( XIRS ). - set_SGPE_STATE_MODE( XIRS ), + set_PPE_BASE_ADDRESSES( l_ppeBaseAddresses ). + set_PPE_STATE_MODE( XIRS ), "Timed Out In Setting Core Special Wakeup"); fapi_try_exit: FAPI_INF("<< collectCoreTimeoutFailInfo" ); diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_cpu_special_wakeup_eq.C b/src/import/chips/p9/procedures/hwp/pm/p9_cpu_special_wakeup_eq.C index 72683fd16..7e23c7587 100644 --- a/src/import/chips/p9/procedures/hwp/pm/p9_cpu_special_wakeup_eq.C +++ b/src/import/chips/p9/procedures/hwp/pm/p9_cpu_special_wakeup_eq.C @@ -115,7 +115,8 @@ fapi2::ReturnCode collectEqTimeoutFailInfo( const fapi2::Target < fapi2::TARGET_ fapi2::buffer<uint64_t> l_histRegVal; fapi2::buffer<uint64_t> l_netCtrlVal; std::vector<uint64_t> l_ppeBaseAddressList; - l_ppeBaseAddressList.push_back( SGPE_BASE_ADDRESS ); + l_ppeBaseAddressList.push_back (SGPE_BASE_ADDRESS); + l_ppeBaseAddressList.push_back (PGPE_BASE_ADDRESS); uint8_t l_exPos = 0; auto l_ex_vector = diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_cpu_special_wakeup_ex.C b/src/import/chips/p9/procedures/hwp/pm/p9_cpu_special_wakeup_ex.C index 768c28c3c..1fbb683ab 100644 --- a/src/import/chips/p9/procedures/hwp/pm/p9_cpu_special_wakeup_ex.C +++ b/src/import/chips/p9/procedures/hwp/pm/p9_cpu_special_wakeup_ex.C @@ -144,16 +144,11 @@ fapi2::ReturnCode collectExTimeoutFailInfo( const fapi2::Target < fapi2::TARGET_ uint8_t l_exPos = 0; FAPI_ATTR_GET( fapi2::ATTR_CHIP_UNIT_POS, i_target, l_exPos ); - //For Special Wakeup of EX, in case of timeout, SGPE can't be halted. - //Hence, only XIRs will be collected for it. Whereas for CME, full PPE - //state dump is permissible. As a result, collect PPE State is getting called - //separately for CME and SGPE. Otherwise , collect PPE state expects a - //vector of base addresses. - - std::vector<uint64_t> l_cmeBaseAddress; - std::vector<uint64_t> l_sgpeBaseAddress; - l_sgpeBaseAddress.push_back( SGPE_BASE_ADDRESS ); - l_cmeBaseAddress.push_back( getCmeBaseAddress( l_exPos ) ); + // Collect CME, SGPE and PGPE FFDC, currently we only collect XIRs + std::vector<uint64_t> l_ppeBaseAddresses; + l_ppeBaseAddresses.push_back (getCmeBaseAddress (l_exPos)); + l_ppeBaseAddresses.push_back (SGPE_BASE_ADDRESS); + l_ppeBaseAddresses.push_back (PGPE_BASE_ADDRESS); //From this point onwards, any usage of FAPI TRY in physical or //logical path can be a serious problem. Hence, should not be used. @@ -175,10 +170,8 @@ fapi2::ReturnCode collectExTimeoutFailInfo( const fapi2::Target < fapi2::TARGET_ set_EQ_TARGET( i_target.getParent<fapi2::TARGET_TYPE_EQ>() ). set_EX_TARGET( i_target ). set_PROC_CHIP_TARGET( i_processing_info.procTgt ). - set_CME_BASE_ADDRESS( l_cmeBaseAddress ). - set_SGPE_BASE_ADDRESS( l_sgpeBaseAddress ). - set_CME_STATE_MODE( XIRS ). - set_SGPE_STATE_MODE( XIRS ), + set_PPE_BASE_ADDRESSES( l_ppeBaseAddresses ). + set_PPE_STATE_MODE( XIRS ), "Timed Out In Setting The EX Special Wakeup" ); fapi_try_exit: diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_pm_pstate_gpe_init.C b/src/import/chips/p9/procedures/hwp/pm/p9_pm_pstate_gpe_init.C index 24f4d14b7..d1c2342ea 100644 --- a/src/import/chips/p9/procedures/hwp/pm/p9_pm_pstate_gpe_init.C +++ b/src/import/chips/p9/procedures/hwp/pm/p9_pm_pstate_gpe_init.C @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2015,2017 */ +/* Contributors Listed Below - COPYRIGHT 2015,2018 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -327,7 +327,7 @@ fapi2::ReturnCode pstate_gpe_reset( fapi2::PSTATE_GPE_RESET_TIMEOUT() .set_CHIP(i_target) .set_PGPE_BASE_ADDRESS(l_pgpe_base_addr) - .set_PGPE_STATE_MODE(SNAPSHOT), + .set_PGPE_STATE_MODE(HALT), "PSTATE GPE Reset timeout"); FAPI_TRY(getScom(i_target, PU_OCB_OCI_OCCS2_SCOM, l_data64)); diff --git a/src/import/chips/p9/procedures/xml/error_info/p9_cpu_special_wakeup_errors.xml b/src/import/chips/p9/procedures/xml/error_info/p9_cpu_special_wakeup_errors.xml index f498732a6..6898fed0a 100644 --- a/src/import/chips/p9/procedures/xml/error_info/p9_cpu_special_wakeup_errors.xml +++ b/src/import/chips/p9/procedures/xml/error_info/p9_cpu_special_wakeup_errors.xml @@ -5,7 +5,7 @@ <!-- --> <!-- OpenPOWER HostBoot Project --> <!-- --> -<!-- Contributors Listed Below - COPYRIGHT 2016,2017 --> +<!-- Contributors Listed Below - COPYRIGHT 2016,2018 --> <!-- [+] International Business Machines Corp. --> <!-- --> <!-- --> @@ -87,12 +87,10 @@ <ffdc>EQ_TARGET</ffdc> <ffdc>EX_TARGET</ffdc> <ffdc>PROC_CHIP_TARGET</ffdc> - <ffdc>CME_STATE_MODE</ffdc> - <ffdc>SGPE_STATE_MODE</ffdc> + <ffdc>PPE_STATE_MODE</ffdc> <collectFfdc>p9_eq_clear_atomic_lock, EQ_TARGET</collectFfdc> - <collectFfdc>p9_collect_ppe_state, PROC_CHIP_TARGET, CME_STATE_MODE, CME_BASE_ADDRESS</collectFfdc> - <collectFfdc>p9_collect_ppe_state, PROC_CHIP_TARGET, SGPE_STATE_MODE, SGPE_BASE_ADDRESS</collectFfdc> + <collectFfdc>p9_collect_ppe_state, PROC_CHIP_TARGET, PPE_STATE_MODE, PPE_BASE_ADDRESSES</collectFfdc> <collectRegisterFfdc> <id>CME_FFDC_REGISTERS</id> @@ -125,12 +123,10 @@ <ffdc>EQ_TARGET</ffdc> <ffdc>CORE_TARGET</ffdc> <ffdc>PROC_CHIP_TARGET</ffdc> - <ffdc>CME_STATE_MODE</ffdc> - <ffdc>SGPE_STATE_MODE</ffdc> + <ffdc>PPE_STATE_MODE</ffdc> + <collectFfdc>p9_eq_clear_atomic_lock, EQ_TARGET</collectFfdc> - - <collectFfdc>p9_collect_ppe_state, PROC_CHIP_TARGET, CME_STATE_MODE, CME_BASE_ADDRESS</collectFfdc> - <collectFfdc>p9_collect_ppe_state, PROC_CHIP_TARGET, SGPE_STATE_MODE, SGPE_BASE_ADDRESS</collectFfdc> + <collectFfdc>p9_collect_ppe_state, PROC_CHIP_TARGET, PPE_STATE_MODE, PPE_BASE_ADDRESSES</collectFfdc> <collectRegisterFfdc> <id>CME_FFDC_REGISTERS</id> |