Moving DD specific ring coord from TOR to XIP (step 1)

Step 1 - Ensuring backwards compatibility in TOR and XIP APIs to
         avoid co-req issue.

- Updated TOR and XIP APIs, xip_tool and ipl_build to handle both
  types of DD coordination.

Key_Cronus_Test=XIP_REGRESS

HW-Image-Prereq=51511
- 51511 changes the .rings section DD level packaging. This commit
  (42751) prepares the TOR API and associated codes to handle the
  new .rings layout while also making the TOR API backwards
  compatible to the existing .rings section.

Change-Id: I7d254340808ca9270fc1c96414102794fcffeabe
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42751
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Reviewed-by: Sumit Kumar <sumit_kumar@in.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/43259
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>

8 files changed, 260 insertions, 176 deletions

diff --git a/src/import/chips/common/utils/imageProcs/common_ringId.H b/src/import/chips/common/utils/imageProcs/common_ringId.H
index a8bd93761..a042d5d50 100644
--- a/src/import/chips/common/utils/imageProcs/common_ringId.H
+++ b/src/import/chips/common/utils/imageProcs/common_ringId.H
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* OpenPOWER HostBoot Project                                             */
 /*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2016,2017                        */
+/* Contributors Listed Below - COPYRIGHT 2016,2018                        */
 /* [+] International Business Machines Corp.                              */
 /*                                                                        */
 /*                                                                        */
@@ -29,9 +29,11 @@
 #include <stdint.h>
 #include <stddef.h>
 
+#define   TORV3_SUPPORT
 
-////////////////////////////////////////////////////////////////////////////////
-// Declare assumptions - Begin
+///////////////////////////////////////////////////////////////////////////////
+//                     Declare assumptions - Begin                           //
+//                                                                           //
 //
 
 // Various data type defs for enums. Serves following purposes:
@@ -48,40 +50,49 @@ typedef uint8_t   ChipType_t;       // Type for ChipType enum
 typedef uint8_t   RingType_t;       // Type for RingType enum
 typedef uint8_t   RingVariant_t;    // Type for RingVariant enum
 typedef uint32_t  TorCpltOffset_t;  // Type for offset value to chiplet's CMN or INST section
+typedef uint8_t   myBoolean_t;      // false:0, true:1, undefined:UNDEFINED_BOOLEAN
 
 #define  UNDEFINED_RING_ID      (RingId_t)0xffff
 #define  INVALID_RING_TYPE      (RingType_t)0xff
 #define  INVALID_CHIPLET_TYPE   (ChipletType_t)0xff
+#define  UNDEFINED_PPE_TYPE     (PpeType_t)0xff
 #define  UNDEFINED_CHIP_TYPE    (ChipType_t)0xff
 #define  MAX_TOR_RING_OFFSET    (uint16_t)(256*256-1) // Max val of uint16
 #define  MAX_RING_NAME_LENGTH   (uint8_t)50
 #define  UNDEFINED_DD_LEVEL     (uint8_t)0xff
+#define  UNDEFINED_BOOLEAN      (myBoolean_t)0xff
 
-//
-// Declare assumptions - End
+//                                                                           //
+//                     Declare assumptions - End                             //
 ///////////////////////////////////////////////////////////////////////////////
 
 
 ///////////////////////////////////////////////////////////////////////////////
-// TOR layout definitions - Begin
-//
+//                     TOR layout definitions - Begin                        //
+//                                                                           //
 
 //
 // TOR header field (appears in top of every HW, SBE, CEN, OVRD, etc ring section)
 //
 typedef struct
 {
-    uint32_t   magic;
-    uint8_t    version;
+    uint32_t   magic;       // =TOR_MAGIC_xyz
+    uint8_t    version;     // =TOR_VERSION
     ChipType_t chipType;    // Value from ChipType enum
+#ifdef TORV3_SUPPORT
     uint8_t    ddLevel;     // =0xff if MAGIC_HW, >0 all other MAGICs
     uint8_t    numDdLevels; // >0 if MAGIC_HW, =1 all other MAGICs
-    uint32_t   size;        // Size of the TOR ringSection.
+#else
+    uint8_t    ddLevel;     // Actual DD level of ringSection
+    uint8_t    undefined;
+#endif
+    uint32_t   size;        // Size of ringSection.
 } TorHeader_t;
 
 //
 // Subsequent TOR fields (listed in order they appear in TOR ringSections)
 //
+#ifdef TORV3_SUPPORT
 typedef struct
 {
     uint32_t offset;
@@ -89,6 +100,7 @@ typedef struct
     uint8_t  ddLevel;
     uint8_t  reserved[3];
 } TorDdBlock_t;
+#endif
 
 typedef struct
 {
@@ -104,16 +116,19 @@ typedef struct
 
 typedef uint16_t TorRingOffset_t;  // Offset value to actual ring
 
-//
-// TOR layout definitions - End
+//                                                                           //
+//                     TOR layout definitions - End                          //
 ///////////////////////////////////////////////////////////////////////////////
 
 
 ///////////////////////////////////////////////////////////////////////////////
-// Key TOR constants - Begin
-//
+//                     Key TOR constants - Begin                             //
+//                                                                           //
 
-#define  TOR_VERSION  4
+//#define TOR_VERSION  1  // Initial version. Large RS4 header.
+//#define TOR_VERSION  2  // Reduced RS4 header.
+//#define TOR_VERSION  3  // Added TOR magic header.
+#define TOR_VERSION  4  // TOR API code restructuring.
 
 // TOR Magic values for top-level TOR ringSection and sub-ringSections
 enum TorMagicNum
@@ -128,8 +143,8 @@ enum TorMagicNum
     TOR_MAGIC_CEN   = (uint32_t)0x544F524E,   // "TORN"
 };
 
-//
-// Key TOR constants - End
+//                                                                           //
+//                     Key TOR constants - End                               //
 ///////////////////////////////////////////////////////////////////////////////
 
 
@@ -192,9 +207,9 @@ typedef struct
 //   order with which they appear in the HW image's .rings section.
 enum PpeType
 {
-    PT_SBE           = 0x00,
-    PT_CME           = 0x01,
-    PT_SGPE          = 0x02,
+    PT_SBE        = 0x00,
+    PT_CME        = 0x01,
+    PT_SGPE       = 0x02,
     NUM_PPE_TYPES = 0x03
 };
 
diff --git a/src/import/chips/p9/procedures/hwp/customize/p9_xip_customize.C b/src/import/chips/p9/procedures/hwp/customize/p9_xip_customize.C
index 5d4e38372..28f21d6b6 100644
--- a/src/import/chips/p9/procedures/hwp/customize/p9_xip_customize.C
+++ b/src/import/chips/p9/procedures/hwp/customize/p9_xip_customize.C
@@ -301,7 +301,7 @@ fapi2::ReturnCode get_overlays_ring(
                i_overlaysSection,
                i_ddLevel,
                i_ringId,
-               PT_SBE,
+               UNDEFINED_PPE_TYPE,
                OVERLAY,
                l_instanceId,
                io_ringBuf2,  //Has RS4 Gptr overlay ring on return
@@ -646,7 +646,7 @@ fapi_try_exit:
 //  void*      i_ringSection:        Ptr to ring section.
 //  uint32_t&  io_ringSectionSize:   Running ring section size
 //  uint32_t   i_maxRingSectionSize: Max ring section size
-//  void*      i_overlaysSection:    Overlays ring section
+//  void*      i_overlaysSection:    DD specific overlays ring section
 //  uint8_t    i_ddLevel:            DD level (to be used for TOR API level verif)
 //  uint8_t    i_sysPhase:           ={HB_SBE, RT_CME, RT_SGPE}
 //  void*      i_vpdRing:            VPD ring buffer.
@@ -876,20 +876,20 @@ fapi2::ReturnCode _fetch_and_insert_vpd_rings(
                                   (i_ring.vpdRingClass == VPD_RING_CLASS_EX_INS ? 1 : 0)) +
                                  i_evenOdd;
 
-        PpeType_t l_PpeType;
+        PpeType_t l_ppeType;
 
         switch (i_sysPhase)
         {
             case SYSPHASE_HB_SBE:
-                l_PpeType = PT_SBE;
+                l_ppeType = PT_SBE;
                 break;
 
             case SYSPHASE_RT_CME:
-                l_PpeType = PT_CME;
+                l_ppeType = PT_CME;
                 break;
 
             case SYSPHASE_RT_SGPE:
-                l_PpeType = PT_SGPE;
+                l_ppeType = PT_SGPE;
                 break;
 
             default:
@@ -909,7 +909,7 @@ fapi2::ReturnCode _fetch_and_insert_vpd_rings(
                    i_ringBuf2,
                    i_ringBufSize2,  // Max size.
                    i_ring.ringId,
-                   l_PpeType,
+                   l_ppeType,
                    BASE,            // All VPD rings are Base ringVariant
                    l_chipletTorId,  // Chiplet instance TOR Index
                    i_vpdRing );     // The VPD RS4 ring container
@@ -921,7 +921,7 @@ fapi2::ReturnCode _fetch_and_insert_vpd_rings(
                      set_RING_ID(i_ring.ringId).
                      set_OCCURRENCE(1),
                      "tor_append_ring() failed in phase %d w/l_rc=%d for ringId=0x%x",
-                     l_PpeType, l_rc, i_ring.ringId );
+                     l_ppeType, l_rc, i_ring.ringId );
 
         FAPI_INF("Successfully added VPD ring: (ringId,evenOdd,chipletId)=(0x%02X,0x%X,0x%02X)",
                  i_ring.ringId, i_evenOdd, i_chipletId);
@@ -985,7 +985,7 @@ fapi_try_exit:
 //  Parameter list:
 //  const fapi::Target &i_target:    Processor chip target.
 //  void*      i_hwImage:            Ptr to ring section.
-//  void**     o_overlaysSection:    Ptr to extracted DD section in hwImage.
+//  void**     o_overlaysSection:    Ptr to extracted overlay DD section in hwImage.
 //  uint8_t&   o_ddLevel:            DD level extracted from host services.
 //  bool&      o_bGptrMvpdSupport:   Boolean art indicating whether Gptr support or not.
 #ifdef WIN32
@@ -1005,7 +1005,7 @@ fapi2::ReturnCode resolve_gptr_overlays(
     P9XipSection l_xipSection;
     int      l_rc = INFRASTRUCT_RC_SUCCESS;
     uint8_t  l_nimbusDd1 = 1;
-    bool     l_bDdSupport = false;
+    myBoolean_t  l_bDdSupport = UNDEFINED_BOOLEAN;
 
     FAPI_DBG("Entering resolve_gptr_overlays");
 
@@ -1025,14 +1025,14 @@ fapi2::ReturnCode resolve_gptr_overlays(
               (uint64_t)current_err );
 
     // Second determine if there's overlays support in HW image. If no, continue, else err out.
-    l_rc = p9_xip_dd_section_support(i_hwImage, P9_XIP_SECTION_HW_OVERLAYS, l_bDdSupport);
+    l_rc = p9_xip_dd_section_support(i_hwImage, P9_XIP_SECTION_HW_OVERLAYS, &l_bDdSupport);
 
     FAPI_ASSERT( l_rc == INFRASTRUCT_RC_SUCCESS,
                  fapi2::XIPC_XIP_API_MISC_ERROR().
                  set_CHIP_TARGET(i_procTarget).
                  set_XIP_RC(l_rc).
                  set_OCCURRENCE(10),
-                 "xip_dd_section_support() failed w/rc=0x%08x.\n",
+                 "p9_xip_dd_section_support() failed for .overlays w/rc=0x%08x.\n",
                  (uint32_t)l_rc );
 
     // Now do the checks of the above return vars, l_nimbusDd1 and l_bDdSupport.
@@ -1059,13 +1059,14 @@ fapi2::ReturnCode resolve_gptr_overlays(
 
         l_rc = p9_xip_get_section(i_hwImage, P9_XIP_SECTION_HW_OVERLAYS, &l_xipSection, o_ddLevel);
 
-        FAPI_ASSERT( l_rc == 0,
-                     fapi2::XIPC_XIP_API_MISC_ERROR().
+        FAPI_ASSERT( l_rc == INFRASTRUCT_RC_SUCCESS,
+                     fapi2::XIPC_XIP_GET_SECTION_ERROR().
                      set_CHIP_TARGET(i_procTarget).
                      set_XIP_RC(l_rc).
-                     set_OCCURRENCE(11),
-                     "xip_get_section() failed w/rc=0x%08x.\n",
-                     (uint32_t)l_rc );
+                     set_DDLEVEL(UNDEFINED_DD_LEVEL).
+                     set_OCCURRENCE(2),
+                     "p9_xip_get_section() failed (2) getting HW .overlays section (ddLevel=0x%x) w/rc=0x%08X",
+                     o_ddLevel, (uint32_t)l_rc );
 
         *o_overlaysSection = (void*)((uint8_t*)i_hwImage + l_xipSection.iv_offset);
         o_bGptrMvpdSupport = true;
@@ -1868,11 +1869,15 @@ ReturnCode p9_xip_customize (
     uint32_t        l_maxImageSize = 0; // Attrib adjusted local value of MAX_SEEPROM_IMAGE_SIZE
     uint32_t        l_maxRingSectionSize;
     uint32_t        l_sectionOffset = 1;
-    uint8_t         attrDdLevel = 0;
     uint32_t        attrMaxSbeSeepromSize = 0;
     uint32_t        l_requestedBootCoreMask = (i_sysPhase == SYSPHASE_HB_SBE) ? io_bootCoreMask : 0x00FFFFFF;
     void*           l_hwRingsSection;
 
+    uint8_t      attrDdLevel = UNDEFINED_DD_LEVEL; // Used for host services
+    uint8_t      l_xipDdLevel = UNDEFINED_DD_LEVEL; // Used for XIP extraction
+    myBoolean_t  l_bDdSupport = UNDEFINED_BOOLEAN;
+
+
 
     FAPI_DBG ("Entering p9_xip_customize w/sysPhase=%d...", i_sysPhase);
 
@@ -2295,7 +2300,7 @@ ReturnCode p9_xip_customize (
             // Make a note of the image size without .rings
             l_rc = p9_xip_image_size(io_image, &l_imageSizeWithoutRings);
 
-            FAPI_ASSERT( l_rc == 0,
+            FAPI_ASSERT( l_rc == INFRASTRUCT_RC_SUCCESS,
                          fapi2::XIPC_XIP_API_MISC_ERROR().
                          set_CHIP_TARGET(i_procTarget).
                          set_XIP_RC(l_rc).
@@ -2305,16 +2310,17 @@ ReturnCode p9_xip_customize (
 
             FAPI_DBG("Size of image before VPD update (excl .rings): %d", l_imageSizeWithoutRings);
 
-            // Get the size of our .rings section.
+            // Get the size of our .rings section (assumption is NO DD support).
             l_rc = p9_xip_get_section(io_ringSectionBuf, P9_XIP_SECTION_SBE_RINGS, &l_xipRingsSection);
 
-            FAPI_ASSERT( l_rc == 0,
-                         fapi2::XIPC_XIP_API_MISC_ERROR().
+            FAPI_ASSERT( l_rc == INFRASTRUCT_RC_SUCCESS,
+                         fapi2::XIPC_XIP_GET_SECTION_ERROR().
                          set_CHIP_TARGET(i_procTarget).
                          set_XIP_RC(l_rc).
-                         set_OCCURRENCE(4),
-                         "p9_xip_get_section() failed (4) getting .rings section w/rc=0x%08X",
-                         (uint32_t)l_rc );
+                         set_DDLEVEL(UNDEFINED_DD_LEVEL).
+                         set_OCCURRENCE(1),
+                         "p9_xip_get_section() failed (1) getting SBE .rings section (ddLevel=0x%x) w/rc=0x%08X",
+                         UNDEFINED_DD_LEVEL, (uint32_t)l_rc );
 
             io_ringSectionBufSize = l_xipRingsSection.iv_size;
 
@@ -2499,54 +2505,77 @@ ReturnCode p9_xip_customize (
 
             l_maxRingSectionSize = io_ringSectionBufSize;
 
-            // Calculate pointer to HW image's .rings section
-            l_rc = p9_xip_get_section(io_image, P9_XIP_SECTION_HW_RINGS, &l_xipRingsSection);
 
-            FAPI_ASSERT( l_rc == 0,
+            // Next, get the DD level specific set of CME/SGPE rings from the HW image.
+            l_fapiRc = FAPI_ATTR_GET_PRIVILEGED(fapi2::ATTR_EC, i_procTarget, attrDdLevel);
+
+            FAPI_ASSERT( l_fapiRc == fapi2::FAPI2_RC_SUCCESS,
+                         fapi2::XIPC_FAPI_ATTR_SVC_FAIL().
+                         set_CHIP_TARGET(i_procTarget).
+                         set_OCCURRENCE(1),
+                         "FAPI_ATTR_GET(ATTR_EC) failed." );
+
+            FAPI_DBG("attrDdLevel (for DD level .rings) = 0x%x", attrDdLevel);
+
+            // Then, determine if there's XIP level DD support in .rings ring section
+            // and fetch the DD level ring section accordingly.
+            l_rc = p9_xip_dd_section_support(io_image, P9_XIP_SECTION_HW_RINGS, &l_bDdSupport);
+
+            FAPI_ASSERT( l_rc == INFRASTRUCT_RC_SUCCESS,
                          fapi2::XIPC_XIP_API_MISC_ERROR().
                          set_CHIP_TARGET(i_procTarget).
                          set_XIP_RC(l_rc).
-                         set_OCCURRENCE(7),
-                         "p9_xip_get_section() failed (7) getting .rings section w/rc=0x%08X",
+                         set_OCCURRENCE(12),
+                         "p9_xip_dd_section_support() failed for .rings w/rc=0x%08x.\n",
                          (uint32_t)l_rc );
 
-            FAPI_ASSERT( l_xipRingsSection.iv_size > 0,
-                         fapi2::XIPC_EMPTY_RING_SECTION().
-                         set_CHIP_TARGET(i_procTarget),
-                         "CME or SGPE ring section size is zero (sysPhase=%d). No TOR. Can't append rings.",
-                         i_sysPhase );
+            if ( l_bDdSupport )
+            {
+                l_xipDdLevel = attrDdLevel;
+            }
+            else
+            {
+                l_xipDdLevel = UNDEFINED_DD_LEVEL;
+            }
 
-            l_hwRingsSection = (void*)((uintptr_t)io_image + l_xipRingsSection.iv_offset);
+            l_rc = p9_xip_get_section(io_image, P9_XIP_SECTION_HW_RINGS, &l_xipRingsSection, l_xipDdLevel);
 
-            // Extract the DD level to enable retrieval of correct CME/SGPE ring blocks
-            l_fapiRc = FAPI_ATTR_GET_PRIVILEGED(fapi2::ATTR_EC, i_procTarget, attrDdLevel);
+            FAPI_ASSERT( l_rc == INFRASTRUCT_RC_SUCCESS,
+                         fapi2::XIPC_XIP_GET_SECTION_ERROR().
+                         set_CHIP_TARGET(i_procTarget).
+                         set_XIP_RC(l_rc).
+                         set_DDLEVEL(l_xipDdLevel).
+                         set_OCCURRENCE(3),
+                         "p9_xip_get_section() failed (3) getting HW .rings section (ddLevel=0x%x) w/rc=0x%08X",
+                         l_xipDdLevel, (uint32_t)l_rc );
 
-            FAPI_ASSERT( l_fapiRc == fapi2::FAPI2_RC_SUCCESS,
-                         fapi2::XIPC_FAPI_ATTR_SVC_FAIL().
+            FAPI_ASSERT( l_xipRingsSection.iv_size > 0,
+                         fapi2::XIPC_EMPTY_RING_SECTION().
                          set_CHIP_TARGET(i_procTarget).
-                         set_OCCURRENCE(1),
-                         "FAPI_ATTR_GET(ATTR_EC) failed." );
+                         set_DDLEVEL(l_xipDdLevel),
+                         "CME or SGPE ring section size is zero (sysPhase=%d, ddLevel=0x%x). No TOR. Can't append rings.",
+                         i_sysPhase, l_xipDdLevel);
 
-            FAPI_DBG("attrDdLevel = 0x%x", attrDdLevel);
+            l_hwRingsSection = (void*)((uintptr_t)io_image + l_xipRingsSection.iv_offset);
 
             //------------------------------------------------------------
             // Get the CME or SGPE block of rings from .rings in HW image
             //------------------------------------------------------------
-            PpeType_t l_PpeType;
+            PpeType_t l_ppeType;
 
             if ( i_sysPhase == SYSPHASE_RT_CME )
             {
-                l_PpeType = PT_CME;
+                l_ppeType = PT_CME;
             }
             else
             {
-                l_PpeType = PT_SGPE;
+                l_ppeType = PT_SGPE;
             }
 
-            FAPI_DBG("Getting the Phase %d block of rings from HW image", l_PpeType);
+            FAPI_DBG("Getting the Phase %d block of rings from HW image", l_ppeType);
             l_rc = tor_get_block_of_rings( l_hwRingsSection,
                                            attrDdLevel,
-                                           l_PpeType,
+                                           l_ppeType,
                                            NOT_VALID,
                                            &io_ringSectionBuf,
                                            io_ringSectionBufSize );
diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_hcode_image_build.C b/src/import/chips/p9/procedures/hwp/pm/p9_hcode_image_build.C
index 1c4aca5e5..2bf6d3031 100644
--- a/src/import/chips/p9/procedures/hwp/pm/p9_hcode_image_build.C
+++ b/src/import/chips/p9/procedures/hwp/pm/p9_hcode_image_build.C
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* OpenPOWER HostBoot Project                                             */
 /*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2015,2017                        */
+/* Contributors Listed Below - COPYRIGHT 2015,2018                        */
 /* [+] International Business Machines Corp.                              */
 /*                                                                        */
 /*                                                                        */
@@ -681,9 +681,9 @@ uint32_t getXipImageSectn( uint8_t * i_srcPtr, uint8_t i_secId, uint8_t i_ecLeve
     uint32_t rc = IMG_BUILD_SUCCESS;
     do
     {
-        bool ecLvlSupported = false;
+        myBoolean_t ecLvlSupported = UNDEFINED_BOOLEAN;
 
-        rc = p9_xip_dd_section_support( i_srcPtr, i_secId, ecLvlSupported );
+        rc = p9_xip_dd_section_support( i_srcPtr, i_secId, &ecLvlSupported );
 
         if( rc )
         {
diff --git a/src/import/chips/p9/procedures/xml/error_info/p9_xip_customize_errors.xml b/src/import/chips/p9/procedures/xml/error_info/p9_xip_customize_errors.xml
index c5a55f7d3..d84235a5c 100644
--- a/src/import/chips/p9/procedures/xml/error_info/p9_xip_customize_errors.xml
+++ b/src/import/chips/p9/procedures/xml/error_info/p9_xip_customize_errors.xml
@@ -5,7 +5,7 @@
 <!--                                                                        -->
 <!-- OpenPOWER HostBoot Project                                             -->
 <!--                                                                        -->
-<!-- Contributors Listed Below - COPYRIGHT 2016,2017                        -->
+<!-- Contributors Listed Below - COPYRIGHT 2016,2018                        -->
 <!-- [+] International Business Machines Corp.                              -->
 <!--                                                                        -->
 <!--                                                                        -->
@@ -219,6 +219,19 @@
   </hwpError>
   <!-- ********************************************************************* -->
   <hwpError>
+    <rc>RC_XIPC_XIP_GET_SECTION_ERROR</rc>
+    <description>p9_xip_get_section() failed getting an XIP section or a sub-section within an XIP section</description>
+    <ffdc>CHIP_TARGET</ffdc>
+    <ffdc>XIP_RC</ffdc>
+    <ffdc>DDLEVEL</ffdc>
+    <ffdc>OCCURRENCE</ffdc>
+    <callout>
+      <procedure>CODE</procedure>
+      <priority>HIGH</priority>
+    </callout>
+  </hwpError>
+  <!-- ********************************************************************* -->
+  <hwpError>
     <rc>RC_XIPC_XIP_API_MISC_ERROR</rc>
     <description>An XIP API call failed with a non-categorized error</description>
     <ffdc>CHIP_TARGET</ffdc>
@@ -234,6 +247,7 @@
     <rc>RC_XIPC_EMPTY_RING_SECTION</rc>
     <description>The ring section size is zero. No TOR. Can't append rings</description>
     <ffdc>CHIP_TARGET</ffdc>
+    <ffdc>DDLEVEL</ffdc>
     <callout>
       <procedure>CODE</procedure>
       <priority>HIGH</priority>
diff --git a/src/import/chips/p9/utils/imageProcs/p9_tor.C b/src/import/chips/p9/utils/imageProcs/p9_tor.C
index b589ad9cc..eaf0b415a 100644
--- a/src/import/chips/p9/utils/imageProcs/p9_tor.C
+++ b/src/import/chips/p9/utils/imageProcs/p9_tor.C
@@ -297,6 +297,7 @@ int tor_access_ring(  void*           i_ringSection,     // Ring section ptr
     int rc = 0;
     uint32_t       torMagic;
     TorHeader_t*   torHeader;
+#ifdef TORV3_SUPPORT
     TorDdBlock_t*  torDdBlock;
     uint32_t ddLevelCount = 0;
     uint32_t ddLevelOffset = 0;
@@ -304,7 +305,8 @@ int tor_access_ring(  void*           i_ringSection,     // Ring section ptr
     void*    ddBlockStart = NULL;
     uint8_t  bDdCheck = 0;
     uint32_t ddLevel = 0;
-
+#endif
+    uint8_t* postHeaderStart = (uint8_t*)i_ringSection + sizeof(TorHeader_t);
 
     if (i_dbgl > 1)
     {
@@ -314,7 +316,9 @@ int tor_access_ring(  void*           i_ringSection,     // Ring section ptr
     torHeader = (TorHeader_t*)i_ringSection;
     torMagic = be32toh(torHeader->magic);
 
-    if (torMagic == TOR_MAGIC_HW)
+#ifdef TORV3_SUPPORT
+
+    if (torMagic == TOR_MAGIC_HW && torHeader->version < 5)
     {
 
         ddLevelCount = torHeader->numDdLevels;
@@ -374,31 +378,53 @@ int tor_access_ring(  void*           i_ringSection,     // Ring section ptr
     }
     else
     {
+#endif
+
         if ( i_ddLevel != torHeader->ddLevel &&
              i_ddLevel != UNDEFINED_DD_LEVEL )
         {
-            MY_ERR("Requested DD level (=0x%x) doesn't match TOR header DD level (=0x%x) nor UNDEFINED_DD_LEVEL\n",
-                   i_ddLevel, torHeader->ddLevel);
+            MY_ERR("Requested DD level (=0x%x) doesn't match TOR header DD level (=0x%x) nor UNDEFINED_DD_LEVEL (=0x%x) \n",
+                   i_ddLevel, torHeader->ddLevel, UNDEFINED_DD_LEVEL);
             return TOR_DD_LEVEL_NOT_FOUND;
         }
+
+#ifdef TORV3_SUPPORT
     }
 
+#endif
+
     if ( ( i_ringBlockType == GET_SINGLE_RING ) ||   // All Magics supported for GET
          ( i_ringBlockType == PUT_SINGLE_RING  &&    // Can only append to SBE,CME,SGPE
            ( torMagic == TOR_MAGIC_SBE ||
              torMagic == TOR_MAGIC_CME ||
              torMagic == TOR_MAGIC_SGPE ) ) )
     {
+        void* l_ringSection = i_ringSection;
+
         if ( torMagic == TOR_MAGIC_HW )
         {
-            // Update i_ringSection:
-            // Extract the offset to the specified ppeType's ring section TOR header and update i_ringSection
+            // Update l_ringSection:
+            // Extract the offset to the specified ppeType's ring section TOR header and update l_ringSection
             TorPpeBlock_t*  torPpeBlock;
-            torPpeBlock = (TorPpeBlock_t*)((uint8_t*)ddBlockStart + i_ppeType * sizeof(TorPpeBlock_t));
-            i_ringSection = (void*)((uint8_t*)ddBlockStart + be32toh(torPpeBlock->offset));
+#ifdef TORV3_SUPPORT
+
+            if (torHeader->version < 5)
+            {
+                torPpeBlock = (TorPpeBlock_t*)((uint8_t*)ddBlockStart + i_ppeType * sizeof(TorPpeBlock_t));
+                l_ringSection = (void*)((uint8_t*)ddBlockStart + be32toh(torPpeBlock->offset));
+            }
+            else
+            {
+#endif
+                torPpeBlock = (TorPpeBlock_t*)(postHeaderStart + i_ppeType * sizeof(TorPpeBlock_t));
+                l_ringSection = (void*)(postHeaderStart + be32toh(torPpeBlock->offset));
+#ifdef TORV3_SUPPORT
+            }
+
+#endif
         }
 
-        rc =  get_ring_from_ring_section( i_ringSection,
+        rc =  get_ring_from_ring_section( l_ringSection,
                                           i_ringId,
                                           i_ringVariant,
                                           io_instanceId,
@@ -410,8 +436,11 @@ int tor_access_ring(  void*           i_ringSection,     // Ring section ptr
 
         return rc;
     }
+
+#ifdef TORV3_SUPPORT
     else if ( i_ringBlockType == GET_DD_LEVEL_RINGS &&
-              torMagic == TOR_MAGIC_HW )
+              torMagic == TOR_MAGIC_HW &&
+              torHeader->version < 5 )
     {
         if (io_ringBlockSize >= ddBlockSize)
         {
@@ -438,6 +467,8 @@ int tor_access_ring(  void*           i_ringSection,     // Ring section ptr
             return TOR_BUFFER_TOO_SMALL;
         }
     }
+
+#endif
     else if ( i_ringBlockType == GET_PPE_LEVEL_RINGS &&
               torMagic == TOR_MAGIC_HW &&
               (i_ppeType == PT_SBE || i_ppeType == PT_CME || i_ppeType == PT_SGPE) )
@@ -445,14 +476,42 @@ int tor_access_ring(  void*           i_ringSection,     // Ring section ptr
         TorPpeBlock_t*  torPpeBlock;
         uint32_t ppeSize;
 
-        torPpeBlock = (TorPpeBlock_t*)((uint8_t*)ddBlockStart + i_ppeType * sizeof(TorPpeBlock_t));
+#ifdef TORV3_SUPPORT
+
+        if (torHeader->version < 5)
+        {
+            torPpeBlock = (TorPpeBlock_t*)((uint8_t*)ddBlockStart + i_ppeType * sizeof(TorPpeBlock_t));
+        }
+        else
+        {
+#endif
+            torPpeBlock = (TorPpeBlock_t*)(postHeaderStart + i_ppeType * sizeof(TorPpeBlock_t));
+#ifdef TORV3_SUPPORT
+        }
+
+#endif
         ppeSize = be32toh(torPpeBlock->size);
 
         if (io_ringBlockSize >= ppeSize)
         {
-            memcpy( (uint8_t*)(*io_ringBlockPtr),
-                    (uint8_t*)ddBlockStart + be32toh(torPpeBlock->offset),
-                    ppeSize );
+#ifdef TORV3_SUPPORT
+
+            if (torHeader->version < 5)
+            {
+                memcpy( (uint8_t*)(*io_ringBlockPtr),
+                        (uint8_t*)ddBlockStart + be32toh(torPpeBlock->offset),
+                        ppeSize );
+            }
+            else
+            {
+#endif
+                memcpy( (uint8_t*)(*io_ringBlockPtr),
+                        postHeaderStart + be32toh(torPpeBlock->offset),
+                        ppeSize );
+#ifdef TORV3_SUPPORT
+            }
+
+#endif
             io_ringBlockSize = ppeSize;
 
             return TOR_SUCCESS;
@@ -572,7 +631,10 @@ int tor_get_block_of_rings ( void*           i_ringSection,     // Ring section
 
     if ( torMagic == TOR_MAGIC_HW && chipType != CT_CEN )
     {
-        if (i_ppeType == NUM_PPE_TYPES)
+#ifdef TORV3_SUPPORT
+
+        if ( i_ppeType == NUM_PPE_TYPES &&
+             torHeader->version < 5 )
         {
             // Get DD level block of rings
             rc = tor_access_ring( i_ringSection,
@@ -587,27 +649,28 @@ int tor_get_block_of_rings ( void*           i_ringSection,     // Ring section
                                   i_ringName,
                                   i_dbgl );
         }
-        else if (i_ppeType == PT_SBE || i_ppeType == PT_CME || i_ppeType == PT_SGPE)
-        {
-            // Get block of rings specific to a PPE type
-            rc = tor_access_ring( i_ringSection,
-                                  UNDEFINED_RING_ID,
-                                  i_ddLevel,
-                                  i_ppeType,
-                                  i_ringVariant,
-                                  l_instanceId,
-                                  GET_PPE_LEVEL_RINGS,
-                                  io_ringBlockPtr,
-                                  io_ringBlockSize,
-                                  i_ringName,
-                                  i_dbgl );
-
-        }
         else
-        {
-            MY_ERR("tor_get_block_of_rings(): Ambiguous API parameters\n");
-            return TOR_AMBIGUOUS_API_PARMS;
-        }
+#endif
+            if (i_ppeType == PT_SBE || i_ppeType == PT_CME || i_ppeType == PT_SGPE)
+            {
+                // Get specific PPE block of rings
+                rc = tor_access_ring( i_ringSection,
+                                      UNDEFINED_RING_ID,
+                                      i_ddLevel,
+                                      i_ppeType,
+                                      i_ringVariant,
+                                      l_instanceId,
+                                      GET_PPE_LEVEL_RINGS,
+                                      io_ringBlockPtr,
+                                      io_ringBlockSize,
+                                      i_ringName,
+                                      i_dbgl );
+            }
+            else
+            {
+                MY_ERR("tor_get_block_of_rings(): Ambiguous API parameters\n");
+                return TOR_AMBIGUOUS_API_PARMS;
+            }
     }
     else
     {
diff --git a/src/import/chips/p9/utils/imageProcs/p9_tor.H b/src/import/chips/p9/utils/imageProcs/p9_tor.H
index cd23d4cc3..352543420 100644
--- a/src/import/chips/p9/utils/imageProcs/p9_tor.H
+++ b/src/import/chips/p9/utils/imageProcs/p9_tor.H
@@ -30,10 +30,12 @@
 // Different options to extract data using tor_access_ring API
 typedef enum RingBlockType
 {
-    GET_SINGLE_RING      = 0x00,
-    GET_DD_LEVEL_RINGS   = 0x01,
-    GET_PPE_LEVEL_RINGS  = 0x02,
-    PUT_SINGLE_RING      = 0x03
+    GET_SINGLE_RING     = 0x00,
+#ifdef TORV3_SUPPORT
+    GET_DD_LEVEL_RINGS  = 0x01,
+#endif
+    GET_PPE_LEVEL_RINGS = 0x02,
+    PUT_SINGLE_RING     = 0x03
 } RingBlockType_t;
 
 ///
@@ -67,7 +69,6 @@ typedef enum RingBlockType
 /// \param[in] i_RingVariant  A enum to indicate type of operation performed
 /// by TOR API Option:
 /// GET_SINGLE_RING indicates to extract single ring container.
-/// GET_DD_LEVEL_RINGS indicates to extract specific DD level TOR and rings
 /// GET_PPE_LEVEL_RINGS indcates to extract specific PPE level TOR and rings
 /// PUT_SINGLE_RING indicates to extract ring absolute memory addres for
 /// ringTorSlot location
@@ -97,13 +98,6 @@ typedef enum RingBlockType
 /// \a io_ringBlockPtr contains RS4 container \a io_ringBlockSize contains size
 /// of data copied into io_ringBlockPtr. \a o_ringName returns ring string name.
 ///
-/// GET_DD_LEVEL_RINGS (\a i_ringVariant) - traverse on \a i_ringSection
-/// buffer based on \a i_ddLevel which gives dd spec (used only for HW image
-/// /optional  for other image) On return, \a io_ringBlockPtr contains DD level
-/// specific ring section and \a io_ringBlockSize contains size of the data
-/// copied into io_ringBlockPtr. \a Other params are optional.
-/// This ringVariant works on HW image.
-///
 /// GET_PPE_LEVEL_RINGS (\a i_ringVariant) - traverse on \a i_ringSection
 /// buffer based on \a i_ppeType which gives ppe type info  and \a i_ddLevel which
 /// gives dd spec used only for HW image/optional for other image) On return,
diff --git a/src/import/chips/p9/xip/p9_xip_image.C b/src/import/chips/p9/xip/p9_xip_image.C
index d02186782..fd0606e40 100644
--- a/src/import/chips/p9/xip/p9_xip_image.C
+++ b/src/import/chips/p9/xip/p9_xip_image.C
@@ -45,12 +45,10 @@
     #include <stdint.h>
     #include <endian.h>
 #endif
-#ifndef __PPE__
-    #include "p9_dd_container.h"
-#endif
 #include <stdlib.h>
 #include <string.h>
 #include "p9_xip_image.h"
+#include "p9_dd_container.h"
 
 ////////////////////////////////////////////////////////////////////////////
 // Local Functions
@@ -164,7 +162,7 @@ dumpSectionTable(const void* i_image)
 
     for (i = 0; i < P9_XIP_SECTIONS; i++)
     {
-        rc = p9_xip_get_section(i_image, i, &section);
+        rc = p9_xip_get_section(i_image, i, &section, UNDEFINED_DD_LEVEL);
 
         if (rc)
         {
@@ -615,7 +613,7 @@ xipImage2Section(const void* i_image,
 
         for (sectionId = 0; sectionId < P9_XIP_SECTIONS; sectionId++)
         {
-            rc = p9_xip_get_section(i_image, sectionId, &section);
+            rc = p9_xip_get_section(i_image, sectionId, &section, UNDEFINED_DD_LEVEL);
 
             if (rc)
             {
@@ -687,7 +685,7 @@ xipDeleteLastSection(void* io_image,
             break;
         }
 
-        rc = p9_xip_get_section(io_image, final, &section);
+        rc = p9_xip_get_section(io_image, final, &section, UNDEFINED_DD_LEVEL);
 
         if (rc)
         {
@@ -720,7 +718,7 @@ p9_xip_get_toc(void* i_image,
 
     do
     {
-        rc = p9_xip_get_section(i_image, P9_XIP_SECTION_TOC, &tocSection);
+        rc = p9_xip_get_section(i_image, P9_XIP_SECTION_TOC, &tocSection, UNDEFINED_DD_LEVEL);
 
         if (rc)
         {
@@ -728,7 +726,7 @@ p9_xip_get_toc(void* i_image,
         }
 
         rc = p9_xip_get_section(i_image, P9_XIP_SECTION_STRINGS,
-                                &stringsSection);
+                                &stringsSection, UNDEFINED_DD_LEVEL);
 
         if (rc)
         {
@@ -1174,7 +1172,7 @@ xipDecodeToc(void* i_image,
         o_item->iv_type = hostToc.iv_type;
         o_item->iv_elements = hostToc.iv_elements;
 
-        p9_xip_get_section(i_image, P9_XIP_SECTION_STRINGS, &stringsSection);
+        p9_xip_get_section(i_image, P9_XIP_SECTION_STRINGS, &stringsSection, UNDEFINED_DD_LEVEL);
         o_item->iv_id =
             (char*)i_image + stringsSection.iv_offset + hostToc.iv_id;
 
@@ -1184,7 +1182,7 @@ xipDecodeToc(void* i_image,
         // even though the section has been removed from the image, so this
         // case needs to be covered.
 
-        rc = p9_xip_get_section(i_image, hostToc.iv_section, &dataSection);
+        rc = p9_xip_get_section(i_image, hostToc.iv_section, &dataSection, UNDEFINED_DD_LEVEL);
 
         if (rc)
         {
@@ -1237,7 +1235,7 @@ p9_xip_decode_toc_dump(void* i_image, void* i_dump,
     o_item->iv_type = hostToc.iv_type;
     o_item->iv_elements = hostToc.iv_elements;
 
-    p9_xip_get_section(i_image, P9_XIP_SECTION_STRINGS, &stringsSection);
+    p9_xip_get_section(i_image, P9_XIP_SECTION_STRINGS, &stringsSection, UNDEFINED_DD_LEVEL);
     o_item->iv_id =
         (char*)i_image + stringsSection.iv_offset + hostToc.iv_id;
 
@@ -1355,7 +1353,7 @@ xipGetFixedToc(void* io_image,
     int rc;
     P9XipSection section;
 
-    rc = p9_xip_get_section(io_image, P9_XIP_SECTION_FIXED_TOC, &section);
+    rc = p9_xip_get_section(io_image, P9_XIP_SECTION_FIXED_TOC, &section, UNDEFINED_DD_LEVEL);
 
     if (!rc)
     {
@@ -1429,7 +1427,7 @@ xipFixedFind(void* i_image, const char* i_id, P9XipItem* o_item)
         o_item->iv_type = toc->iv_type;
         o_item->iv_elements = toc->iv_elements;
 
-        rc = p9_xip_get_section(i_image, P9_XIP_SECTION_FIXED, &fixedSection);
+        rc = p9_xip_get_section(i_image, P9_XIP_SECTION_FIXED, &fixedSection, UNDEFINED_DD_LEVEL);
 
         if (rc)
         {
@@ -1541,7 +1539,7 @@ xipHeaderFind(void* i_image, const char* i_id, P9XipItem* o_item)
         o_item->iv_elements = 1; /* True for now... */
 
         rc = p9_xip_get_section(i_image, P9_XIP_SECTION_HEADER,
-                                &headerSection);
+                                &headerSection, UNDEFINED_DD_LEVEL);
 
         if (rc)
         {
@@ -1982,7 +1980,7 @@ p9_xip_normalize(void* io_image)
 
         for (i = 0; i < P9_XIP_SECTIONS; i++)
         {
-            rc = p9_xip_get_section(io_image, i, &section);
+            rc = p9_xip_get_section(io_image, i, &section, UNDEFINED_DD_LEVEL);
 
             if (rc)
             {
@@ -2025,27 +2023,6 @@ p9_xip_image_size(void* io_image, uint32_t* o_size)
 }
 
 
-#if defined(__PPE__)
-int
-p9_xip_get_section(const void* i_image,
-                   const int i_sectionId,
-                   P9XipSection* o_hostSection)
-{
-    int rc;
-    P9XipSection* imageSection;
-
-    rc = xipGetSectionPointer(i_image, i_sectionId, &imageSection);
-
-    if (!rc)
-    {
-        xipTranslateSection(o_hostSection, imageSection);
-    }
-
-    return rc;
-}
-
-#else
-
 int
 p9_xip_get_section(const void* i_image,
                    const int i_sectionId,
@@ -2117,7 +2094,6 @@ p9_xip_get_section(const void* i_image,
 
     return rc;
 }
-#endif
 
 
 // If the 'big' TOC is not present, search the mini-TOCs that only index the
@@ -2623,7 +2599,7 @@ p9_xip_delete_section(void* io_image,
         // the final section of the image. Update the sizes and re-establish
         // the final image alignment.
 
-        rc = p9_xip_get_section(io_image, i_sectionId, &section);
+        rc = p9_xip_get_section(io_image, i_sectionId, &section, UNDEFINED_DD_LEVEL);
 
         if (rc)
         {
@@ -2722,7 +2698,7 @@ p9_xip_delete_section(void* io_image,
             {
 
                 orderIdx--;
-                rc = p9_xip_get_section(o_imageBuf, sectionOrder[orderIdx], &section);
+                rc = p9_xip_get_section(o_imageBuf, sectionOrder[orderIdx], &section, UNDEFINED_DD_LEVEL);
 
                 if (rc)
                 {
@@ -2788,7 +2764,7 @@ p9_xip_duplicate_section(const void* i_image,
             break;
         }
 
-        rc = p9_xip_get_section(i_image, i_sectionId, &section);
+        rc = p9_xip_get_section(i_image, i_sectionId, &section, UNDEFINED_DD_LEVEL);
 
         if (rc)
         {
@@ -2865,7 +2841,7 @@ p9_xip_append(void* io_image,
             break;
         }
 
-        rc = p9_xip_get_section(io_image, i_sectionId, &section);
+        rc = p9_xip_get_section(io_image, i_sectionId, &section, UNDEFINED_DD_LEVEL);
 
         if (rc)
         {
@@ -3016,7 +2992,7 @@ p9_xip_section2image(const void* i_image,
             break;
         }
 
-        rc = p9_xip_get_section(i_image, i_sectionId, &section);
+        rc = p9_xip_get_section(i_image, i_sectionId, &section, UNDEFINED_DD_LEVEL);
 
         if (rc)
         {
@@ -3257,33 +3233,28 @@ p9_xip_map_toc(void* io_image,
 }
 
 
-#if !defined(__PPE__)
 //
 // Inform caller if specified sectionId has DD support
 //
 int p9_xip_dd_section_support(const void* i_image,
                               const int i_sectionId,
-                              bool& o_bDdSupport)
+                              myBoolean_t* o_bDdSupport)
 {
     int rc;
     P9XipSection section;
 
-    rc = p9_xip_get_section(i_image, i_sectionId, &section);
+    rc = p9_xip_get_section(i_image, i_sectionId, &section, UNDEFINED_DD_LEVEL);
 
     if (!rc)
     {
-        if (section.iv_ddSupport == 0 || section.iv_ddSupport == 1)
-        {
-            o_bDdSupport = (bool)section.iv_ddSupport;
-        }
-        else
+        *o_bDdSupport = (myBoolean_t)section.iv_ddSupport;
+
+        if (section.iv_ddSupport != true && section.iv_ddSupport != false)
         {
             // iv_ddSupport is uninitialized or corrupted
-            o_bDdSupport = false;
             rc = P9_XIP_IMAGE_ERROR;
         }
     }
 
     return rc;
 }
-#endif
diff --git a/src/import/chips/p9/xip/p9_xip_image.h b/src/import/chips/p9/xip/p9_xip_image.h
index f92306339..494216464 100644
--- a/src/import/chips/p9/xip/p9_xip_image.h
+++ b/src/import/chips/p9/xip/p9_xip_image.h
@@ -707,10 +707,10 @@ p9_xip_image_size(void* i_image, uint32_t* o_size);
 int
 p9_xip_get_section(const void* i_image,
                    const int i_sectionId,
+                   P9XipSection* o_hostSection,
 #if defined(__PPE__)
-                   P9XipSection* o_hostSection);
+                   uint8_t i_ddLevel);
 #else
-                   P9XipSection* o_hostSection,
                    uint8_t i_ddLevel=UNDEFINED_DD_LEVEL);
 #endif
 
@@ -1388,12 +1388,10 @@ p9_xip_get_toc(void* i_image,
 /// \retval 0 Success
 ///
 /// \retval non-0 See \ref p9_xip_image_errors
-#if !defined(__PPE__)
 int
 p9_xip_dd_section_support(const void* i_image,
                           const int i_sectionId,
-                          bool& o_bDdSupport);
-#endif
+                          myBoolean_t* o_bDdSupport);
 
 
 /// \brief Decode a TOC entry from dump file