Obus Power Up & Flywheel Controls

- Power Up Lanes
- Power Up Clock Distributions
- Toggle Flywheel During Rx DcCal
- Updated Wrapper Print

Change-Id: Iacd7c51ccb8491a21732074f4b63e79b2cd0aaf5
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/45479
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Gary A. Peterson <garyp@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Richard J. Knight <rjknight@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/45487
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>

2 files changed, 122 insertions, 12 deletions

diff --git a/src/import/chips/p9/procedures/hwp/io/p9_io_obus_dccal.C b/src/import/chips/p9/procedures/hwp/io/p9_io_obus_dccal.C
index 4627435c2..1f109150d 100644
--- a/src/import/chips/p9/procedures/hwp/io/p9_io_obus_dccal.C
+++ b/src/import/chips/p9/procedures/hwp/io/p9_io_obus_dccal.C
@@ -545,6 +545,98 @@ fapi_try_exit:
     return fapi2::current_err;
 }
 
+/**
+ * @brief A I/O Obus Procedure that powers up the unit
+ * on every instance of the OBUS.
+ * @param[in] i_tgt         FAPI2 Target
+ * @param[in] i_lave_vector Lanve Vector
+ * @retval ReturnCode
+ */
+fapi2::ReturnCode obus_powerup( const OBUS_TGT i_tgt, const uint32_t i_lane_vector )
+{
+    FAPI_IMP( "obus_powerup: I/O Obus Entering" );
+
+    const uint8_t GRP0  = 0;
+    const uint8_t LANES = 24;
+
+    // Power up Per-Group Registers
+    FAPI_TRY( io::rmw( OPT_RX_CLKDIST_PDWN, i_tgt, GRP0, 0, 0 ) );
+    FAPI_TRY( io::rmw( OPT_TX_CLKDIST_PDWN, i_tgt, GRP0, 0, 0 ) );
+    FAPI_TRY( io::rmw( OPT_RX_IREF_PDWN_B, i_tgt, GRP0, 0, 1 ) );
+    FAPI_TRY( io::rmw( OPT_RX_CTL_DATASM_CLKDIST_PDWN, i_tgt, GRP0, 0, 0 ) );
+
+    // Power up Per-Lane Registers
+    for( uint8_t lane = 0; lane < LANES; ++lane )
+    {
+        if( ( (0x1 << lane) & i_lane_vector ) != 0 )
+        {
+            FAPI_TRY( io::rmw( OPT_RX_LANE_ANA_PDWN, i_tgt, GRP0, lane, 0 ) );
+            FAPI_TRY( io::rmw( OPT_RX_LANE_DIG_PDWN, i_tgt, GRP0, lane, 0 ) );
+            FAPI_TRY( io::rmw( OPT_TX_LANE_PDWN    , i_tgt, GRP0, lane, 0 ) );
+        }
+    }
+
+fapi_try_exit:
+    FAPI_IMP( "obus_powerup: I/O Obus Exiting" );
+    return fapi2::current_err;
+}
+
+/**
+ * @brief A I/O Set Obus Flywheel
+ * on every instance of the OBUS.
+ * @param[in] i_tgt         FAPI2 Target
+ * @param[in] i_lave_vector Lanve Vector
+ * @retval ReturnCode
+ */
+fapi2::ReturnCode set_obus_flywheel_off( const OBUS_TGT i_tgt, const uint32_t i_lane_vector, const uint8_t i_data )
+{
+    FAPI_IMP( "set_obus_flywheel_off: I/O Obus Entering" );
+    const uint8_t GRP0  = 0;
+    const uint8_t LANES = 24;
+
+    // Power up Per-Lane Registers
+    for( uint8_t lane = 0; lane < LANES; ++lane )
+    {
+        if( ( (0x1 << lane) & i_lane_vector ) != 0 )
+        {
+            FAPI_TRY( io::rmw( OPT_RX_PR_FW_OFF, i_tgt, GRP0, lane, i_data ) );
+        }
+    }
+
+fapi_try_exit:
+    FAPI_IMP( "set_obus_flywheel_off: I/O Obus Exiting" );
+    return fapi2::current_err;
+}
+
+/**
+ * @brief A I/O Set Obus Flywheel
+ * on every instance of the OBUS.
+ * @param[in] i_tgt         FAPI2 Target
+ * @param[in] i_lave_vector Lanve Vector
+ * @retval ReturnCode
+ */
+fapi2::ReturnCode set_obus_pr_edge_track_cntl( const OBUS_TGT i_tgt, const uint32_t i_lane_vector,
+        const uint8_t i_data )
+{
+    FAPI_IMP( "set_obus_edge_track_cntl: I/O Obus Entering" );
+    const uint8_t GRP0  = 0;
+    const uint8_t LANES = 24;
+
+    // Power up Per-Lane Registers
+    for( uint8_t lane = 0; lane < LANES; ++lane )
+    {
+        if( ( (0x1 << lane) & i_lane_vector ) != 0 )
+        {
+            FAPI_TRY( io::rmw( OPT_RX_PR_EDGE_TRACK_CNTL, i_tgt, GRP0, lane, i_data ) );
+        }
+    }
+
+fapi_try_exit:
+    FAPI_IMP( "set_obus_pr_edge_track_cntl: I/O Obus Exiting" );
+    return fapi2::current_err;
+}
+
+
 
 /**
  * @brief A I/O Obus Procedure that runs Rx Dccal and Tx Z Impedance calibration
@@ -563,21 +655,25 @@ fapi2::ReturnCode p9_io_obus_dccal( const OBUS_TGT i_tgt, const uint32_t i_lane_
 
     FAPI_TRY( FAPI_ATTR_GET( fapi2::ATTR_IO_OBUS_DCCAL_FLAGS, i_tgt, dccal_flags ) );
 
-    if( ( dccal_flags & fapi2::ENUM_ATTR_IO_OBUS_DCCAL_FLAGS_TX ) == 0 )
-    {
-        FAPI_TRY( tx_run_zcal( i_tgt ), "I/O Obus Tx Run Z-Cal Failed" );
-        FAPI_DBG( "I/O Obus Tx Zcal State Machine Successful." );
-        dccal_flags |= fapi2::ENUM_ATTR_IO_OBUS_DCCAL_FLAGS_TX;
-        FAPI_TRY( FAPI_ATTR_SET( fapi2::ATTR_IO_OBUS_DCCAL_FLAGS, i_tgt, dccal_flags ) );
-    }
-    else
-    {
-        FAPI_DBG( "I/O Obus Tx Zcal State Machine Previously Ran." );
-    }
+    // Power up Clock Distribution & Lanes
+    FAPI_TRY( obus_powerup( i_tgt, i_lane_vector ) );
+
+    // Run Tx Zcal State Machine
+    FAPI_TRY( tx_run_zcal( i_tgt ), "I/O Obus Tx Run Z-Cal Failed" );
+    FAPI_DBG( "I/O Obus Tx Zcal State Machine Successful." );
+
+    // Set that the state machine successfully finished.
+    dccal_flags |= fapi2::ENUM_ATTR_IO_OBUS_DCCAL_FLAGS_TX;
+    FAPI_TRY( FAPI_ATTR_SET( fapi2::ATTR_IO_OBUS_DCCAL_FLAGS, i_tgt, dccal_flags ) );
 
+    // Apply Tx FFE Values
     FAPI_TRY( tx_set_zcal_ffe( i_tgt ), "I/O Obus Tx Set Z-Cal FFE Failed" );
     FAPI_DBG( "I/O Obus Tx Zcal Successful." );
 
+    // Turn Phase Rotator Fly Wheel Off
+    FAPI_TRY( set_obus_flywheel_off( i_tgt, i_lane_vector, 1 ) );
+
+    // Run Rx Dc Calibration
     FAPI_TRY( set_rx_run_dccal( i_tgt, i_lane_vector, 1 ), "Starting Rx Dccal Failed" );
     FAPI_TRY( rx_poll_dccal_done( i_tgt, i_lane_vector ), "I/O Obus Rx Dccal Poll Failed" );
     FAPI_TRY( set_rx_run_dccal( i_tgt, i_lane_vector, 0 ), "Stopping Rx Dccal Failed" );
@@ -586,6 +682,12 @@ fapi2::ReturnCode p9_io_obus_dccal( const OBUS_TGT i_tgt, const uint32_t i_lane_
     FAPI_TRY( FAPI_ATTR_SET( fapi2::ATTR_IO_OBUS_DCCAL_FLAGS, i_tgt, dccal_flags ) );
     FAPI_DBG( "I/O Obus Rx Dccal Successful." );
 
+    // Turn Phase Rotator Fly Wheel On
+    FAPI_TRY( set_obus_flywheel_off( i_tgt, i_lane_vector, 0 ) );
+    FAPI_TRY( set_obus_pr_edge_track_cntl( i_tgt, i_lane_vector, 0 ) );
+
+
+
 fapi_try_exit:
     FAPI_IMP( "p9_io_obus_dccal: I/O Obus Exiting" );
     return fapi2::current_err;
diff --git a/src/import/chips/p9/procedures/hwp/io/p9_io_regs.H b/src/import/chips/p9/procedures/hwp/io/p9_io_regs.H
index 370a0c995..ba82da849 100644
--- a/src/import/chips/p9/procedures/hwp/io/p9_io_regs.H
+++ b/src/import/chips/p9/procedures/hwp/io/p9_io_regs.H
@@ -65,7 +65,15 @@
 #define OPT_RX_DCCAL_DONE                                  0x800328000000003f, 49,  1 // on-die dc training complete on given lane
 #define OPT_RX_B_BANK_CONTROLS                             0x800008000000003f, 58,  6 // power down pins, 0=cml2cmos, 1=ctle, 2=dac, 3=deserializer, 4=integrator, 5=phase rotator
 #define OPT_IORESET_HARD_BUS0                              0x0000000000000020,  2,  1 // io hard reset per-bus and gcr reset
-
+#define OPT_RX_CLKDIST_PDWN                                0x800810000000003f, 48,  3
+#define OPT_TX_CLKDIST_PDWN                                0x800C14000000003f, 48,  3
+#define OPT_RX_IREF_PDWN_B                                 0x8008C0000000003f, 54, 1
+#define OPT_RX_CTL_DATASM_CLKDIST_PDWN                     0x800B80000000003f, 60, 1
+#define OPT_RX_LANE_ANA_PDWN                               0x800008000000003f, 54, 1
+#define OPT_RX_LANE_DIG_PDWN                               0x800220000000003f, 48, 1
+#define OPT_TX_LANE_PDWN                                   0x800404000000003f, 48, 1
+#define OPT_RX_PR_FW_OFF                                   0x800228000000003f, 56, 1
+#define OPT_RX_PR_EDGE_TRACK_CNTL                          0x800248000000003f, 48, 2
 
 #define EDIP_RX_FIR_RESET                                  0x800ab0000000003f, 63,  1 // fir reset\r\n\ttoggle this field 0->1->0 to reset all rx fir related latches including the isolation and parity error latches.
 #define EDIP_TX_ZCAL_REQ                                   0x800f04000000003f, 49,  1 // impedance calibration sequence enable\r\n\t rising edge initiates calibration seqeunce and clears all status. tx_zcal_done indicates completion and valid results available(default)\r\n\t0:(disabled) inactive. must be set prior to enable. \r\n\t1:(enabled) enable.