Use SBE for scoms to slave chips

Change-Id: I31a33c62ae502d8045882a1a4df5bcaf9f2f34ac
RTC:132655
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/23785
Tested-by: Jenkins Server
Reviewed-by: Andrew J. Geissler <andrewg@us.ibm.com>
Tested-by: FSP CI Jenkins
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>

13 files changed, 181 insertions, 31 deletions

diff --git a/src/usr/intr/intrrp.C b/src/usr/intr/intrrp.C
index 196dd4aee..e4abde595 100644
--- a/src/usr/intr/intrrp.C
+++ b/src/usr/intr/intrrp.C
@@ -1731,6 +1731,7 @@ errlHndl_t IntrRp::findProcs_Cores(TARGETING::TargetHandleList & o_procs,
                     ScomSwitches l_switches =
                                      (*proc)->getAttr<ATTR_SCOM_SWITCHES>();
 
+                    l_switches.useSbeScom = 0;
                     l_switches.useFsiScom = 0;
                     l_switches.useXscom = 1;
 
diff --git a/src/usr/isteps/istep10/call_proc_build_smp.C b/src/usr/isteps/istep10/call_proc_build_smp.C
index 0d3cf18b2..374ddb6d2 100644
--- a/src/usr/isteps/istep10/call_proc_build_smp.C
+++ b/src/usr/isteps/istep10/call_proc_build_smp.C
@@ -228,7 +228,7 @@ void* call_proc_build_smp (void *io_pArgs)
         }
 
         // At the point where we can now change the proc chips to use
-        // XSCOM rather than FSISCOM which is the default.
+        // XSCOM rather than SBESCOM which is the default.
 
         TARGETING::TargetHandleList procChips;
         getAllChips(procChips, TYPE_PROC);
@@ -248,16 +248,16 @@ void* call_proc_build_smp (void *io_pArgs)
                   l_proc_target->getAttr<ATTR_SCOM_SWITCHES>();
 
                 // If Xscom is not already enabled.
-                if ((l_switches.useXscom != 1) || (l_switches.useFsiScom != 0))
+                if ((l_switches.useXscom != 1) || (l_switches.useSbeScom != 0))
                 {
-                    l_switches.useFsiScom = 0;
+                    l_switches.useSbeScom = 0;
                     l_switches.useXscom = 1;
 
-                    // Turn off FSI scom and turn on Xscom.
+                    // Turn off SBE scom and turn on Xscom.
                     l_proc_target->setAttr<ATTR_SCOM_SWITCHES>(l_switches);
 
-                    // Reset the FSI2OPB logic on the new chips
-                    l_errl = FSI::resetPib2Opb(l_proc_target);
+                    // Reset the FSI2OPB logic on the new chips                    
+                    l_errl = FSI::resetPib2Opb(l_proc_target); // An SBE reset equivalent?
                     if(l_errl)
                     {
                         TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
diff --git a/src/usr/scom/scom.C b/src/usr/scom/scom.C
index 3ec60a46c..89a9f89d2 100644
--- a/src/usr/scom/scom.C
+++ b/src/usr/scom/scom.C
@@ -336,11 +336,11 @@ errlHndl_t checkIndirectAndDoScom(DeviceFW::OperationType i_opType,
                 }
                 else
                 {
-                    //Add the callouts for the specific PCB/PIB error
-                    PIB::addFruCallouts( i_target,
-                                         scomout.piberr,
-                                         i_addr,
-                                         l_err );
+                //Add the callouts for the specific PCB/PIB error
+                PIB::addFruCallouts( i_target,
+                                     scomout.piberr,
+                                     i_addr,
+                                     l_err );
                 }
 
                 //Add this target to the FFDC
@@ -556,6 +556,15 @@ errlHndl_t doScomOp(DeviceFW::OperationType i_opType,
                              DEVICE_XSCOM_ADDRESS(i_addr));
             break;
         }
+        else if(scomSetting.useSbeScom)
+        {   //do SBESCOM
+            l_err = deviceOp(i_opType,
+                             i_target,
+                             io_buffer,
+                             io_buflen,
+                             DEVICE_SBEFIFOSCOM_ADDRESS(i_addr));
+            if( l_err ) { break; }
+        }
         else if(scomSetting.useInbandScom)
         {   //do IBSCOM
             l_err = deviceOp(i_opType,
diff --git a/src/usr/scom/test/scomtest.H b/src/usr/scom/test/scomtest.H
index 80a0063b5..d9d8129e1 100644
--- a/src/usr/scom/test/scomtest.H
+++ b/src/usr/scom/test/scomtest.H
@@ -56,7 +56,7 @@ class ScomTest: public CxxTest::TestSuite
 public:
 
   /**
-   * @brief SCOM test via FSISCOM to Venice
+   * @brief SCOM test via FSISCOM
    *
    */
   void test_FSISCOMreadWrite_proc(void)
@@ -1154,6 +1154,141 @@ public:
 */
   }
 
+
+  /**
+   * @brief SCOM test via SBESCOM
+   *
+   */
+  void test_SBESCOMreadWrite_proc(void)
+  {
+      TRACFCOMP( g_trac_scom, "ScomTest::test_SBESCOMreadWrite_proc> Start" );
+
+      uint64_t fails = 0;
+      uint64_t total = 0;
+      errlHndl_t l_err = NULL;
+
+      // Setup some targets to use
+      enum {
+          PROC1,
+          NUM_TARGETS
+      };
+      TARGETING::Target* scom_targets[NUM_TARGETS];
+      for( uint64_t x = 0; x < NUM_TARGETS; x++ )
+      {
+          scom_targets[x] = NULL;
+      }
+
+      // processor target (physical:sys-0/node-0/proc-1)
+      TARGETING::EntityPath epath(TARGETING::EntityPath::PATH_PHYSICAL);
+      epath.addLast(TARGETING::TYPE_SYS,0);
+      epath.addLast(TARGETING::TYPE_NODE,0);
+      epath.addLast(TARGETING::TYPE_PROC,1);
+      scom_targets[PROC1] = TARGETING::targetService().toTarget(epath);
+
+      for( uint64_t x = 0; x < NUM_TARGETS; x++ )
+      {
+          //only run if the target exists
+          if(scom_targets[x] == NULL)
+          {
+              TRACFCOMP(g_trac_scom, "test_SBESCOMreadWrite_proc> Target %d does NOT exist to read", x);
+              continue;
+          }
+          // skip the sentinel
+          else if((TARGETING::MASTER_PROCESSOR_CHIP_TARGET_SENTINEL == scom_targets[x]))
+          {
+              TRACFCOMP( g_trac_scom, "ScomTest::test_SBESCOMreadWrite_proc> Target %d is the MASTER Sentinal, exiting test", x );
+              scom_targets[x] = NULL; //remove from our list
+          }
+          // skip if sbe scom is not enabled
+          else if(0 == scom_targets[x]->getAttr<TARGETING::ATTR_SCOM_SWITCHES>().useSbeScom)
+          {
+              TRACFCOMP( g_trac_scom, "ScomTest::test_SBESCOMreadWrite_proc> useSbeScom set to zero on target %d", x );
+              scom_targets[x] = NULL; //remove from our list
+          }
+          else if (scom_targets[x]->getAttr<TARGETING::ATTR_HWAS_STATE>().functional != true)
+          {
+              // NIMBUS model falls through here
+              TRACDCOMP( g_trac_scom, "ScomTest::test_SBESCOMreadWrite_proc> Target %d is not functional", x );
+              scom_targets[x] = NULL; //remove from our list
+          }
+      }
+
+      // scratch data to use
+      struct {
+          TARGETING::Target* target;
+          uint64_t addr;
+          uint64_t data;
+      } test_data[] = {
+          { scom_targets[PROC1],    0x02010803, 0x1234567887654321}, // addr: CXA FIR Mask Register
+          { scom_targets[PROC1],    0x02011083, 0x1122334455667788}, // addr: PBI CQ FIR Mask Register
+      };
+      const uint64_t NUM_ADDRS = sizeof(test_data)/sizeof(test_data[0]);
+
+      // allocate space for read data
+      uint64_t read_data[NUM_ADDRS];
+      size_t op_size = sizeof(uint32_t);
+
+      // write all the test registers
+      for( uint64_t x = 0; x < NUM_ADDRS; x++ )
+      {
+          //only run if the target exists
+          if(test_data[x].target == NULL)
+          {
+              TRACFCOMP(g_trac_scom, "test_SBESCOMreadWrite_proc> Target %d does NOT exist to write", x);
+              continue;
+          }
+
+          op_size = sizeof(uint64_t);
+
+          total++;
+
+          l_err = deviceWrite( test_data[x].target,
+                               &(test_data[x].data),
+                               op_size,
+                               DEVICE_SCOM_ADDRESS(test_data[x].addr) );
+          if( l_err )
+          {
+              TRACFCOMP(g_trac_scom, "ScomTest::test_SBESCOMreadWrite_proc> [%d] Write: Error from device : addr=0x%X, RC=%X", x,  test_data[x].addr, l_err->reasonCode() );
+              TS_FAIL( "ScomTest::test_SBESCOMreadWrite_proc> ERROR : Unexpected error log from write1" );
+              fails++;
+              errlCommit(l_err,SCOM_COMP_ID);
+          }
+      }
+
+      // read all the test registers
+      for( uint64_t x = 0; x < NUM_ADDRS; x++ )
+      {
+          //only run if the target exists
+          if(test_data[x].target == NULL)
+          {
+              continue;
+          }
+
+          op_size = sizeof(uint64_t);
+
+          total++;
+          l_err = deviceRead( test_data[x].target,
+                              &(read_data[x]),
+                              op_size,
+                              DEVICE_SCOM_ADDRESS(test_data[x].addr) );
+          if( l_err )
+          {
+              TRACFCOMP(g_trac_scom, "ScomTest::test_SBESCOMreadWrite_proc> [%d] Read: Error from device : addr=0x%X, RC=%X", x,  test_data[x].addr, l_err->reasonCode() );
+              TS_FAIL( "ScomTest::test_SBESCOMreadWrite_proc> ERROR : Unexpected error log from write1" );
+              fails++;
+              errlCommit(l_err,SCOM_COMP_ID);
+          }
+          else if(read_data[x] != test_data[x].data)
+          {
+              TRACFCOMP(g_trac_scom, "ScomTest::test_SBESCOMreadWrite_proc> [%d] Read: Data miss-match : addr=0x%X, read_data=0x%llx, write_data=0x%llx", x, test_data[x].addr, read_data[x], test_data[x].data);
+              TS_FAIL( "ScomTest::test_SBESCOMreadWrite_proc> ERROR : Data miss-match between read and expected data" );
+              fails++;
+          }
+      }
+
+      TRACFCOMP( g_trac_scom, "ScomTest::test_SBESCOMreadWrite_proc> %d/%d fails", fails, total );
+  }
+
 };
 
 
diff --git a/src/usr/targeting/common/genHwsvMrwXml.pl b/src/usr/targeting/common/genHwsvMrwXml.pl
index bb7a67041..7bae10cdb 100755
--- a/src/usr/targeting/common/genHwsvMrwXml.pl
+++ b/src/usr/targeting/common/genHwsvMrwXml.pl
@@ -3123,10 +3123,7 @@ sub generate_proc
     my $affinityPath = "affinity:sys-$sys/node-$node/proc-$proc";
 
     my $mruData = get_mruid($ipath);
-
-    # If we don't have an FSP (open-power) then we want to use Xscom
-    my $UseXscom   = $haveFSPs ? 0 : 1;
-    my $UseFsiScom = $haveFSPs ? 1 : 0;
+    
     my $fapi_name = sprintf("pu:k0:n%d:s0:p%02d", $node, $proc);
     print "
     <!-- $SYSNAME n${node}p${proc} processor chip -->
@@ -3137,14 +3134,6 @@ sub generate_proc
     <attribute><id>HUID</id><default>${uidstr}</default></attribute>
     <attribute><id>FAPI_NAME</id><default>$fapi_name</default></attribute>
     <attribute><id>POSITION</id><default>${position}</default></attribute>
-    <attribute><id>SCOM_SWITCHES</id>
-        <default>
-            <field><id>useFsiScom</id><value>$UseFsiScom</value></field>
-            <field><id>useXscom</id><value>$UseXscom</value></field>
-            <field><id>useInbandScom</id><value>0</value></field>
-            <field><id>reserved</id><value>0</value></field>
-        </default>
-    </attribute>
     <attribute>
         <id>PHYS_PATH</id>
         <default>physical:sys-$sys/node-$node/proc-$proc</default>
diff --git a/src/usr/targeting/common/processMrw.pl b/src/usr/targeting/common/processMrw.pl
index 9d21ec101..c938550b6 100644
--- a/src/usr/targeting/common/processMrw.pl
+++ b/src/usr/targeting/common/processMrw.pl
@@ -549,7 +549,8 @@ sub processProcessor
 
     ## these are hardcoded because code sets them properly
     $targetObj->setAttributeField($target, "SCOM_SWITCHES", "reserved",   "0");
-    $targetObj->setAttributeField($target, "SCOM_SWITCHES", "useFsiScom", "1");
+    $targetObj->setAttributeField($target, "SCOM_SWITCHES", "useSbeScom", "1");
+    $targetObj->setAttributeField($target, "SCOM_SWITCHES", "useFsiScom", "0");
     $targetObj->setAttributeField($target, "SCOM_SWITCHES", "useInbandScom",
         "0");
     $targetObj->setAttributeField($target, "SCOM_SWITCHES", "useXscom", "0");
diff --git a/src/usr/targeting/common/targetservice.C b/src/usr/targeting/common/targetservice.C
index a89a1fd9b..b47b4a6b7 100644
--- a/src/usr/targeting/common/targetservice.C
+++ b/src/usr/targeting/common/targetservice.C
@@ -1009,6 +1009,7 @@ void TargetService::dump() const
             TARG_INF("Use FSI SCOM = %d",l_switches.useFsiScom);
             TARG_INF("Use XSCOM = %d",l_switches.useXscom);
             TARG_INF("Use inband SCOM = %d",l_switches.useInbandScom);
+            TARG_INF("Use SBE SCOM = %d",l_switches.useSbeScom);
         }
 
         uint64_t l_xscomBaseAddr = 0;
diff --git a/src/usr/targeting/common/test/testcommontargeting.H b/src/usr/targeting/common/test/testcommontargeting.H
index 56a6e3961..d766cd8b1 100644
--- a/src/usr/targeting/common/test/testcommontargeting.H
+++ b/src/usr/targeting/common/test/testcommontargeting.H
@@ -111,11 +111,12 @@ class CommonTargetingTestSuite: public CxxTest::TestSuite
         if(   l_switches.useFsiScom != 0
               || l_switches.useXscom != 1
               || l_switches.useInbandScom != 0
+              || l_switches.useSbeScom != 0
               || l_switches.reserved != 0)
         {
-            TARG_TS_FAIL("SCOM Switches stuct was not correct (%d, %d, %d, %d)",
+            TARG_TS_FAIL("SCOM Switches stuct was not correct (%d, %d, %d, %d, %d)",
                     l_switches.useFsiScom, l_switches.useXscom,
-                    l_switches.useInbandScom ,
+                    l_switches.useInbandScom,l_switches.useSbeScom,
                     l_switches.reserved);
         }
 
diff --git a/src/usr/targeting/common/xmltohb/attribute_types.xml b/src/usr/targeting/common/xmltohb/attribute_types.xml
index fd30a4c5c..7196d1fdd 100644
--- a/src/usr/targeting/common/xmltohb/attribute_types.xml
+++ b/src/usr/targeting/common/xmltohb/attribute_types.xml
@@ -1108,10 +1108,18 @@
             <default>0</default>
         </field>
         <field>
+            <name>useSbeScom</name>
+            <description>0b0: Do not use SBE SCOM at this time.  0b1: Use
+            SBE SCOM at this time</description>
+            <type>uint8_t</type>
+            <bits>1</bits>
+            <default>0</default>
+        </field>
+        <field>
             <name>reserved</name>
             <description>Reserved for future expansion</description>
             <type>uint8_t</type>
-            <bits>5</bits>
+            <bits>4</bits>
             <default>0</default>
         </field>
     </complexType>
diff --git a/src/usr/targeting/common/xmltohb/simics_NIMBUS.system.xml b/src/usr/targeting/common/xmltohb/simics_NIMBUS.system.xml
index 2eab9e3ce..a3ea47d9d 100644
--- a/src/usr/targeting/common/xmltohb/simics_NIMBUS.system.xml
+++ b/src/usr/targeting/common/xmltohb/simics_NIMBUS.system.xml
@@ -156,6 +156,7 @@
             <field><id>useFsiScom</id><value>0</value></field>
             <field><id>useXscom</id><value>1</value></field>
             <field><id>useInbandScom</id><value>0</value></field>
+            <field><id>useSbeScom</id><value>0</value></field>
             <field><id>reserved</id><value>0</value></field>
         </default>
     </attribute>
@@ -4279,7 +4280,8 @@
     <attribute><id>POSITION</id><default>1</default></attribute>
     <attribute><id>SCOM_SWITCHES</id>
         <default>
-            <field><id>useFsiScom</id><value>1</value></field>
+            <field><id>useFsiScom</id><value>0</value></field>
+            <field><id>useSbeScom</id><value>1</value></field>
             <field><id>useXscom</id><value>0</value></field>
             <field><id>useInbandScom</id><value>0</value></field>
             <field><id>reserved</id><value>0</value></field>
diff --git a/src/usr/targeting/common/xmltohb/target_types.xml b/src/usr/targeting/common/xmltohb/target_types.xml
index efbe257b1..050a7e7e4 100755
--- a/src/usr/targeting/common/xmltohb/target_types.xml
+++ b/src/usr/targeting/common/xmltohb/target_types.xml
@@ -1540,7 +1540,8 @@
     <attribute>
         <id>SCOM_SWITCHES</id>
         <default>
-            <field><id>useFsiScom</id><value>1</value></field>
+            <field><id>useSbeScom</id><value>1</value></field>
+            <field><id>useFsiScom</id><value>0</value></field>
             <field><id>useXscom</id><value>0</value></field>
             <field><id>useInbandScom</id><value>0</value></field>
             <field><id>reserved</id><value>0</value></field>
diff --git a/src/usr/targeting/common/xmltohb/vbu_NIMBUS.system.xml b/src/usr/targeting/common/xmltohb/vbu_NIMBUS.system.xml
index baa5f9cef..25bf54e0f 100644
--- a/src/usr/targeting/common/xmltohb/vbu_NIMBUS.system.xml
+++ b/src/usr/targeting/common/xmltohb/vbu_NIMBUS.system.xml
@@ -150,6 +150,7 @@
     <attribute><id>POSITION</id><default>4</default></attribute>
     <attribute><id>SCOM_SWITCHES</id>
         <default>
+            <field><id>useSbeScom</id><value>0</value></field>
             <field><id>useFsiScom</id><value>0</value></field>
             <field><id>useXscom</id><value>1</value></field>
             <field><id>useInbandScom</id><value>0</value></field>
diff --git a/src/usr/targeting/targetservicestart.C b/src/usr/targeting/targetservicestart.C
index d51fa3dfc..7adc7a21c 100755
--- a/src/usr/targeting/targetservicestart.C
+++ b/src/usr/targeting/targetservicestart.C
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* OpenPOWER HostBoot Project                                             */
 /*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2012,2015                        */
+/* Contributors Listed Below - COPYRIGHT 2012,2016                        */
 /* [+] Google Inc.                                                        */
 /* [+] International Business Machines Corp.                              */
 /*                                                                        */
@@ -229,6 +229,7 @@ static void initializeAttributes(TargetService& i_targetService)
               l_pMasterProcChip->getAttr<ATTR_SCOM_SWITCHES>();
             l_switches.useXscom = 1;
             l_switches.useFsiScom = 0;
+            l_switches.useSbeScom = 0;
             l_pMasterProcChip->setAttr<ATTR_SCOM_SWITCHES>(l_switches);