PRD: single bit analysis support for MBA target

Change-Id: I1991f107f6b56a168656cacc216217b87d117810
RTC: 187481
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/57527
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Matt Derksen <mderkse1@us.ibm.com>
Reviewed-by: Caleb N. Palmer <cnpalmer@us.ibm.com>
Reviewed-by: Zane C. Shelley <zshelle@us.ibm.com>
Reviewed-by: Benjamin J. Weisenbeck <bweisenb@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/57881
CI-Ready: Zane C. Shelley <zshelle@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>

11 files changed, 678 insertions, 904 deletions

diff --git a/src/usr/diag/prdf/common/plat/cen/cen_centaur_regs.rule b/src/usr/diag/prdf/common/plat/cen/cen_centaur_regs.rule
index bef16d5a2..0fa0f5557 100644
--- a/src/usr/diag/prdf/common/plat/cen/cen_centaur_regs.rule
+++ b/src/usr/diag/prdf/common/plat/cen/cen_centaur_regs.rule
@@ -36,12 +36,24 @@
     };
 
     ############################################################################
-    # Additional regs for CEN target MBSECCFIR
+    # Centaur chip MBSFIR
+    ############################################################################
+
+    register MBSFIR_MASK_OR
+    {
+        name        "Centaur chip MBSFIR MASK atomic OR";
+        scomaddr    0x02011405;
+        capture     group never;
+        access      write_only;
+    };
+
+    ############################################################################
+    # Centaur chip MBSECCFIR 0
     ############################################################################
 
     register MBSECCFIR_0_AND
     {
-        name        "Centaur chip MBSECCFIR_0 atomic AND";
+        name        "Centaur chip MBSECCFIR 0 atomic AND";
         scomaddr    0x02011441;
         capture     group never;
         access      write_only;
@@ -49,7 +61,7 @@
 
     register MBSECCFIR_0_MASK_AND
     {
-        name        "MBU.MBS.ECC01.MBECCFIR_MASK_AND";
+        name        "Centaur chip MBSECCFIR 0 MASK atomic AND";
         scomaddr    0x02011444;
         capture     group never;
         access      write_only;
@@ -57,15 +69,19 @@
 
     register MBSECCFIR_0_MASK_OR
     {
-        name        "MBU.MBS.ECC01.MBECCFIR_MASK_OR";
+        name        "Centaur chip MBSECCFIR 0 MASK atomic OR";
         scomaddr    0x02011445;
         capture     group never;
         access      write_only;
     };
 
+    ############################################################################
+    # Centaur chip MBSECCFIR 0
+    ############################################################################
+
     register MBSECCFIR_1_AND
     {
-        name        "Centaur chip MBSECCFIR_1 atomic AND";
+        name        "Centaur chip MBSECCFIR 1 atomic AND";
         scomaddr    0x02011481;
         capture     group never;
         access      write_only;
@@ -73,7 +89,7 @@
 
     register MBSECCFIR_1_MASK_AND
     {
-        name        "MBU.MBS.ECC23.MBECCFIR_MASK_AND";
+        name        "Centaur chip MBSECCFIR 1 MASK atomic AND";
         scomaddr    0x02011484;
         capture     group never;
         access      write_only;
@@ -81,7 +97,7 @@
 
     register MBSECCFIR_1_MASK_OR
     {
-        name        "MBU.MBS.ECC23.MBECCFIR_MASK_OR";
+        name        "Centaur chip MBSECCFIR 1 MASK atomic OR";
         scomaddr    0x02011485;
         capture     group never;
         access      write_only;
diff --git a/src/usr/diag/prdf/common/plat/cen/cen_common_actions.rule b/src/usr/diag/prdf/common/plat/cen/cen_common_actions.rule
index e9f2e9b3b..366e7353f 100644
--- a/src/usr/diag/prdf/common/plat/cen/cen_common_actions.rule
+++ b/src/usr/diag/prdf/common/plat/cen/cen_common_actions.rule
@@ -149,6 +149,7 @@ actionclass level2_th_1
 #                           Callouts with flags                                #
 ################################################################################
 
+actionclass self_th_1_UERE   { self_th_1;   SueSource; };
 actionclass level2_th_1_UERE { level2_th_1; SueSource; };
 
 ################################################################################
diff --git a/src/usr/diag/prdf/common/plat/cen/cen_mba.rule b/src/usr/diag/prdf/common/plat/cen/cen_mba.rule
index 23b6f4f3e..19dfe0c8c 100644
--- a/src/usr/diag/prdf/common/plat/cen/cen_mba.rule
+++ b/src/usr/diag/prdf/common/plat/cen/cen_mba.rule
@@ -244,7 +244,10 @@ rule rMBACALFIR
     MBACALFIR & ~MBACALFIR_MASK & ~MBACALFIR_ACT0 &  MBACALFIR_ACT1;
 };
 
-group gMBACALFIR filter singlebit, cs_root_cause
+# RCD parity errors (bits 4 and 7) given priority over potential side effects
+# bits 2 and 17.
+group gMBACALFIR filter priority( 4, 7 ),
+                        cs_root_cause( 0, 1, 2, 4, 5, 6, 7, 8, 9, 11, 13, 15, 17, 18 )
 {
     /** MBACALFIR[0]
      *  MBA_RECOVERABLE_ERROR
@@ -254,12 +257,12 @@ group gMBACALFIR filter singlebit, cs_root_cause
     /** MBACALFIR[1]
      *  MBA_NONRECOVERABLE_ERROR
      */
-    (rMBACALFIR, bit(1)) ? self_th_1;
+    (rMBACALFIR, bit(1)) ? self_th_1_UERE;
 
     /** MBACALFIR[2]
      *  REFRESH_OVERRUN
      */
-    (rMBACALFIR, bit(2)) ? self_th_1;
+    (rMBACALFIR, bit(2)) ? self_th_32perDay;
 
     /** MBACALFIR[3]
      *  WAT_ERROR
@@ -269,7 +272,7 @@ group gMBACALFIR filter singlebit, cs_root_cause
     /** MBACALFIR[4]
      *  RCD parity error on port 0
      */
-    (rMBACALFIR, bit(4)) ? TBDDefaultCallout;
+    (rMBACALFIR, bit(4)) ? rcd_parity_error_port0_UERE;
 
     /** MBACALFIR[5]
      *  DDR0_CAL_TIMEOUT_ERR
@@ -284,7 +287,7 @@ group gMBACALFIR filter singlebit, cs_root_cause
     /** MBACALFIR[7]
      *  RCD parity error on port 1
      */
-    (rMBACALFIR, bit(7)) ? TBDDefaultCallout;
+    (rMBACALFIR, bit(7)) ? rcd_parity_error_port1_UERE;
 
     /** MBACALFIR[8]
      *  MBX_TO_MBA_PAR_ERROR
@@ -294,7 +297,7 @@ group gMBACALFIR filter singlebit, cs_root_cause
     /** MBACALFIR[9]
      *  MBA_WRD_UE
      */
-    (rMBACALFIR, bit(9)) ? self_th_1;
+    (rMBACALFIR, bit(9)) ? self_th_1_UERE;
 
     /** MBACALFIR[10]
      *  MBA_WRD_CE
@@ -304,7 +307,7 @@ group gMBACALFIR filter singlebit, cs_root_cause
     /** MBACALFIR[11]
      *  MBA_MAINT_UE
      */
-    (rMBACALFIR, bit(11)) ? self_th_1;
+    (rMBACALFIR, bit(11)) ? self_th_1_UERE;
 
     /** MBACALFIR[12]
      *  MBA_MAINT_CE
@@ -314,7 +317,7 @@ group gMBACALFIR filter singlebit, cs_root_cause
     /** MBACALFIR[13]
      *  DDR_CAL_RESET_TIMEOUT
      */
-    (rMBACALFIR, bit(13)) ? self_th_1;
+    (rMBACALFIR, bit(13)) ? self_th_1_UERE;
 
     /** MBACALFIR[14]
      *  WRQ_DATA_CE
@@ -324,7 +327,7 @@ group gMBACALFIR filter singlebit, cs_root_cause
     /** MBACALFIR[15]
      *  WRQ_DATA_UE
      */
-    (rMBACALFIR, bit(15)) ? self_th_1;
+    (rMBACALFIR, bit(15)) ? self_th_1_UERE;
 
     /** MBACALFIR[16]
      *  WRQ_DATA_SUE
@@ -339,7 +342,7 @@ group gMBACALFIR filter singlebit, cs_root_cause
     /** MBACALFIR[18]
      *  SM_1HOT_ERR
      */
-    (rMBACALFIR, bit(18)) ? self_th_1;
+    (rMBACALFIR, bit(18)) ? self_th_1_UERE;
 
     /** MBACALFIR[19]
      *  WRD_SCOM_ERROR
@@ -454,7 +457,7 @@ group gMBAFIR filter singlebit, cs_root_cause( 3, 5, 6, 7, 8 )
     /** MBAFIR[3]
      *  Internal FSM parity error
      */
-    (rMBAFIR, bit(3)) ? self_th_1;
+    (rMBAFIR, bit(3)) ? self_th_1_UERE;
 
     /** MBAFIR[4]
      *  MCBIST error
@@ -464,22 +467,22 @@ group gMBAFIR filter singlebit, cs_root_cause( 3, 5, 6, 7, 8 )
     /** MBAFIR[5]
      *  SCOM command register parity error
      */
-    (rMBAFIR, bit(5)) ? self_th_1;
+    (rMBAFIR, bit(5)) ? self_th_1_UERE;
 
     /** MBAFIR[6]
      *  Unrecoverable channel error
      */
-    (rMBAFIR, bit(6)) ? self_th_1;
+    (rMBAFIR, bit(6)) ? self_th_1_UERE;
 
     /** MBAFIR[7]
      *  UE or CE Error in WRD caw2 data latches
      */
-    (rMBAFIR, bit(7)) ? self_th_1;
+    (rMBAFIR, bit(7)) ? self_th_1_UERE;
 
     /** MBAFIR[8]
      *  Illegal transition maint state machine
      */
-    (rMBAFIR, bit(8)) ? self_th_1;
+    (rMBAFIR, bit(8)) ? self_th_1_UERE;
 
     /** MBAFIR[9:14]
      *  RESERVED
@@ -513,7 +516,7 @@ group gMBASPA filter singlebit, cs_root_cause
     /** MBASPA[0]
      *  Maintenance command complete
      */
-    (rMBASPA, bit(0)) ? maintenance_command_complete; # DD2+ only
+    (rMBASPA, bit(0)) ? maint_cmd_complete;
 
     /** MBASPA[1]
      *  Hard NCE ETE
@@ -579,17 +582,17 @@ rule rMBADDRPHYFIR
     MBADDRPHYFIR & ~MBADDRPHYFIR_MASK & ~MBADDRPHYFIR_ACT0 &  MBADDRPHYFIR_ACT1;
 };
 
-group gMBADDRPHYFIR filter singlebit, cs_root_cause
+group gMBADDRPHYFIR filter singlebit, cs_root_cause( 48, 49, 51, 52, 56, 57, 59, 60 )
 {
     /** MBADDRPHYFIR[48]
      *  FSM Error Checkstop
      */
-    (rMBADDRPHYFIR, bit(48)) ? self_th_1;
+    (rMBADDRPHYFIR, bit(48)) ? self_th_1_UERE;
 
     /** MBADDRPHYFIR[49]
      *  Parity Error Checkstop
      */
-    (rMBADDRPHYFIR, bit(49)) ? self_th_1;
+    (rMBADDRPHYFIR, bit(49)) ? self_th_1_UERE;
 
     /** MBADDRPHYFIR[50]
      *  Calibration Error RE
@@ -619,12 +622,12 @@ group gMBADDRPHYFIR filter singlebit, cs_root_cause
     /** MBADDRPHYFIR[56]
      *  FSM Error Checkstop
      */
-    (rMBADDRPHYFIR, bit(56)) ? self_th_1;
+    (rMBADDRPHYFIR, bit(56)) ? self_th_1_UERE;
 
     /** MBADDRPHYFIR[57]
      *  Parity Error Checkstop
      */
-    (rMBADDRPHYFIR, bit(57)) ? self_th_1;
+    (rMBADDRPHYFIR, bit(57)) ? self_th_1_UERE;
 
     /** MBADDRPHYFIR[58]
      *  Calibration Error RE
diff --git a/src/usr/diag/prdf/common/plat/cen/cen_mba_actions.rule b/src/usr/diag/prdf/common/plat/cen/cen_mba_actions.rule
index 05773a326..21b881dfd 100644
--- a/src/usr/diag/prdf/common/plat/cen/cen_mba_actions.rule
+++ b/src/usr/diag/prdf/common/plat/cen/cen_mba_actions.rule
@@ -5,7 +5,7 @@
 #
 # OpenPOWER HostBoot Project
 #
-# Contributors Listed Below - COPYRIGHT 2017
+# Contributors Listed Below - COPYRIGHT 2017,2018
 # [+] International Business Machines Corp.
 #
 #
@@ -24,8 +24,31 @@
 # IBM_PROLOG_END_TAG
 
 /** Analyze maintenance command complete */
-actionclass maintenance_command_complete
+actionclass maint_cmd_complete
 {
     funccall("MaintCmdComplete");
 };
 
+/** Analyze RCD parity error */
+actionclass rcd_parity_error_UERE
+{
+    funccall("MaskRcdParitySideEffects");
+    calloutSelfLow;
+    threshold1;
+    SueSource;
+};
+
+/** Analyze RCD parity error on port 0 */
+actionclass rcd_parity_error_port0_UERE
+{
+    funccall("CalloutDimmsOnPort0");
+    rcd_parity_error_UERE;
+};
+
+/** Analyze RCD parity error on port 0 */
+actionclass rcd_parity_error_port1_UERE
+{
+    funccall("CalloutDimmsOnPort1");
+    rcd_parity_error_UERE;
+};
+
diff --git a/src/usr/diag/prdf/common/plat/cen/cen_mba_regs.rule b/src/usr/diag/prdf/common/plat/cen/cen_mba_regs.rule
index f1c9d2712..a4b32d98c 100644
--- a/src/usr/diag/prdf/common/plat/cen/cen_mba_regs.rule
+++ b/src/usr/diag/prdf/common/plat/cen/cen_mba_regs.rule
@@ -5,7 +5,7 @@
 #
 # OpenPOWER HostBoot Project
 #
-# Contributors Listed Below - COPYRIGHT 2017
+# Contributors Listed Below - COPYRIGHT 2017,2018
 # [+] International Business Machines Corp.
 #
 #
@@ -23,31 +23,70 @@
 #
 # IBM_PROLOG_END_TAG
 
+    ############################################################################
+    # Centaur chip MBA target MBACALFIR
+    ############################################################################
 
-    ###########################################################################
-    # P9 MBASPA
-    ###########################################################################
+    register MBACALFIR_AND
+    {
+        name        "Centaur chip MBA target MBACALFIR atomic AND";
+        scomaddr    0x03010401;
+        capture     group never;
+        access      write_only;
+    };
 
-    register MBASPA_OR
+    register MBACALFIR_MASK_OR
     {
-        name        "Memory Buffer MBA SPA OR register";
-        scomaddr    0x03010613;
+        name        "Centaur chip MBA target MBACALFIR_MASK atomic OR";
+        scomaddr    0x03010405;
+        capture     group never;
+        access      write_only;
+    };
+
+    ############################################################################
+    # Centaur chip MBA target MBAFIR
+    ############################################################################
+
+    register MBAFIR_MASK_OR
+    {
+        name        "Centaur chip MBA target MBAFIR_MASK atomic OR";
+        scomaddr    0x03010605;
         capture     group never;
         access      write_only;
     };
 
     ############################################################################
-    # Additional regs for CEN MBA target MBASPA
+    # Centaur chip MBA target MBASPA
     ############################################################################
 
     register MBASPA_AND
     {
-        name        "CEN MBA target MBASPA atomic AND";
+        name        "Centaur chip MBA target MBASPA atomic AND";
         scomaddr    0x03010612;
         capture     group never;
         access      write_only;
     };
 
+    register MBASPA_OR
+    {
+        name        "Centaur chip MBA target MBASPA atomic OR";
+        scomaddr    0x03010613;
+        capture     group never;
+        access      write_only;
+    };
+
+    ############################################################################
+    # Centaur chip MBA target MBADDRPHYFIR
+    ############################################################################
+
+    register MBADDRPHYFIR_AND
+    {
+        name        "Centaur chip MBA target MBADDRPHYFIR atomic AND";
+        scomaddr    0x800200910301143F;
+        capture     group never;
+        access      write_only;
+    };
+
     ############################################################################
     # Maintenance Command Registers
     ############################################################################
@@ -60,8 +99,8 @@
         capture     group MaintCmdRegs;
     };
 
-    # NOTE: PRD doesn't use MBMCC directly and the bits are cleared by HW so I
-    #       see no reason to add it here.
+    # NOTE: PRD doesn't use MBMCC directly and the bits are cleared by HW so no
+    # reason to add it here.
 
     register MBMSR
     {
diff --git a/src/usr/diag/prdf/common/plat/cen/prdfCenMba_common.C b/src/usr/diag/prdf/common/plat/cen/prdfCenMba_common.C
new file mode 100644
index 000000000..4e7411ea6
--- /dev/null
+++ b/src/usr/diag/prdf/common/plat/cen/prdfCenMba_common.C
@@ -0,0 +1,197 @@
+/* IBM_PROLOG_BEGIN_TAG                                                   */
+/* This is an automatically generated prolog.                             */
+/*                                                                        */
+/* $Source: src/usr/diag/prdf/common/plat/cen/prdfCenMba_common.C $       */
+/*                                                                        */
+/* OpenPOWER HostBoot Project                                             */
+/*                                                                        */
+/* Contributors Listed Below - COPYRIGHT 2017,2018                        */
+/* [+] International Business Machines Corp.                              */
+/*                                                                        */
+/*                                                                        */
+/* Licensed under the Apache License, Version 2.0 (the "License");        */
+/* you may not use this file except in compliance with the License.       */
+/* You may obtain a copy of the License at                                */
+/*                                                                        */
+/*     http://www.apache.org/licenses/LICENSE-2.0                         */
+/*                                                                        */
+/* Unless required by applicable law or agreed to in writing, software    */
+/* distributed under the License is distributed on an "AS IS" BASIS,      */
+/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
+/* implied. See the License for the specific language governing           */
+/* permissions and limitations under the License.                         */
+/*                                                                        */
+/* IBM_PROLOG_END_TAG                                                     */
+
+// Framework includes
+#include <iipServiceDataCollector.h>
+#include <prdfExtensibleChip.H>
+#include <prdfPluginDef.H>
+#include <prdfPluginMap.H>
+
+// Platform includes
+#include <prdfCenMbaDataBundle.H>
+
+using namespace TARGETING;
+
+namespace PRDF
+{
+
+using namespace PlatServices;
+
+namespace cen_mba
+{
+
+//##############################################################################
+//
+//                             Special plugins
+//
+//##############################################################################
+
+/**
+ * @brief  Plugin that initializes the data bundle.
+ * @param  i_mbaChip An MBA chip.
+ * @return SUCCESS
+ */
+int32_t Initialize( ExtensibleChip * i_mbaChip )
+{
+    i_mbaChip->getDataBundle() = new MbaDataBundle( i_mbaChip );
+    return SUCCESS;
+}
+PRDF_PLUGIN_DEFINE( cen_mba, Initialize );
+
+//##############################################################################
+//
+//                             MBACALFIR
+//
+//##############################################################################
+
+void __calloutDimmsOnPort( ExtensibleChip * i_chip, uint32_t i_port,
+                           STEP_CODE_DATA_STRUCT & io_sc )
+{
+    for ( auto & dimm : getConnected(i_chip->getTrgt(), TYPE_DIMM) )
+    {
+        if ( getDimmPort<TYPE_MBA>(dimm) == i_port )
+            io_sc.service_data->SetCallout( dimm, MRU_MEDA );
+    }
+}
+
+/**
+ * @brief  Adds all DIMMs connected to MBA port 0 to the callout list.
+ * @param  i_chip MBA chip
+ * @param  io_sc  The step code data struct.
+ * @return SUCCESS
+ */
+int32_t CalloutDimmsOnPort0( ExtensibleChip * i_chip,
+                             STEP_CODE_DATA_STRUCT & io_sc )
+{
+    __calloutDimmsOnPort( i_chip, 0, io_sc );
+    return SUCCESS;
+}
+PRDF_PLUGIN_DEFINE( cen_mba, CalloutDimmsOnPort0 );
+
+/**
+ * @brief  Adds all DIMMs connected to MBA port 1 to the callout list.
+ * @param  i_chip MBA chip
+ * @param  io_sc  The step code data struct.
+ * @return SUCCESS
+ */
+int32_t CalloutDimmsOnPort1( ExtensibleChip * i_chip,
+                             STEP_CODE_DATA_STRUCT & io_sc )
+{
+    __calloutDimmsOnPort( i_chip, 1, io_sc );
+    return SUCCESS;
+}
+PRDF_PLUGIN_DEFINE( cen_mba, CalloutDimmsOnPort1 );
+
+/**
+ * @brief  Masks the all side effect attentions of an RCD parity error.
+ * @param  i_mbaChip MBA chip
+ * @param  io_sc     The step code data struct.
+ * @return SUCCESS
+ */
+int32_t MaskRcdParitySideEffects( ExtensibleChip * i_mbaChip,
+                                  STEP_CODE_DATA_STRUCT & io_sc )
+{
+    #define PRDF_FUNC "[cen_mba::MaskRcdParitySideEffects] "
+
+    uint32_t l_rc = SUCCESS;
+
+    do
+    {
+        // Don't do anything if this is a checkstop attention.
+        if ( CHECK_STOP == io_sc.service_data->getPrimaryAttnType() ) break;
+
+        ExtensibleChip * membChip = getConnectedParent(i_mbaChip, TYPE_MEMBUF);
+
+        SCAN_COMM_REGISTER_CLASS * mbsFir;
+        SCAN_COMM_REGISTER_CLASS * mbsFirMaskOr;
+        SCAN_COMM_REGISTER_CLASS * mbaCalFir;
+        SCAN_COMM_REGISTER_CLASS * mbaCalFirMaskOr;
+        SCAN_COMM_REGISTER_CLASS * mbaFir;
+        SCAN_COMM_REGISTER_CLASS * mbaFirMaskOr;
+
+        mbsFir          = membChip->getRegister( "MBSFIR"           );
+        mbsFirMaskOr    = membChip->getRegister( "MBSFIR_MASK_OR"   );
+        mbaCalFir       = i_mbaChip->getRegister("MBACALFIR"        );
+        mbaCalFirMaskOr = i_mbaChip->getRegister("MBACALFIR_MASK_OR");
+        mbaFir          = i_mbaChip->getRegister("MBAFIR"           );
+        mbaFirMaskOr    = i_mbaChip->getRegister("MBAFIR_MASK_OR"   );
+
+        l_rc |= mbsFir->Read();
+        l_rc |= mbaCalFir->Read();
+        l_rc |= mbaFir->Read();
+        if ( SUCCESS != l_rc )
+        {
+            PRDF_ERR( PRDF_FUNC "FIR read failed for MBA 0x%08x",
+                      i_mbaChip->getHuid() );
+            break;
+        }
+
+        // Mask only if the side effect bit is set.
+
+        if ( mbsFir->IsBitSet(4) ) // internal timeout
+        {
+            mbsFirMaskOr->SetBit(4);
+            l_rc |= mbsFirMaskOr->Write();
+        }
+
+        if ( mbaCalFir->IsBitSet(2) ) // refresh overrun
+        {
+            mbaCalFirMaskOr->SetBit(2);
+            l_rc = mbaCalFirMaskOr->Write();
+        }
+
+        if ( mbaCalFir->IsBitSet(17) ) // WRQ RRQ hang error
+        {
+            mbaCalFirMaskOr->SetBit(17);
+            l_rc = mbaCalFirMaskOr->Write();
+        }
+
+        if ( mbaFir->IsBitSet(2) ) // multi-address maint cmd timeout
+        {
+            mbaFirMaskOr->SetBit(2);
+            l_rc = mbaFirMaskOr->Write();
+        }
+
+        if ( SUCCESS != l_rc )
+        {
+            PRDF_ERR( PRDF_FUNC "MASK_OR write failed for MBA 0x%08x",
+                      i_mbaChip->getHuid() );
+            break;
+        }
+
+    } while (0);
+
+    return SUCCESS;
+
+    #undef PRDF_FUNC
+}
+PRDF_PLUGIN_DEFINE( cen_mba, MaskRcdParitySideEffects );
+
+//------------------------------------------------------------------------------
+
+} // end namespace cen_mba
+
+} // end namespace PRDF
+
diff --git a/src/usr/diag/prdf/common/plat/cen/prdf_plat_cen.mk b/src/usr/diag/prdf/common/plat/cen/prdf_plat_cen.mk
index 956ba6cf2..f9d2d62ba 100644
--- a/src/usr/diag/prdf/common/plat/cen/prdf_plat_cen.mk
+++ b/src/usr/diag/prdf/common/plat/cen/prdf_plat_cen.mk
@@ -5,7 +5,7 @@
 #
 # OpenPOWER HostBoot Project
 #
-# Contributors Listed Below - COPYRIGHT 2016,2017
+# Contributors Listed Below - COPYRIGHT 2016,2018
 # [+] International Business Machines Corp.
 #
 #
@@ -37,4 +37,9 @@ prd_incpath += ${PRD_SRC_PATH}/common/plat/cen
 # Object files common to both FSP and Hostboot
 ################################################################################
 
+# plat/cen/ (non-rule plugin related)
 prd_obj += prdfCenMbaDomain.o
+
+# plat/cen/ (rule plugin related)
+prd_rule_plugin += prdfCenMba_common.o
+
diff --git a/src/usr/diag/prdf/common/plat/pegasus/Mba.rule b/src/usr/diag/prdf/common/plat/pegasus/Mba.rule
index 7447f7dd3..c651d8281 100755
--- a/src/usr/diag/prdf/common/plat/pegasus/Mba.rule
+++ b/src/usr/diag/prdf/common/plat/pegasus/Mba.rule
@@ -5,7 +5,7 @@
 #
 # OpenPOWER HostBoot Project
 #
-# Contributors Listed Below - COPYRIGHT 2012,2016
+# Contributors Listed Below - COPYRIGHT 2012,2018
 # [+] International Business Machines Corp.
 #
 #
@@ -23,25 +23,11 @@
 #
 # IBM_PROLOG_END_TAG
 
-################################################################################
-#
-# Scope:
-#   Registers and actions for the following chiplets:
-#
-# Chiplet  Register Addresses       Description
-# =======  =======================  ============================================
-#   MEM    0x03010400 - 0x0301043F  MBA 01
-#   MEM    0x03010600 - 0x0301063F  MBA 01 MCBIST
-#   MEM    0x03010C00 - 0x03010C3F  MBA 23
-#   MEM    0x03010E00 - 0x03010E3F  MBA 23 MCBIST
-#
-################################################################################
-
-chip Mba
+chip cen_mba
 {
-    name        "Centaur MBA Chiplet";
+    name        "Centaur MBA chiplet";
     targettype  TYPE_MBA;
-    sigoff      0x8000;
+    sigoff      0x9000;
     dump        DUMP_CONTENT_HW;
     scomlen     64;
 
@@ -60,62 +46,54 @@ chip Mba
  #############################################################################
 
     ############################################################################
-    # MEM Chiplet MBAFIR
+    # Centaur chip MBA target MBACALFIR
     ############################################################################
 
-    register MBAFIR
+    register MBACALFIR
     {
-        name        "MBU.MBA_MCBIST.SCOMFIR.MBAFIRQ";
-        scomaddr    0x03010600;
-        reset       (&, 0x03010601);
-        mask        (|, 0x03010605);
+        name        "Centaur chip MBA target MBACALFIR";
+        scomaddr    0x03010400;
+        reset       (&, 0x03010401);
+        mask        (|, 0x03010405);
         capture     group FirRegs;
         capture     group MemChipletRegs;
     };
 
-    register MBAFIR_MASK
+    register MBACALFIR_MASK
     {
-        name        "MBU.MBA_MCBIST.SCOMFIR.MBAFIRMASK";
-        scomaddr    0x03010603;
+        name        "Centaur chip MBA target MBACALFIR MASK";
+        scomaddr    0x03010403;
         capture     group FirRegs;
         capture     group MemChipletRegs;
     };
 
-    register MBAFIR_MASK_OR
-    {
-        name        "MBU.MBA_MCBIST.SCOMFIR.MBAFIRMASK OR";
-        scomaddr    0x03010605;
-        capture     group never;
-        access      write_only;
-    };
-
-    register MBAFIR_ACT0
+    register MBACALFIR_ACT0
     {
-        name        "MBU.MBA_MCBIST.SCOMFIR.MBAFIRACT0";
-        scomaddr    0x03010606;
+        name        "Centaur chip MBA target MBACALFIR ACT0";
+        scomaddr    0x03010406;
         capture     group FirRegs;
         capture     group MemChipletRegs;
-        capture     req nonzero("MBAFIR");
+        capture     req nonzero("MBACALFIR");
     };
 
-    register MBAFIR_ACT1
+    register MBACALFIR_ACT1
     {
-        name        "MBU.MBA_MCBIST.SCOMFIR.MBAFIRACT1";
-        scomaddr    0x03010607;
+        name        "Centaur chip MBA target MBACALFIR ACT1";
+        scomaddr    0x03010407;
         capture     group FirRegs;
         capture     group MemChipletRegs;
-        capture     req nonzero("MBAFIR");
+        capture     req nonzero("MBACALFIR");
     };
 
     ############################################################################
-    # MEM Chiplet MBASECUREFIR
+    # Centaur chip MBA target MBASECUREFIR
     ############################################################################
 
     # This register is hardwired to channel failure (checkstop) and we cannot
     # mask or change the state of the action registers.
     register MBASECUREFIR
     {
-        name        "MBU.MBA_SRQ.MBASIRQ";
+        name        "Centaur chip MBA target MBASECUREFIR";
         scomaddr    0x0301041b;
         reset       (&, 0x0301041c);
         capture     group FirRegs;
@@ -123,139 +101,107 @@ chip Mba
     };
 
     ############################################################################
-    # MEM Chiplet DDRPHYFIR
+    # Centaur chip MBA target MBAFIR
     ############################################################################
 
-    register MBADDRPHYFIR
+    register MBAFIR
     {
-        name        "DDRPHY_FIR_REG";
-        scomaddr    0x800200900301143F;
-        reset       (&, 0x800200910301143F);
-        mask        (|, 0x800200950301143F);
+        name        "Centaur chip MBA target MBAFIR";
+        scomaddr    0x03010600;
+        reset       (&, 0x03010601);
+        mask        (|, 0x03010605);
         capture     group FirRegs;
         capture     group MemChipletRegs;
     };
 
-    register MBADDRPHYFIR_AND
-    {
-        name        "DDRPHY_FIR_REG_AND";
-        scomaddr    0x800200910301143F;
-        capture     group never;
-        access      write_only;
-    };
-
-    register MBADDRPHYFIR_MASK
+    register MBAFIR_MASK
     {
-        name        "DDRPHY_FIR_MASK_REG";
-        scomaddr    0x800200930301143F;
+        name        "Centaur chip MBA target MBAFIR MASK";
+        scomaddr    0x03010603;
         capture     group FirRegs;
         capture     group MemChipletRegs;
     };
 
-    register MBADDRPHYFIR_ACT0
+    register MBAFIR_ACT0
     {
-        name        "DDRPHY_FIR_ACTION0_REG";
-        scomaddr    0x800200960301143F;
+        name        "Centaur chip MBA target MBAFIR ACT0";
+        scomaddr    0x03010606;
         capture     group FirRegs;
         capture     group MemChipletRegs;
-        capture     req nonzero("MBADDRPHYFIR");
+        capture     req nonzero("MBAFIR");
     };
 
-    register MBADDRPHYFIR_ACT1
+    register MBAFIR_ACT1
     {
-        name        "DDRPHY_FIR_ACTION1_REG";
-        scomaddr    0x800200970301143F;
+        name        "Centaur chip MBA target MBAFIR ACT1";
+        scomaddr    0x03010607;
         capture     group FirRegs;
         capture     group MemChipletRegs;
-        capture     req nonzero("MBADDRPHYFIR");
+        capture     req nonzero("MBAFIR");
     };
 
     ############################################################################
-    # MEM Chiplet MBACALFIR
+    # Centaur chip MBA target MBASPA
     ############################################################################
 
-    register MBACALFIR
+    register MBASPA
     {
-        name        "MBU.MBA_SRQ.MBACALFIRQ";
-        scomaddr    0x03010400;
-        reset       (&, 0x03010401);
-        mask        (|, 0x03010405);
+        name        "Centaur chip MBA target MBASPA";
+        scomaddr    0x03010611;
+        reset       (&, 0x03010612);
+        mask        (|, 0x03010614);
         capture     group FirRegs;
         capture     group MemChipletRegs;
+        capture     group MaintCmdRegs;
     };
 
-    register MBACALFIR_AND
-    {
-        name        "MBU.MBA_SRQ.MBACALFIRQ AND";
-        scomaddr    0x03010401;
-        capture     group never;
-        access      write_only;
-    };
-
-    register MBACALFIR_MASK
+    register MBASPA_MASK
     {
-        name        "MBU.MBA_SRQ.MBACALFIR_MASK";
-        scomaddr    0x03010403;
+        name        "Centaur chip MBA target MBASPA MASK";
+        scomaddr    0x03010614;
         capture     group FirRegs;
         capture     group MemChipletRegs;
+        capture     group MaintCmdRegs;
     };
 
-    register MBACALFIR_MASK_OR
-    {
-        name        "MBU.MBA_SRQ.MBACALFIR_MASK OR";
-        scomaddr    0x03010405;
-        capture     group never;
-        access      write_only;
-    };
+    ############################################################################
+    # Centaur chip MBA target MBADDRPHYFIR
+    ############################################################################
 
-    register MBACALFIR_ACT0
+    register MBADDRPHYFIR
     {
-        name        "MBU.MBA_SRQ.MBACALFIR_ACTION0";
-        scomaddr    0x03010406;
+        name        "Centaur chip MBA target MBADDRPHYFIR";
+        scomaddr    0x800200900301143F;
+        reset       (&, 0x800200910301143F);
+        mask        (|, 0x800200950301143F);
         capture     group FirRegs;
         capture     group MemChipletRegs;
-        capture     req nonzero("MBACALFIR");
     };
 
-    register MBACALFIR_ACT1
+    register MBADDRPHYFIR_MASK
     {
-        name        "MBU.MBA_SRQ.MBACALFIR_ACTION1";
-        scomaddr    0x03010407;
+        name        "Centaur chip MBA target MBADDRPHYFIR MASK";
+        scomaddr    0x800200930301143F;
         capture     group FirRegs;
         capture     group MemChipletRegs;
-        capture     req nonzero("MBACALFIR");
     };
 
-    ############################################################################
-    # MEM Chiplet MBASPA
-    ############################################################################
-
-    register MBASPA
+    register MBADDRPHYFIR_ACT0
     {
-        name        "MBU.MBA_MCBIST.SCOMFIR.MBSPAQ";
-        scomaddr    0x03010611;
-        reset       (&, 0x03010612);
-        mask        (|, 0x03010614);
+        name        "Centaur chip MBA target MBADDRPHYFIR ACT0";
+        scomaddr    0x800200960301143F;
         capture     group FirRegs;
         capture     group MemChipletRegs;
-        capture     group MaintCmdRegs;
-    };
-
-    register MBASPA_AND
-    {
-        name        "MBU.MBA_MCBIST.SCOMFIR.MBSPAQ_AND";
-        scomaddr    0x03010612;
-        capture     group never;
-        access      write_only;
+        capture     req nonzero("MBADDRPHYFIR");
     };
 
-    register MBASPA_MASK
+    register MBADDRPHYFIR_ACT1
     {
-        name        "MBU.MBA_MCBIST.SCOMFIR.MBSPAMSKQ";
-        scomaddr    0x03010614;
+        name        "Centaur chip MBA target MBADDRPHYFIR ACT1";
+        scomaddr    0x800200970301143F;
         capture     group FirRegs;
         capture     group MemChipletRegs;
-        capture     group MaintCmdRegs;
+        capture     req nonzero("MBADDRPHYFIR");
     };
 
     ############################################################################
@@ -310,61 +256,6 @@ chip Mba
         capture     group MemChipletRegs;
     };
 
-    ############################################################################
-    # Maintenance Command Registers
-    ############################################################################
-
-    register MBMCT
-    {
-        name        "MBA Maintenance Command Type Register";
-        scomaddr    0x0301060A;
-        capture     group default;
-        capture     group MaintCmdRegs;
-    };
-
-    # NOTE: PRD doesn't use MBMCC directly and the bits are cleared by HW so I
-    #       see no reason to add it here.
-
-    register MBMSR
-    {
-        name        "MBA Maintenance Command Status Register";
-        scomaddr    0x0301060C;
-        capture     group default;
-        capture     group MaintCmdRegs;
-    };
-
-    register MBMACA
-    {
-        name        "MBA Maintenance Command Start Address Register";
-        scomaddr    0x0301060D;
-        capture     group default;
-        capture     group MaintCmdRegs;
-    };
-
-    register MBMEA
-    {
-        name        "MBA Maintenance Command End Address Register";
-        scomaddr    0x0301060E;
-        capture     group default;
-        capture     group MaintCmdRegs;
-    };
-
-    register MBASCTL
-    {
-        name        "MBA Memory Scrub/Read Control Register";
-        scomaddr    0x0301060F;
-        capture     group default;
-        capture     group MaintCmdRegs;
-    };
-
-    register MBAECTL
-    {
-        name        "MBA Error Control Register";
-        scomaddr    0x03010610;
-        capture     group default;
-        capture     group MaintCmdRegs;
-    };
-
 };
 
  ##############################################################################
@@ -378,473 +269,446 @@ chip Mba
  #                                                                            #
  ##############################################################################
 
-# This group is a layer of indirection. Normally, each rule file will have a
-# single global or chiplet FIR which will have group that defines which lower
-# level FIRs to analyze. Unfortunately, the MBA target contains only a subset of
-# the FIRs in the Centaur's MEM chiplet. So the MEM chiplet FIR's group
-# definition must remain in Membuf.rule. This group will serve as a psuedo
-# chiplet FIR. This group could contain the bit definitions for all of the MBA
-# registers, however, we could not utilize the filter for each register.
-# Instead, the bit definitions will simply analyze the respective FIR groups.
-# The FIRs in this group will be analyzed in order so if a FIR should be
-# analyzed before another then simply change the order of the FIRs in this
-# group.
-
-# NOTE: The rule definition for this group must be different than that of the
-#       individual FIR groups. Otherwise, it causes hashing collisions in the
-#       signatures. In this case, we will add the SPECIAL attention line even
-#       though none of these registers will trigger a special attention. This
-#       should change the hash enough to make a unique signature.
-
+################################################################################
+# Summary for MBA
+################################################################################
 
 rule rMBA
 {
-    CHECK_STOP:  summary( 0, MbaFir )       |
-                 summary( 1, MbaSecureFir ) |
-                 summary( 2, MbaDdrPhyFir ) |
-                 summary( 3, MbaCalFir );
-
-    UNIT_CS:     summary( 0, MbaFir )       |
-                 summary( 1, MbaSecureFir ) |
-                 summary( 2, MbaDdrPhyFir ) |
-                 summary( 3, MbaCalFir );
-
-    RECOVERABLE: summary( 0, MbaFir )       |
-                 summary( 1, MbaSecureFir ) |
-                 summary( 2, MbaDdrPhyFir ) |
-                 summary( 3, MbaCalFir );
+  UNIT_CS:
+    summary( 0, rMBACALFIR ) |
+    summary( 1, rMBASECUREFIR ) |
+    summary( 2, rMBAFIR ) |
+    summary( 3, rMBADDRPHYFIR );
+
+  RECOVERABLE:
+    summary( 0, rMBACALFIR ) |
+    summary( 1, rMBASECUREFIR ) |
+    summary( 2, rMBAFIR ) |
+    summary( 3, rMBADDRPHYFIR );
+
+  HOST_ATTN:
+    summary( 4, rMBASPA );
 };
 
-group gMBA attntype CHECK_STOP, UNIT_CS, RECOVERABLE filter priority( 3 )
+group gMBA attntype UNIT_CS, RECOVERABLE, HOST_ATTN filter singlebit
 {
-    (rMBA, bit(0)) ? analyze(gMbaFir);
-    (rMBA, bit(1)) ? analyze(gMbaSecureFir);
-    (rMBA, bit(2)) ? analyze(gMbaDdrPhyFir);
-    (rMBA, bit(3)) ? analyze(gMbaCalFir);
+    (rMBA, bit(0)) ? analyze(gMBACALFIR);
+    (rMBA, bit(1)) ? analyze(gMBASECUREFIR);
+    (rMBA, bit(2)) ? analyze(gMBAFIR);
+    (rMBA, bit(3)) ? analyze(gMBADDRPHYFIR);
+    (rMBA, bit(4)) ? analyze(gMBASPA);
 };
 
 ################################################################################
-# MEM Chiplet MBAFIR
+# Centaur chip MBA target MBACALFIR
 ################################################################################
 
-# RAS spreadsheet: p8dd1_mss_FFDC_37_ reviewd.xls
-# TODO via RTC 23125. In some Fir bits, we may have to callout Centaur
-# rather than MBA. Marc will change callout rules as per latest design.
-# This is applicable for all FIRs in this file
-rule MbaFir
+rule rMBACALFIR
 {
-    CHECK_STOP:  MBAFIR & ~MBAFIR_MASK & ~MBAFIR_ACT0 & ~MBAFIR_ACT1;
-    UNIT_CS:     MBAFIR & ~MBAFIR_MASK & ~MBAFIR_ACT0 & ~MBAFIR_ACT1;
-    RECOVERABLE: MBAFIR & ~MBAFIR_MASK & ~MBAFIR_ACT0 &  MBAFIR_ACT1;
+  UNIT_CS:
+    MBACALFIR & ~MBACALFIR_MASK & ~MBACALFIR_ACT0 & ~MBACALFIR_ACT1;
+  RECOVERABLE:
+    MBACALFIR & ~MBACALFIR_MASK & ~MBACALFIR_ACT0 &  MBACALFIR_ACT1;
 };
 
-group gMbaFir filter singlebit, secondarybits(0,1,2,4,9,10,11,12,13,14,15,16)
+group gMBACALFIR filter singlebit, cs_root_cause( 4, 7 )
 {
-    /** MBAFIR[0]
-     *  MBAFIRQ_INVALID_MAINT_CMD
+    /** MBACALFIR[0]
+     *  MBA_RECOVERABLE_ERROR
      */
-    (MbaFir, bit(0)) ? defaultMaskedError;
+    (rMBACALFIR, bit(0)) ? self_th_1;
 
-    /** MBAFIR[1]
-     *  MBAFIRQ_INVALID_MAINT_ADDRESS
+    /** MBACALFIR[1]
+     *  MBA_NONRECOVERABLE_ERROR
      */
-    (MbaFir, bit(1)) ? defaultMaskedError;
+    (rMBACALFIR, bit(1)) ? self_th_1;
 
-    /** MBAFIR[2]
-     *  MBAFIRQ_MULTI_ADDRESS_MAINT_TIMEOUT
+    /** MBACALFIR[2]
+     *  REFRESH_OVERRUN
      */
-    (MbaFir, bit(2)) ? SelfMedThr1;
+    (rMBACALFIR, bit(2)) ? self_th_32perDay;
 
-    /** MBAFIR[3]
-     *  MBAFIRQ_INTERNAL_FSM_ERROR
+    /** MBACALFIR[3]
+     *  WAT_ERROR
      */
-    (MbaFir, bit(3)) ? SelfMedThr1;
+    (rMBACALFIR, bit(3)) ? defaultMaskedError;
 
-    /** MBAFIR[4]
-     *  MBAFIRQ_MCBIST_ERROR
+    /** MBACALFIR[4]
+     *  RCD parity error on port 0
      */
-    (MbaFir, bit(4)) ? defaultMaskedError;
+    (rMBACALFIR, bit(4)) ? rcd_parity_error_port0_UERE;
 
-    /** MBAFIR[5]
-     *  MBAFIRQ_SCOM_CMD_REG_PE
+    /** MBACALFIR[5]
+     *  DDR0_CAL_TIMEOUT_ERR
      */
-    (MbaFir, bit(5)) ? SelfMedThr1;
+    (rMBACALFIR, bit(5)) ? self_th_1;
 
-    /** MBAFIR[6]
-     *  MBAFIRQ_CHANNEL_CHKSTP_ERR
+    /** MBACALFIR[6]
+     *  DDR1_CAL_TIMEOUT_ERR
      */
-    (MbaFir, bit(6)) ? SelfMedThr1;
+    (rMBACALFIR, bit(6)) ? self_th_1;
 
-    /** MBAFIR[7]
-     *  MBAFIRQ_WRD_CAW2_DATA_CE_UE_ERR
+    /** MBACALFIR[7]
+     *  RCD parity error on port 1
      */
-    (MbaFir, bit(7)) ? SelfMedThr1;
+    (rMBACALFIR, bit(7)) ? rcd_parity_error_port1_UERE;
 
-    # This is for DD2 only
-    /** MBAFIR[8]
-     *  MBAFIRQ_MAINT_1HOT_ST_ERROR_DD2
+    /** MBACALFIR[8]
+     *  MBX_TO_MBA_PAR_ERROR
      */
-    (MbaFir, bit(8)) ? SelfMedThr1;
+    (rMBACALFIR, bit(8)) ? self_th_1;
 
-    /** MBAFIR[9:14]
-     *  Reserved
+    /** MBACALFIR[9]
+     *  MBA_WRD_UE
      */
-    (MbaFir, bit(9|10|11|12|13|14)) ? defaultMaskedError;
+    (rMBACALFIR, bit(9)) ? self_th_1;
 
-    /** MBAFIR[15]
-     *  MBAFIRQ_INTERNAL_SCOM_ERROR
+    /** MBACALFIR[10]
+     *  MBA_WRD_CE
      */
-    (MbaFir, bit(15)) ? thresholdAndMask_self;
+    (rMBACALFIR, bit(10)) ? threshold_and_mask_self;
 
-    /** MBAFIR[16]
-     *  MBAFIRQ_INTERNAL_SCOM_ERROR_CLONE
+    /** MBACALFIR[11]
+     *  MBA_MAINT_UE
      */
-    (MbaFir, bit(16)) ? thresholdAndMask_self;
-};
+    (rMBACALFIR, bit(11)) ? self_th_1;
 
-################################################################################
-# MEM Chiplet MBASECUREFIR
-################################################################################
-
-rule MbaSecureFir
-{
-  # NOTE: This secure FIR will only report checkstop attentions.
-  CHECK_STOP: MBASECUREFIR;
-  UNIT_CS:    MBASECUREFIR;
-};
+    /** MBACALFIR[12]
+     *  MBA_MAINT_CE
+     */
+    (rMBACALFIR, bit(12)) ? self_th_32perDay;
 
-group gMbaSecureFir filter singlebit
-{
-    /** MBASECUREFIR[0]
-     *  MBASIRQ_INVALID_MBA_CAL0Q_ACCESS
+    /** MBACALFIR[13]
+     *  DDR_CAL_RESET_TIMEOUT
      */
-    (MbaSecureFir, bit(0)) ? secureFirCallout;
+    (rMBACALFIR, bit(13)) ? self_th_1;
 
-    /** MBASECUREFIR[1]
-     *  MBASIRQ_INVALID_MBA_CAL1Q_ACCESS
+    /** MBACALFIR[14]
+     *  WRQ_DATA_CE
      */
-    (MbaSecureFir, bit(1)) ? secureFirCallout;
+    (rMBACALFIR, bit(14)) ? threshold_and_mask_self;
 
-    /** MBASECUREFIR[2]
-     *  MBASIRQ_INVALID_MBA_CAL2Q_ACCESS
+    /** MBACALFIR[15]
+     *  WRQ_DATA_UE
      */
-    (MbaSecureFir, bit(2)) ? secureFirCallout;
+    (rMBACALFIR, bit(15)) ? self_th_1;
 
-    /** MBASECUREFIR[3]
-     *  MBASIRQ_INVALID_MBA_CAL3Q_ACCESS
+    /** MBACALFIR[16]
+     *  WRQ_DATA_SUE
      */
-    (MbaSecureFir, bit(3)) ? secureFirCallout;
+    (rMBACALFIR, bit(16)) ? defaultMaskedError;
 
-    /** MBASECUREFIR[4]
-     *  MBASIRQ_INVALID_DDR_CONFIG_REG_ACCESS
+    /** MBACALFIR[17]
+     *  WRQ_RRQ_HANG_ERR
      */
-    (MbaSecureFir, bit(4)) ? secureFirCallout;
+    (rMBACALFIR, bit(17)) ? self_th_1;
 
-    /** MBASECUREFIR[5]
-     *  MBASIRQ_INVALID_SIR_MASK_OR_ACTION_REGISTER_ACCESS
+    /** MBACALFIR[18]
+     *  SM_1HOT_ERR
      */
-    (MbaSecureFir, bit(5)) ? secureFirCallout;
-};
+    (rMBACALFIR, bit(18)) ? self_th_1;
 
-################################################################################
-# MEM Chiplet DDRPHYFIR
-################################################################################
-# RAS spreadsheet: p8dd1_mss_FFDC_37_ reviewd.xls
-rule MbaDdrPhyFir
-{
-  CHECK_STOP:
-    MBADDRPHYFIR & ~MBADDRPHYFIR_MASK & ~MBADDRPHYFIR_ACT0 & ~MBADDRPHYFIR_ACT1;
-  UNIT_CS:
-    MBADDRPHYFIR & ~MBADDRPHYFIR_MASK & ~MBADDRPHYFIR_ACT0 & ~MBADDRPHYFIR_ACT1;
-  RECOVERABLE:
-    MBADDRPHYFIR & ~MBADDRPHYFIR_MASK & ~MBADDRPHYFIR_ACT0 &  MBADDRPHYFIR_ACT1;
-};
+    /** MBACALFIR[19]
+     *  WRD_SCOM_ERROR
+     */
+    (rMBACALFIR, bit(19)) ? threshold_and_mask_self;
 
-group gMbaDdrPhyFir filter singlebit, secondarybits(50,53,54,55,58)
-{
-    /** MBADDRPHYFIR[48]
-     *  DDRPHY_FIR_REG_DDR0_FSM_CKSTP
+    /** MBACALFIR[20]
+     *  RHMR_PRIM_REACHED_MAX
      */
-    (MbaDdrPhyFir, bit(48)) ? SelfMedThr1;
+    (rMBACALFIR, bit(20)) ? defaultMaskedError;
 
-    /** MBADDRPHYFIR[49]
-     *  DDRPHY_FIR_REG_DDR0_PARITY_CKSTP
+    /** MBACALFIR[21]
+     *  RHMR_SEC_REACHED_MAX
      */
-    (MbaDdrPhyFir, bit(49)) ? SelfMedThr1;
+    (rMBACALFIR, bit(21)) ? defaultMaskedError;
 
-    /** MBADDRPHYFIR[50]
-     *  DDRPHY_FIR_REG_DDR0_CALIBRATION_ERROR
+    /** MBACALFIR[22]
+     *  RHMR_SEC_ALREADY_FULL
      */
-    (MbaDdrPhyFir, bit(50)) ? defaultMaskedError;
+    (rMBACALFIR, bit(22)) ? defaultMaskedError;
 
-    /** MBADDRPHYFIR[51]
-     *  DDRPHY_FIR_REG_DDR0_FSM_ERR
+    /** MBACALFIR[23]
+     *  Reserved
      */
-    (MbaDdrPhyFir, bit(51)) ? SelfMedThr32PerDay;
+    (rMBACALFIR, bit(23)) ? defaultMaskedError;
 
-    /** MBADDRPHYFIR[52]
-     *  DDRPHY_FIR_REG_DDR0_PARITY_ERR
+    /** MBACALFIR[24]
+     *  SCOM FIR error
      */
-    (MbaDdrPhyFir, bit(52)) ? SelfMedThr32PerDay;
+    (rMBACALFIR, bit(24)) ? threshold_and_mask_self;
 
-    /** MBADDRPHYFIR[53]
-     *  DDRPHY_FIR_REG_DDR01_FIR_PARITY_ERR
+    /** MBACALFIR[25]
+     *  SCOM FIR error clone
      */
-    (MbaDdrPhyFir, bit(53)) ? thresholdAndMask_self;
+    (rMBACALFIR, bit(25)) ? threshold_and_mask_self;
 
-    /** MBADDRPHYFIR[54:55]
-     *  Reserved
+};
+
+################################################################################
+# Centaur chip MBA target MBASECUREFIR
+################################################################################
+
+rule rMBASECUREFIR
+{
+  UNIT_CS:
+    MBASECUREFIR;
+};
+
+group gMBASECUREFIR filter singlebit, cs_root_cause( 0, 1, 2, 3, 4, 5 )
+{
+    /** MBASECUREFIR[0]
+     *  Invalid MBA_CALQ0 access
      */
-    (MbaDdrPhyFir, bit(54|55)) ? defaultMaskedError;
+    (rMBASECUREFIR, bit(0)) ? level2_th_1_UERE;
 
-    /** MBADDRPHYFIR[56]
-     *  DDRPHY_FIR_REG_DDR1_FSM_CKSTP
+    /** MBASECUREFIR[1]
+     *  Invalid MBA_CALQ1 access
      */
-    (MbaDdrPhyFir, bit(56)) ? SelfMedThr1;
+    (rMBASECUREFIR, bit(1)) ? level2_th_1_UERE;
 
-    /** MBADDRPHYFIR[57]
-     *  DDRPHY_FIR_REG_DDR1_PARITY_CKSTP
+    /** MBASECUREFIR[2]
+     *  Invalid MBA_CAL2Q access
      */
-    (MbaDdrPhyFir, bit(57)) ? SelfMedThr1;
+    (rMBASECUREFIR, bit(2)) ? level2_th_1_UERE;
 
-    /** MBADDRPHYFIR[58]
-     *  DDRPHY_FIR_REG_DDR1_CALIBRATION_ERROR
+    /** MBASECUREFIR[3]
+     *  Invalid MBA_CAL3Q access
      */
-    (MbaDdrPhyFir, bit(58)) ? defaultMaskedError;
+    (rMBASECUREFIR, bit(3)) ? level2_th_1_UERE;
 
-    /** MBADDRPHYFIR[59]
-     *  DDRPHY_FIR_REG_DDR1_FSM_ERR
+    /** MBASECUREFIR[4]
+     *  Invalid DDR config reg access
      */
-    (MbaDdrPhyFir, bit(59)) ? SelfMedThr32PerDay;
+    (rMBASECUREFIR, bit(4)) ? level2_th_1_UERE;
 
-    /** MBADDRPHYFIR[60]
-     *  DDRPHY_FIR_REG_DDR1_PARITY_ERR
+    /** MBASECUREFIR[5]
+     *  Invalid SIR mask or action reg access
      */
-    (MbaDdrPhyFir, bit(60)) ? SelfMedThr32PerDay;
+    (rMBASECUREFIR, bit(5)) ? level2_th_1_UERE;
+
 };
 
 ################################################################################
-# MEM Chiplet MBACALFIR
+# Centaur chip MBA target MBAFIR
 ################################################################################
 
-# RAS spreadsheet: p8dd1_mss_FFDC_37_ reviewd.xls
-rule MbaCalFir
+rule rMBAFIR
 {
-  CHECK_STOP:  MBACALFIR & ~MBACALFIR_MASK & ~MBACALFIR_ACT0 & ~MBACALFIR_ACT1;
-  UNIT_CS:     MBACALFIR & ~MBACALFIR_MASK & ~MBACALFIR_ACT0 & ~MBACALFIR_ACT1;
-  RECOVERABLE: MBACALFIR & ~MBACALFIR_MASK & ~MBACALFIR_ACT0 &  MBACALFIR_ACT1;
+  UNIT_CS:
+    MBAFIR & ~MBAFIR_MASK & ~MBAFIR_ACT0 & ~MBAFIR_ACT1;
+  RECOVERABLE:
+    MBAFIR & ~MBAFIR_MASK & ~MBAFIR_ACT0 &  MBAFIR_ACT1;
 };
 
-# bits 4 and 7 given priority to check for RCD parity error before potential
-# side effects in bits 2 and 17
-group gMbaCalFir filter priority( 4, 7 ),
-                 secondarybits(3,10,12,14,16,19,20,21,22,23,24,25)
+group gMBAFIR filter singlebit, cs_root_cause( 3, 5, 6, 7, 8 )
 {
-    /** MBACALFIR[0]
-     *  MBACALFIRQ_MBA_RECOVERABLE_ERROR
+    /** MBAFIR[0]
+     *  Invalid Maintenance Command
      */
-    (MbaCalFir, bit(0)) ? SelfMedThr1;
+    (rMBAFIR, bit(0)) ? defaultMaskedError;
 
-    /** MBACALFIR[1]
-     *  MBACALFIRQ_MBA_NONRECOVERABLE_ERROR
+    /** MBAFIR[1]
+     *  Invalid Maintenance Address
      */
-    (MbaCalFir, bit(1)) ? SelfMedThr1;
+    (rMBAFIR, bit(1)) ? defaultMaskedError;
 
-    /** MBACALFIR[2]
-     *  MBACALFIRQ_REFRESH_OVERRUN
+    /** MBAFIR[2]
+     *  Multi-address Maintenance Cmd Timeout
      */
-    (MbaCalFir, bit(2)) ? SelfMedThr32PerDay;
+    (rMBAFIR, bit(2)) ? self_th_1;
 
-    /** MBACALFIR[3]
-     *  MBACALFIRQ_WAT_ERROR
+    /** MBAFIR[3]
+     *  Internal FSM parity error
      */
-    (MbaCalFir, bit(3)) ? defaultMaskedError;
+    (rMBAFIR, bit(3)) ? self_th_1;
 
-    /** MBACALFIR[4]
-     *  MBACALFIRQ_RCD_PARITY_ERROR_0
+    /** MBAFIR[4]
+     *  MCBIST error
      */
-    (MbaCalFir, bit(4)) ? RcdParityError0;
+    (rMBAFIR, bit(4)) ? defaultMaskedError;
 
-    /** MBACALFIR[5]
-     *  MBACALFIRQ_DDR0_CAL_TIMEOUT_ERR
+    /** MBAFIR[5]
+     *  SCOM command register parity error
      */
-    (MbaCalFir, bit(5)) ? SelfMedThr1;
+    (rMBAFIR, bit(5)) ? self_th_1;
 
-    /** MBACALFIR[6]
-     *  MBACALFIRQ_DDR1_CAL_TIMEOUT_ERR
+    /** MBAFIR[6]
+     *  Unrecoverable channel error
      */
-    (MbaCalFir, bit(6)) ? SelfMedThr1;
+    (rMBAFIR, bit(6)) ? self_th_1;
 
-    /** MBACALFIR[7]
-     *  MBACALFIRQ_RCD_PARITY_ERROR_1
+    /** MBAFIR[7]
+     *  UE or CE Error in WRD caw2 data latches
      */
-    (MbaCalFir, bit(7)) ? RcdParityError1;
+    (rMBAFIR, bit(7)) ? self_th_1;
 
-    /** MBACALFIR[8]
-     *  MBACALFIRQ_MBX_TO_MBA_PAR_ERROR
+    /** MBAFIR[8]
+     *  Illegal transition maint state machine
      */
-    (MbaCalFir, bit(8)) ? SelfMedThr1;
+    (rMBAFIR, bit(8)) ? self_th_1;
 
-    /** MBACALFIR[9]
-     *  MBACALFIRQ_MBA_WRD_UE
+    /** MBAFIR[9:14]
+     *  RESERVED
      */
-    (MbaCalFir, bit(9)) ? SelfMedThr1;
+    (rMBAFIR, bit(9|10|11|12|13|14)) ? defaultMaskedError;
 
-    /** MBACALFIR[10]
-     *  MBACALFIRQ_MBA_WRD_CE
+    /** MBAFIR[15]
+     *  SCOM Internal Error
      */
-    (MbaCalFir, bit(10)) ? thresholdAndMask_self;
+    (rMBAFIR, bit(15)) ? threshold_and_mask_self;
 
-    /** MBACALFIR[11]
-     *  MBACALFIRQ_MBA_MAINT_UE
+    /** MBAFIR[16]
+     *  SCOM Internal Error Copy
      */
-    (MbaCalFir, bit(11)) ? SelfMedThr1;
+    (rMBAFIR, bit(16)) ? threshold_and_mask_self;
 
-    /** MBACALFIR[12]
-     *  MBACALFIRQ_MBA_MAINT_CE
-     */
-    (MbaCalFir, bit(12)) ? SelfMedThr32PerDay;
+};
 
-    /** MBACALFIR[13]
-     *  MBACALFIRQ_DDR_CAL_RESET_TIMEOUT
-     */
-    (MbaCalFir, bit(13)) ? SelfMedThr1;
+################################################################################
+# Centaur chip MBA target MBASPA
+################################################################################
 
-    /** MBACALFIR[14]
-     *  MBACALFIRQ_WRQ_DATA_CE
-     */
-    (MbaCalFir, bit(14)) ? thresholdAndMask_self;
+rule rMBASPA
+{
+  HOST_ATTN:
+    MBASPA & ~MBASPA_MASK;
+};
 
-    /** MBACALFIR[15]
-     *  MBACALFIRQ_WRQ_DATA_UE
+group gMBASPA filter singlebit, cs_root_cause
+{
+    /** MBASPA[0]
+     *  Maintenance command complete
      */
-    (MbaCalFir, bit(15)) ? SelfMedThr1;
+    (rMBASPA, bit(0)) ? maint_cmd_complete;
 
-    /** MBACALFIR[16]
-     *  MBACALFIRQ_WRQ_DATA_SUE
+    /** MBASPA[1]
+     *  Hard NCE ETE
      */
-    (MbaCalFir, bit(16)) ? defaultMaskedError;
+    (rMBASPA, bit(1)) ? defaultMaskedError;
 
-    /** MBACALFIR[17]
-     *  MBACALFIRQ_WRQ_RRQ_HANG_ERR
+    /** MBASPA[2]
+     *  Soft NCE ETE
      */
-    (MbaCalFir, bit(17)) ? SelfMedThr1;
+    (rMBASPA, bit(2)) ? defaultMaskedError;
 
-    /** MBACALFIR[18]
-     *  MBACALFIRQ_SM_1HOT_ERR
+    /** MBASPA[3]
+     *  Intermittent NCE ETE
      */
-    (MbaCalFir, bit(18)) ? SelfMedThr1;
+    (rMBASPA, bit(3)) ? defaultMaskedError;
 
-    /** MBACALFIR[19]
-     *  MBACALFIRQ_WRD_SCOM_ERROR
+    /** MBASPA[4]
+     *  Retry CE ETE
      */
-    (MbaCalFir, bit(19)) ? thresholdAndMask_self;
+    (rMBASPA, bit(4)) ? defaultMaskedError;
 
-    /** MBACALFIR[20]
-     *  DD1: MBACALFIRQ_INTERNAL_SCOM_ERROR
+    /** MBASPA[5]
+     *  Emergency throttle action detected
      */
-    (MbaCalFir, bit(20)) ? thresholdAndMask_self; # DD1 action, masked for DD2+
+    (rMBASPA, bit(5)) ? defaultMaskedError;
 
-    /** MBACALFIR[21]
-     *  DD1: MBACALFIRQ_INTERNAL_SCOM_ERROR_COPY
+    /** MBASPA[6]
+     *  Firmware generated attention 0
      */
-    (MbaCalFir, bit(21)) ? thresholdAndMask_self; # DD1 action, masked for DD2+
+    (rMBASPA, bit(6)) ? defaultMaskedError;
 
-    # This is for DD2 only
-    /** MBACALFIR[22]
-     *  MBACALFIRQ_RHMR_SEC_ALREADY_FULL
+    /** MBASPA[7]
+     *  Firmware generated attention 1
      */
-    (MbaCalFir, bit(22)) ? defaultMaskedError;
+    (rMBASPA, bit(7)) ? defaultMaskedError;
 
-    # This is for DD2 only
-    /** MBACALFIR[23]
-     *  Reserved
+    /** MBASPA[8]
+     *  WAT debug attention
      */
-    (MbaCalFir, bit(23)) ? defaultMaskedError;
+    (rMBASPA, bit(8)) ? defaultMaskedError;
 
-    # This is for DD2 only
-    /** MBACALFIR[24]
-     *  MBACALFIRQ_INTERNAL_SCOM_ERROR
+    /** MBASPA[9]
+     *  Spare
      */
-    (MbaCalFir, bit(24)) ? thresholdAndMask_self;
+    (rMBASPA, bit(9)) ? defaultMaskedError;
 
-    # This is for DD2 only
-    /** MBACALFIR[25]
-     *  MBACALFIRQ_INTERNAL_SCOM_ERROR_COPY
+    /** MBASPA[10]
+     *  MCBIST done
      */
-    (MbaCalFir, bit(25)) ? thresholdAndMask_self;
+    (rMBASPA, bit(10)) ? defaultMaskedError;
+
 };
 
-###############################################################################
-# MEM Chiplet MBASPA
+################################################################################
+# Centaur chip MBA target MBADDRPHYFIR
 ################################################################################
 
-rule MbaSpa
+rule rMBADDRPHYFIR
 {
-    SPECIAL: MBASPA & ~MBASPA_MASK;
+  UNIT_CS:
+    MBADDRPHYFIR & ~MBADDRPHYFIR_MASK & ~MBADDRPHYFIR_ACT0 & ~MBADDRPHYFIR_ACT1;
+  RECOVERABLE:
+    MBADDRPHYFIR & ~MBADDRPHYFIR_MASK & ~MBADDRPHYFIR_ACT0 &  MBADDRPHYFIR_ACT1;
 };
 
-group gMbaSpa attntype SPECIAL filter singlebit
+group gMBADDRPHYFIR filter singlebit, cs_root_cause
 {
-    /** MBASPA[0]
-     *  MBSPAQ_COMMAND_COMPLETE_WO_ENA_ERR_ATTN
+    /** MBADDRPHYFIR[48]
+     *  FSM Error Checkstop
      */
-    (MbaSpa, bit(0)) ? analyzeMaintCmdComplete;
+    (rMBADDRPHYFIR, bit(48)) ? self_th_1;
 
-    /** MBASPA[1]
-     *  MBSPAQ_HARD_CE_ETE_ATTN
+    /** MBADDRPHYFIR[49]
+     *  Parity Error Checkstop
      */
-    (MbaSpa, bit(1)) ? defaultMaskedError;
+    (rMBADDRPHYFIR, bit(49)) ? self_th_1;
 
-    /** MBASPA[2]
-     *  MBSPAQ_SOFT_CE_ETE_ATTN
+    /** MBADDRPHYFIR[50]
+     *  Calibration Error RE
      */
-    (MbaSpa, bit(2)) ? defaultMaskedError;
+    (rMBADDRPHYFIR, bit(50)) ? defaultMaskedError;
 
-    /** MBASPA[3]
-     *  MBSPAQ_INTERMITTENT_ETE_ATTN
+    /** MBADDRPHYFIR[51]
+     *  FSM Recoverable Error
      */
-    (MbaSpa, bit(3)) ? defaultMaskedError;
+    (rMBADDRPHYFIR, bit(51)) ? self_th_32perDay;
 
-    /** MBASPA[4]
-     *  MBSPAQ_RCE_ETE_ATTN
+    /** MBADDRPHYFIR[52]
+     *  Parity Recoverable Error
      */
-    (MbaSpa, bit(4)) ? defaultMaskedError;
+    (rMBADDRPHYFIR, bit(52)) ? self_th_32perDay;
 
-    /** MBASPA[5]
-     *  MBSPAQ_EMERGENCY_THROTTLE_ATTN
+    /** MBADDRPHYFIR[53]
+     *  Parity Recoverable Error
      */
-    (MbaSpa, bit(5)) ? defaultMaskedError;
+    (rMBADDRPHYFIR, bit(53)) ? threshold_and_mask_self;
 
-    /** MBASPA[6]
-     *  MBSPAQ_FIRMWARE_ATTN0
+    /** MBADDRPHYFIR[54:55]
+     *  Reserved
      */
-    (MbaSpa, bit(6)) ? defaultMaskedError;
+    (rMBADDRPHYFIR, bit(54|55)) ? defaultMaskedError;
 
-    /** MBASPA[7]
-     *  MBSPAQ_FIRMWARE_ATTN1
+    /** MBADDRPHYFIR[56]
+     *  FSM Error Checkstop
      */
-    (MbaSpa, bit(7)) ? defaultMaskedError;
+    (rMBADDRPHYFIR, bit(56)) ? self_th_1;
 
-    /** MBASPA[8]
-     *  MBSPAQ_WAT_DEBUG_ATTN
+    /** MBADDRPHYFIR[57]
+     *  Parity Error Checkstop
      */
-    # WORKAROUND: HW217608
-    # For Centaur DD1.0, the hardware team will utilize the WAT logic to look
-    # for a command complete and trigger this bit. Note that the HW will still
-    # trigger MBASPA[0], however, that bit should be masked for this
-    # workaround.
-    (MbaSpa, bit(8)) ? analyzeMaintCmdComplete;
+    (rMBADDRPHYFIR, bit(57)) ? self_th_1;
 
-    /** MBASPA[9]
-     *  MBSPAQ_SPARE_ATTN1
+    /** MBADDRPHYFIR[58]
+     *  Calibration Error RE
      */
-    (MbaSpa, bit(9)) ? defaultMaskedError;
+    (rMBADDRPHYFIR, bit(58)) ? defaultMaskedError;
 
-    /** MBASPA[10]
-     *  MBSPAQ_MCBIST_DONE
+    /** MBADDRPHYFIR[59]
+     *  FSM Recoverable Error
+     */
+    (rMBADDRPHYFIR, bit(59)) ? self_th_32perDay;
+
+    /** MBADDRPHYFIR[60]
+     *  Parity Recoverable Error
      */
-    (MbaSpa, bit(10)) ? defaultMaskedError;
+    (rMBADDRPHYFIR, bit(60)) ? self_th_32perDay;
+
 };
 
  ##############################################################################
@@ -859,54 +723,7 @@ group gMbaSpa attntype SPECIAL filter singlebit
  ##############################################################################
 
 # Include the common action set.
-.include "CommonActions.rule";
-
-################################################################################
-# Higher level actions
-################################################################################
-
-/** Analyze maintenance command complete */
-actionclass analyzeMaintCmdComplete
-{
-    funccall("MaintCmdComplete");  # Must be called last so return code can be
-                                   # passed on to rule code.
-};
-
-/** Callout MBA and DIMMs on Port 0 */
-actionclass CalloutMbaAndDimmOnPort0
-{
-    funccall("CalloutMbaAndDimmOnPort0");
-    threshold1;
-};
-
-/** Callout MBA and DIMMs on Port 1 */
-actionclass CalloutMbaAndDimmOnPort1
-{
-    funccall("CalloutMbaAndDimmOnPort1");
-    threshold1;
-};
-
-/** Handle RCD Parity Error 0 */
-actionclass RcdParityError0
-{
-    funccall("maskRcdParitySideEffects");
-    CalloutMbaAndDimmOnPort0;
-    SUEGenerationPoint;
-};
-
-/** Handle RCD Parity Error 1 */
-actionclass RcdParityError1
-{
-    funccall("maskRcdParitySideEffects");
-    CalloutMbaAndDimmOnPort1;
-    SUEGenerationPoint;
-};
-
-/** Callouts specific to MBASECUREFIR attentions. */
-actionclass secureFirCallout
-{
-    callout2ndLvlMed;
-    calloutSelfLow;
-    threshold1;
-};
+.include "cen_common_actions.rule";
+# Include the chip-specific action set.
+.include "cen_mba_actions.rule";
 
diff --git a/src/usr/diag/prdf/common/plat/pegasus/Membuf_regs_NEST.rule b/src/usr/diag/prdf/common/plat/pegasus/Membuf_regs_NEST.rule
index d53d22120..56db89619 100755
--- a/src/usr/diag/prdf/common/plat/pegasus/Membuf_regs_NEST.rule
+++ b/src/usr/diag/prdf/common/plat/pegasus/Membuf_regs_NEST.rule
@@ -215,14 +215,6 @@
         capture     group FirRegs;
     };
 
-    register MBSFIR_MASK_OR
-    {
-        name        "MBU.MBS.MBS_FIR_MASK_REG OR";
-        scomaddr    0x02011405;
-        capture     group never;
-        access      write_only;
-    };
-
     register MBSFIR_ACT0
     {
         name        "MBU.MBS.MBS_FIR_ACTION0_REG";
diff --git a/src/usr/diag/prdf/common/plat/pegasus/prdfCenMba.C b/src/usr/diag/prdf/common/plat/pegasus/prdfCenMba.C
deleted file mode 100755
index 49145327c..000000000
--- a/src/usr/diag/prdf/common/plat/pegasus/prdfCenMba.C
+++ /dev/null
@@ -1,301 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/usr/diag/prdf/common/plat/pegasus/prdfCenMba.C $          */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2012,2016                        */
-/* [+] International Business Machines Corp.                              */
-/*                                                                        */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-
-/** @file  prdfCenMba.C
- *  @brief Contains all common plugin code for the Centaur MBA
- */
-
-// Framework includes
-#include <iipServiceDataCollector.h>
-#include <prdfExtensibleChip.H>
-#include <prdfPlatServices.H>
-#include <prdfPluginMap.H>
-
-// Pegasus includes
-#include <prdfCalloutUtil.H>
-#include <prdfCenMbaCaptureData.H>
-#include <prdfCenMbaDataBundle.H>
-
-using namespace TARGETING;
-
-namespace PRDF
-{
-
-using namespace PlatServices;
-
-namespace Mba
-{
-// Forward Declarations
-
-int32_t CalloutMbaAndDimm( ExtensibleChip * i_chip,
-                           STEP_CODE_DATA_STRUCT & i_sc, uint32_t i_port );
-
-//##############################################################################
-//
-//                             Special plugins
-//
-//##############################################################################
-
-/**
- * @brief  Plugin that initializes the P8 Centaur MBA data bundle.
- * @param  i_mbaChip A Centaur MBA chip.
- * @return SUCCESS
- */
-int32_t Initialize( ExtensibleChip * i_mbaChip )
-{
-    i_mbaChip->getDataBundle() = new CenMbaDataBundle( i_mbaChip );
-    return SUCCESS;
-}
-PRDF_PLUGIN_DEFINE( Mba, Initialize );
-
-//##############################################################################
-//
-//                                   MBASPA
-//
-//##############################################################################
-
-/**
- * @brief  MBASPA[0] - Maintenance command complete.
- * @param  i_mbaChip A Centaur MBA chip.
- * @param  i_sc      The step code data struct.
- * @return SUCCESS
- */
-int32_t MaintCmdComplete( ExtensibleChip * i_mbaChip,
-                          STEP_CODE_DATA_STRUCT & i_sc )
-{
-    #define PRDF_FUNC "[Mba::MaintCmdComplete] "
-
-    int32_t l_rc = SUCCESS;
-
-    CenMbaDataBundle * mbadb = getMbaDataBundle( i_mbaChip );
-
-    // Tell the TD controller that a maintenance command complete occurred.
-    l_rc = mbadb->iv_tdCtlr.handleCmdCompleteEvent( i_sc );
-    if ( SUCCESS != l_rc )
-    {
-        PRDF_ERR( PRDF_FUNC "Failed: i_mbaChip=0x%08x", i_mbaChip->GetId() );
-        CalloutUtil::defaultError( i_sc );
-    }
-
-    // Gather capture data even if something failed above.
-    // NOTE: There is no need to capture if the maintenance command complete was
-    //       successful with no errors because the error log will not be
-    //       committed.
-    if ( !i_sc.service_data->queryDontCommitErrl() )
-        MemCaptureData::addEccData<TYPE_MBA>( i_mbaChip, i_sc );
-
-    return PRD_NO_CLEAR_FIR_BITS; // FIR bits are cleared by this plugin
-
-    #undef PRDF_FUNC
-}
-PRDF_PLUGIN_DEFINE( Mba, MaintCmdComplete );
-
-/**
- * @brief  Plugin to add MBA and Dimms behind port 0 to callout list.
- * @param  i_chip   mba chip
- * @param  i_sc     The step code data struct.
- * @return SUCCESS
- */
-int32_t CalloutMbaAndDimmOnPort0( ExtensibleChip * i_chip,
-                           STEP_CODE_DATA_STRUCT & i_sc )
-{
-    return CalloutMbaAndDimm( i_chip, i_sc, 0);
-}
-PRDF_PLUGIN_DEFINE( Mba, CalloutMbaAndDimmOnPort0 );
-
-/**
- * @brief  Plugin to add MBA and Dimms behind port 1 to callout list.
- * @param  i_chip   mba chip
- * @param  i_sc     The step code data struct.
- * @return SUCCESS
- */
-int32_t CalloutMbaAndDimmOnPort1( ExtensibleChip * i_chip,
-                           STEP_CODE_DATA_STRUCT & i_sc )
-{
-    return CalloutMbaAndDimm( i_chip, i_sc, 1);
-}
-PRDF_PLUGIN_DEFINE( Mba, CalloutMbaAndDimmOnPort1 );
-
-/**
- * @brief  Plugin to add MBA and Dimms behind given port to callout list.
- * @param  i_chip   mba chip
- * @param  i_sc     The step code data struct.
- * @param  i_port   Port Number.
- * @return SUCCESS
- */
-int32_t CalloutMbaAndDimm( ExtensibleChip * i_chip,
-                           STEP_CODE_DATA_STRUCT & i_sc, uint32_t i_port )
-{
-    using namespace TARGETING;
-    using namespace CalloutUtil;
-    int32_t o_rc = SUCCESS;
-    TargetHandle_t mbaTarget = i_chip->GetChipHandle();
-
-    TargetHandleList calloutList = getConnectedDimms( mbaTarget, i_port );
-    i_sc.service_data->SetCallout( mbaTarget, MRU_LOW );
-
-    for ( TargetHandleList::iterator it = calloutList.begin();
-          it != calloutList.end(); it++)
-    {
-       i_sc.service_data->SetCallout( *it,MRU_HIGH );
-    }
-    return o_rc;
-}
-
-/**
- * @brief  Plugin to mask the side effects of an RCD parity error
- * @param  i_mbaChip A Centaur MBA chip.
- * @param  i_sc      The step code data struct.
- * @return SUCCESS
- */
-int32_t maskRcdParitySideEffects( ExtensibleChip * i_mbaChip,
-                                    STEP_CODE_DATA_STRUCT & i_sc )
-{
-    #define PRDF_FUNC "[maskRcdParitySideEffects] "
-
-    int32_t l_rc = SUCCESS;
-
-    do
-    {
-        //use a data bundle to get the membuf chip
-        CenMbaDataBundle * mbadb = getMbaDataBundle( i_mbaChip );
-        ExtensibleChip * membChip = mbadb->getMembChip();
-        if (NULL == membChip)
-        {
-            PRDF_ERR(PRDF_FUNC "getMembChip() failed");
-            break;
-        }
-
-        //get the FIRs
-        SCAN_COMM_REGISTER_CLASS * mbsFir =
-            membChip->getRegister("MBSFIR");
-        SCAN_COMM_REGISTER_CLASS * mbaCalFir =
-            i_mbaChip->getRegister("MBACALFIR");
-        SCAN_COMM_REGISTER_CLASS * mbaFir =
-            i_mbaChip->getRegister("MBAFIR");
-
-        l_rc  = mbsFir->Read();
-        l_rc |= mbaCalFir->Read();
-        l_rc |= mbaFir->Read();
-
-        if (SUCCESS != l_rc)
-        {
-            PRDF_ERR(PRDF_FUNC "MBSFIR/MBACALFIR/MBAFIR read failed for"
-                     " 0x%08x", i_mbaChip->GetId());
-            break;
-        }
-
-        //get the masks for each FIR
-        SCAN_COMM_REGISTER_CLASS * mbsFirMaskOr =
-            membChip->getRegister("MBSFIR_MASK_OR");
-        SCAN_COMM_REGISTER_CLASS * mbaCalMaskOr =
-            i_mbaChip->getRegister("MBACALFIR_MASK_OR");
-        SCAN_COMM_REGISTER_CLASS * mbaFirMaskOr =
-            i_mbaChip->getRegister("MBAFIR_MASK_OR");
-
-        //set the masks only if the side effect bit is set
-        if (mbaFir->IsBitSet(2))
-        {
-            mbaFirMaskOr->SetBit(2);
-            l_rc = mbaFirMaskOr->Write();
-            if (SUCCESS != l_rc)
-            {
-                PRDF_ERR(PRDF_FUNC "MBAFIR_MASK_OR write failed for "
-                         "0x%08x", i_mbaChip->GetId());
-                break;
-            }
-        }
-
-        if (mbaCalFir->IsBitSet(2))
-        {
-            mbaCalMaskOr->SetBit(2);
-            l_rc = mbaCalMaskOr->Write();
-            if (SUCCESS != l_rc)
-            {
-                PRDF_ERR(PRDF_FUNC "MBACALFIR_MASK_OR write failed for "
-                         "0x%08x", i_mbaChip->GetId());
-                break;
-            }
-
-        }
-
-        if (mbaCalFir->IsBitSet(17))
-        {
-            mbaCalMaskOr->SetBit(17);
-            l_rc = mbaCalMaskOr->Write();
-            if (SUCCESS != l_rc)
-            {
-                PRDF_ERR(PRDF_FUNC "MBACALFIR_MASK_OR write failed for "
-                         "0x%08x", i_mbaChip->GetId());
-                break;
-            }
-        }
-
-        if (mbsFir->IsBitSet(4))
-        {
-            mbsFirMaskOr->SetBit(4);
-            l_rc = mbsFirMaskOr->Write();
-            if (SUCCESS != l_rc)
-            {
-                PRDF_ERR(PRDF_FUNC "MBSFIR_MASK_OR write failed for "
-                         "0x%08x", membChip->GetId());
-                break;
-            }
-
-        }
-    }while(0);
-
-    return SUCCESS;
-    #undef PRDF_FUNC
-}
-PRDF_PLUGIN_DEFINE( Mba, maskRcdParitySideEffects );
-
-
-//------------------------------------------------------------------------------
-
-/**
- * @brief   When not in MNFG mode, clear the service call flag so that
- *          thresholding will still be done, but no visible error log committed.
- * @param   i_chip MBA chip
- * @param   i_sc   Step code data struct
- * @returns SUCCESS always
- */
-int32_t ClearServiceCallFlag( ExtensibleChip * i_chip,
-                              STEP_CODE_DATA_STRUCT & i_sc )
-{
-    if ( i_sc.service_data->IsAtThreshold() && !mfgMode() &&
-         (CHECK_STOP != i_sc.service_data->getPrimaryAttnType()) &&
-         (!i_sc.service_data->queryFlag(ServiceDataCollector::UNIT_CS)) )
-    {
-        i_sc.service_data->clearServiceCall();
-    }
-
-    return SUCCESS;
-}
-PRDF_PLUGIN_DEFINE( Mba, ClearServiceCallFlag );
-
-} // end namespace Mba
-
-} // end namespace PRDF
diff --git a/src/usr/diag/prdf/plat/mem/prdfCenMba.C b/src/usr/diag/prdf/plat/mem/prdfCenMba.C
index 994225416..8d2252a33 100644
--- a/src/usr/diag/prdf/plat/mem/prdfCenMba.C
+++ b/src/usr/diag/prdf/plat/mem/prdfCenMba.C
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* OpenPOWER HostBoot Project                                             */
 /*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2017                             */
+/* Contributors Listed Below - COPYRIGHT 2017,2018                        */
 /* [+] International Business Machines Corp.                              */
 /*                                                                        */
 /*                                                                        */
@@ -44,24 +44,6 @@ namespace cen_mba
 
 //##############################################################################
 //
-//                             Special plugins
-//
-//##############################################################################
-
-/**
- * @brief  Plugin that initializes the data bundle.
- * @param  i_mbaChip An MBA chip.
- * @return SUCCESS
- */
-int32_t Initialize( ExtensibleChip * i_mbaChip )
-{
-    i_mbaChip->getDataBundle() = new MbaDataBundle( i_mbaChip );
-    return SUCCESS;
-}
-PRDF_PLUGIN_DEFINE( cen_mba, Initialize );
-
-//##############################################################################
-//
 //                                 MBASPA
 //
 //##############################################################################