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author | Zane Shelley <zshelle@us.ibm.com> | 2018-04-24 12:28:01 -0500 |
---|---|---|
committer | Zane C. Shelley <zshelle@us.ibm.com> | 2018-04-27 21:29:53 -0400 |
commit | 2583834bd212e5ef15bb54bf2cfc48fb571a0007 (patch) | |
tree | 595791daacbfa9f89321c22b4914c13c0f7ac237 | |
parent | ed55b087c5b070c99bdd4cb379e1291282d89897 (diff) | |
download | talos-hostboot-2583834bd212e5ef15bb54bf2cfc48fb571a0007.tar.gz talos-hostboot-2583834bd212e5ef15bb54bf2cfc48fb571a0007.zip |
PRD: PLL and Lane Repair rule code support
Change-Id: I4a3d33e807459123ad9534e98ab4e26d798bad50
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/57755
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Matt Derksen <mderkse1@us.ibm.com>
Reviewed-by: Benjamin J. Weisenbeck <bweisenb@us.ibm.com>
Reviewed-by: Caleb N. Palmer <cnpalmer@us.ibm.com>
Reviewed-by: Zane C. Shelley <zshelle@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/57885
CI-Ready: Zane C. Shelley <zshelle@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
4 files changed, 112 insertions, 24 deletions
diff --git a/src/usr/diag/prdf/common/plat/cen/cen_centaur.rule b/src/usr/diag/prdf/common/plat/cen/cen_centaur.rule index 240615c62..d2e2b28fa 100644 --- a/src/usr/diag/prdf/common/plat/cen/cen_centaur.rule +++ b/src/usr/diag/prdf/common/plat/cen/cen_centaur.rule @@ -759,12 +759,12 @@ group gTP_LFIR filter singlebit, cs_root_cause( 19, 20 ) /** TP_LFIR[19] * NEST PLL unlock */ - (rTP_LFIR, bit(19)) ? TBDDefaultCallout; + (rTP_LFIR, bit(19)) ? pll_unlock_UERE; /** TP_LFIR[20] * MEM PLL unlock */ - (rTP_LFIR, bit(20)) ? TBDDefaultCallout; + (rTP_LFIR, bit(20)) ? pll_unlock_UERE; /** TP_LFIR[21:39] * Reserved @@ -982,22 +982,22 @@ group gDMIFIR filter priority( 10, 2, 11, 12, 9 ), /** DMIFIR[9] * Spare lane deployed */ - (rDMIFIR, bit(9)) ? TBDDefaultCallout; + (rDMIFIR, bit(9)) ? spareDeployed_dmibus; /** DMIFIR[10] * Max spares exceeded */ - (rDMIFIR, bit(10)) ? TBDDefaultCallout; + (rDMIFIR, bit(10)) ? maxSparesExceeded_dmibus_UERE; /** DMIFIR[11] * Recal or dynamic repair error */ - (rDMIFIR, bit(11)) ? TBDDefaultCallout; + (rDMIFIR, bit(11)) ? calloutBusInterface_dmibus_th1; /** DMIFIR[12] * Too many bus errors */ - (rDMIFIR, bit(12)) ? TBDDefaultCallout; + (rDMIFIR, bit(12)) ? tooManyBusErrors_dmibus; /** DMIFIR[13:15] * Reserved @@ -1195,7 +1195,7 @@ group gMBSFIR filter singlebit, cs_root_cause( 0, 1, 2, 4, 6, 8, 10, 13, 16, 18, /** MBSFIR[0] * HOST_PROTOCOL_ERROR */ - (rMBSFIR, bit(0)) ? TBDDefaultCallout; + (rMBSFIR, bit(0)) ? calloutBusInterface_dmibus_th1_UERE; /** MBSFIR[1] * INT_PROTOCOL_ERROR diff --git a/src/usr/diag/prdf/common/plat/cen/cen_centaur_actions.rule b/src/usr/diag/prdf/common/plat/cen/cen_centaur_actions.rule index 47a75bfad..da827cec8 100644 --- a/src/usr/diag/prdf/common/plat/cen/cen_centaur_actions.rule +++ b/src/usr/diag/prdf/common/plat/cen/cen_centaur_actions.rule @@ -59,6 +59,62 @@ actionclass l4_th_32perDay { calloutL4; threshold32pday; }; /** Callout the connected L4, threshold 1, SUE source */ actionclass l4_th_1_UERE { l4_th_1; SueSource; }; +/** PLL error */ +actionclass pll_unlock_UERE +{ + # These FIR bits should never trigger directly themselves in the rule code. + # Instead, They should be handled by global PRD PLL isolation code. We will + # add a threshold here to prevent flooding, just in case. + threshold32pday; +}; + +/** Callout the DMI BUS interface */ +actionclass calloutBusInterface_dmibus +{ +# TODO: RTC 144057 +# funccall("calloutBusInterfacePlugin"); +}; + +/** Callout the DMI BUS interface, threshold 1 */ +actionclass calloutBusInterface_dmibus_th1 +{ + calloutBusInterface_dmibus; + threshold1; +}; + +/** Callout the DMI BUS interface, threshold 1 */ +actionclass calloutBusInterface_dmibus_th1_UERE +{ + calloutBusInterface_dmibus; + threshold1; + SueSource; +}; + +/** Lane Repair: spare deployed */ +actionclass spareDeployed_dmibus +{ + calloutBusInterface_dmibus; +# TODO: RTC 144057 +# funccall("spareDeployed"); +}; + +/** Lane Repair: max spares exceeded */ +actionclass maxSparesExceeded_dmibus_UERE +{ + calloutBusInterface_dmibus_th1; +# TODO: RTC 144057 +# funccall("maxSparesExceeded"); + SueSource; # channel failure +}; + +/** Lane Repair: too many bus errors */ +actionclass tooManyBusErrors_dmibus +{ + calloutBusInterface_dmibus_th1; +# TODO: RTC 144057 +# funccall("tooManyBusErrors"); +}; + /** L4 cache SRW CE */ actionclass l4_cache_srw_ce { diff --git a/src/usr/diag/prdf/common/plat/cen/cen_centaur_regs.rule b/src/usr/diag/prdf/common/plat/cen/cen_centaur_regs.rule index 2689a439b..6c375feec 100644 --- a/src/usr/diag/prdf/common/plat/cen/cen_centaur_regs.rule +++ b/src/usr/diag/prdf/common/plat/cen/cen_centaur_regs.rule @@ -132,6 +132,53 @@ }; ############################################################################ + # Non-existent Registers for Capture + ############################################################################ + + register VPD_FAILED_LANES_0TO63 + { + name "Bit map 0-63 of failed lanes read from VPD"; + scomaddr 0xFFFF0001; + access no_access; + capture group never; + }; + + register VPD_FAILED_LANES_64TO127 + { + name "Bit map 64-127 of failed lanes read from VPD"; + scomaddr 0xFFFF0002; + access no_access; + capture group never; + }; + + register ALL_FAILED_LANES_0TO63 + { + name "Bit map 0-63 of failed lanes from io_read_erepair"; + scomaddr 0xFFFF0003; + access no_access; + capture group never; + }; + + register ALL_FAILED_LANES_64TO127 + { + name "Bit map 64-127 of failed lanes from io_read_erepair"; + scomaddr 0xFFFF0004; + access no_access; + capture group never; + }; + + ############################################################################ + # PLL Registers + ############################################################################ + + register CFAM_FSI_STATUS + { + name "VI.FSI.STATUS"; + scomaddr 0x00001007; + capture group never; + }; + + ############################################################################ # L4 cache address trap ############################################################################ diff --git a/src/usr/diag/prdf/common/plat/pegasus/Membuf_acts_NEST.rule b/src/usr/diag/prdf/common/plat/pegasus/Membuf_acts_NEST.rule index 920276ccd..5f9c522e7 100755 --- a/src/usr/diag/prdf/common/plat/pegasus/Membuf_acts_NEST.rule +++ b/src/usr/diag/prdf/common/plat/pegasus/Membuf_acts_NEST.rule @@ -60,18 +60,11 @@ actionclass mba1MemoryUe try ( funccall("handleSingleMbaCalParityErr1"), analyzeFetchUe1 ); }; -/** Clear MBS SecondaryBits and calloutDmiBusTh1UE */ +/** Clear MBS SecondaryBits and calloutBusInterface_dmibus_th1_UERE */ actionclass clearSecMbsBitsCalloutDmiBusTh1UE { funccall("ClearMbsSecondaryBits"); - calloutDmiBusTh1UE; -}; - -/** Callout the DMI bus, threshold 1 */ -actionclass calloutDmiBusTh1UE -{ - calloutDmiBusTh1; - SUEGenerationPoint; + calloutBusInterface_dmibus_th1_UERE; }; /** Callout the DMI bus, threshold 1 */ @@ -86,14 +79,6 @@ actionclass analyzeSpareBitAndThr try( funccall("checkSpareBit"), calloutDmiBusTh2pday ); }; -/** Lane Repair: spare deployed */ -actionclass spareDeployed -{ calloutDmiBus; funccall("spareDeployed"); }; - -/** Lane Repair: max spares exceeded */ -actionclass maxSparesExceeded -{ calloutDmiBusTh1; funccall("maxSparesExceeded"); }; - /** Analyze a fetch MPE on MBA0 rank 0 */ actionclass analyzeFetchMpe0_0 { funccall("AnalyzeFetchMpe0_0"); }; |