diff options
| author | Andre Marin <aamarin@us.ibm.com> | 2016-06-06 06:25:47 -0500 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2016-07-13 14:22:22 -0400 |
| commit | cf311d5d2bc2f360cbe8f963a59b998c35789ec8 (patch) | |
| tree | 1215ccfce82397c899002c5cba91114544df85e6 | |
| parent | 3e93039cb39045960d20306da94a20a4885cf67f (diff) | |
| download | talos-hostboot-cf311d5d2bc2f360cbe8f963a59b998c35789ec8.tar.gz talos-hostboot-cf311d5d2bc2f360cbe8f963a59b998c35789ec8.zip | |
Modify SPD blob and eff-config hardcoding to match VBU
Change-Id: If663431e64cb3432b4a77949e7a8cdc26b8eb35f
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/25970
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Brian R. Silver <bsilver@us.ibm.com>
Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com>
Reviewed-by: JACOB L. HARVEY <jlharvey@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/25971
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
12 files changed, 1328 insertions, 541 deletions
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/eff_config.C b/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/eff_config.C index 4fda55370..4af8104b8 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/eff_config.C +++ b/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/eff_config.C @@ -28,8 +28,10 @@ #include <fapi2.H> #include <mss.H> + #include <lib/eff_config/eff_config.H> #include <lib/eff_config/timing.H> +#include <lib/spd/spd_decoder.H> #include <lib/dimm/rank.H> #include <lib/utils/conversions.H> @@ -41,6 +43,122 @@ using fapi2::TARGET_TYPE_MCBIST; namespace mss { +///////////////////////// +// Non-member function implementations +///////////////////////// + +// TK - Refactor functions to make them more +// testable with next larger change set of decoder +// and eff_config refactoring. Currently, +// goal of achieving VBU value is achieved. - AAM + +/// +/// @brief Returns Logical ranks in Primary SDRAM type +/// @param[in] i_target dimm target +/// @param[in] i_pDecoder shared pointer to the SPD decoder +/// @param[out] o_logical_ranks number of logical ranks +/// @return fapi2::FAPI2_RC_SUCCESS if okay +/// +fapi2::ReturnCode prim_sdram_logical_ranks(const fapi2::Target<TARGET_TYPE_DIMM>& i_target, + const std::shared_ptr<spd::decoder>& i_pDecoder, + uint8_t& o_logical_ranks) +{ + uint8_t l_signal_loading = 0; + uint8_t l_ranks_per_dimm = 0; + FAPI_TRY( i_pDecoder->prim_sdram_signal_loading(i_target, l_signal_loading) ); + FAPI_TRY( i_pDecoder->num_package_ranks_per_dimm(i_target, l_ranks_per_dimm) ); + + if(l_signal_loading == spd::SINGLE_LOAD_STACK) + { + uint8_t l_die_count = 0; + FAPI_TRY( i_pDecoder->prim_sdram_die_count(i_target, l_die_count) ); + + o_logical_ranks = l_ranks_per_dimm * l_die_count; + } + else + { + // Covers case for MONOLITHIC & MULTI_LOAD_STACK + o_logical_ranks = l_ranks_per_dimm; + } + +fapi_try_exit: + return fapi2::current_err; +} + +/// +/// @brief Returns Logical ranks in Secondary SDRAM type +/// @param[in] i_target dimm target +/// @param[in] i_pDecoder shared pointer to the SPD decoder +/// @param[out] o_logical_ranks number of logical ranks +/// @return fapi2::FAPI2_RC_SUCCESS if okay +/// +fapi2::ReturnCode sec_sdram_logical_ranks(const fapi2::Target<TARGET_TYPE_DIMM>& i_target, + const std::shared_ptr<spd::decoder>& i_pDecoder, + uint8_t& o_logical_ranks) +{ + uint8_t l_signal_loading = 0; + uint8_t l_ranks_per_dimm = 0; + + FAPI_TRY( i_pDecoder->sec_sdram_signal_loading(i_target, l_signal_loading) ); + FAPI_TRY( i_pDecoder->num_package_ranks_per_dimm(i_target, l_ranks_per_dimm) ); + + if(l_signal_loading == spd::SINGLE_LOAD_STACK) + { + uint8_t l_die_count = 0; + FAPI_TRY( i_pDecoder->sec_sdram_die_count(i_target, l_die_count) ); + + o_logical_ranks = l_ranks_per_dimm * l_die_count; + } + else + { + // Covers case for MONOLITHIC & MULTI_LOAD_STACK + o_logical_ranks = l_ranks_per_dimm; + } + +fapi_try_exit: + return fapi2::current_err; +} + + +/// +/// @brief Returns Logical ranks per DIMM +/// @param[in] i_target dimm target +/// @param[in] i_pDecoder shared pointer to the SPD decoder +/// @param[out] o_logical_ranks number of logical ranks +/// @return fapi2::FAPI2_RC_SUCCESS if okay +/// +fapi2::ReturnCode logical_ranks_per_dimm(const fapi2::Target<TARGET_TYPE_DIMM>& i_target, + const std::shared_ptr<spd::decoder>& i_pDecoder, + uint8_t& o_logical_rank_per_dimm) +{ + uint8_t l_rank_mix = 0; + + FAPI_TRY( i_pDecoder->rank_mix(i_target, l_rank_mix) ); + + if(l_rank_mix == spd::SYMMETRICAL) + { + FAPI_TRY( prim_sdram_logical_ranks(i_target, i_pDecoder, o_logical_rank_per_dimm) ); + } + else + { + // Rank mix is ASYMMETRICAL + uint8_t l_prim_logical_rank_per_dimm = 0; + uint8_t l_sec_logical_rank_per_dimm = 0; + + FAPI_TRY( prim_sdram_logical_ranks(i_target, i_pDecoder, l_prim_logical_rank_per_dimm) ); + FAPI_TRY( sec_sdram_logical_ranks(i_target, i_pDecoder, l_sec_logical_rank_per_dimm) ); + + o_logical_rank_per_dimm = l_prim_logical_rank_per_dimm + l_sec_logical_rank_per_dimm; + } + +fapi_try_exit: + return fapi2::current_err; +} + +///////////////////////// +// Member Method implementation +///////////////////////// + /// /// @brief Determines & sets effective config for DRAM generation from SPD /// @param[in] i_target FAPI2 target @@ -50,21 +168,18 @@ fapi2::ReturnCode eff_config::dram_gen(const fapi2::Target<TARGET_TYPE_DIMM>& i_ const std::vector<uint8_t>& i_spd_data ) { const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target); + const auto l_port_num = index( find_target<TARGET_TYPE_MCA>(i_target) ); + const auto l_dimm_num = index(i_target); uint8_t l_decoder_val = 0; - FAPI_TRY( spd::dram_device_type(i_target, i_spd_data, l_decoder_val) ); + uint8_t l_mcs_attrs[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; // Get & update MCS attribute - { - const auto l_port_num = index( find_target<TARGET_TYPE_MCA>(i_target) ); - const auto l_dimm_num = index(i_target); - - uint8_t l_mcs_attrs[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; - FAPI_TRY( eff_dram_gen(l_mcs, &l_mcs_attrs[0][0]) ); + FAPI_TRY( eff_dram_gen(l_mcs, &l_mcs_attrs[0][0]) ); + FAPI_TRY( spd::dram_device_type(i_target, i_spd_data, l_decoder_val) ); - l_mcs_attrs[l_port_num][l_dimm_num] = l_decoder_val; - FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DRAM_GEN, l_mcs, l_mcs_attrs) ); - } + l_mcs_attrs[l_port_num][l_dimm_num] = l_decoder_val; + FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DRAM_GEN, l_mcs, l_mcs_attrs) ); fapi_try_exit: return fapi2::current_err; @@ -81,21 +196,18 @@ fapi2::ReturnCode eff_config::dimm_type(const fapi2::Target<TARGET_TYPE_DIMM>& i const std::vector<uint8_t>& i_spd_data ) { const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target); + const auto l_port_num = index( find_target<TARGET_TYPE_MCA>(i_target) ); + const auto l_dimm_num = index(i_target); uint8_t l_decoder_val = 0; - FAPI_TRY( spd::base_module_type(i_target, i_spd_data, l_decoder_val) ); + uint8_t l_mcs_attrs[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; // Get & update MCS attribute - { - const auto l_port_num = index( find_target<TARGET_TYPE_MCA>(i_target) ); - const auto l_dimm_num = index(i_target); - - uint8_t l_mcs_attrs[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; - FAPI_TRY( eff_dimm_type(l_mcs, &l_mcs_attrs[0][0]) ); + FAPI_TRY( eff_dimm_type(l_mcs, &l_mcs_attrs[0][0]) ); + FAPI_TRY( spd::base_module_type(i_target, i_spd_data, l_decoder_val) ); - l_mcs_attrs[l_port_num][l_dimm_num] = l_decoder_val; - FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DIMM_TYPE, l_mcs, l_mcs_attrs) ); - } + l_mcs_attrs[l_port_num][l_dimm_num] = l_decoder_val; + FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DIMM_TYPE, l_mcs, l_mcs_attrs) ); fapi_try_exit: return fapi2::current_err; @@ -107,25 +219,21 @@ fapi_try_exit: /// @param[in] i_target FAPI2 target /// @return fapi2::FAPI2_RC_SUCCESS if okay /// -fapi2::ReturnCode eff_config::dram_width(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target) +fapi2::ReturnCode eff_config::dram_width(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) { const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target); + const auto l_port_num = index( find_target<TARGET_TYPE_MCA>(i_target) ); + const auto l_dimm_num = index(i_target); uint8_t l_decoder_val = 0; - FAPI_TRY( iv_pDecoder->device_width(i_target, l_decoder_val) ); + uint8_t l_mcs_attrs[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; // Get & update MCS attribute - { - const auto l_port_num = index( find_target<TARGET_TYPE_MCA>(i_target) ); - const auto l_dimm_num = index(i_target); - - uint8_t l_mcs_attrs[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; - FAPI_TRY( eff_dram_width(l_mcs, &l_mcs_attrs[0][0]) ); + FAPI_TRY( iv_pDecoder->device_width(i_target, l_decoder_val) ); + FAPI_TRY( eff_dram_width(l_mcs, &l_mcs_attrs[0][0]) ); - // TK - RIT skeleton. Need to finish - BRS - l_mcs_attrs[l_port_num][l_dimm_num] = 0x04; - FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DRAM_WIDTH, l_mcs, l_mcs_attrs) ); - } + l_mcs_attrs[l_port_num][l_dimm_num] = l_decoder_val; + FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DRAM_WIDTH, l_mcs, l_mcs_attrs) ); fapi_try_exit: return fapi2::current_err; @@ -137,7 +245,7 @@ fapi_try_exit: /// @param[in] i_target FAPI2 target /// @return fapi2::FAPI2_RC_SUCCESS if okay /// -fapi2::ReturnCode eff_config::dram_density(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target) +fapi2::ReturnCode eff_config::dram_density(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) { const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target); @@ -152,8 +260,7 @@ fapi2::ReturnCode eff_config::dram_density(const fapi2::Target<fapi2::TARGET_TYP uint8_t l_mcs_attrs[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; FAPI_TRY( eff_dram_density(l_mcs, &l_mcs_attrs[0][0]) ); - // TK - RIT skeleton. Need to finish - BRS - l_mcs_attrs[l_port_num][l_dimm_num] = 0x04; + l_mcs_attrs[l_port_num][l_dimm_num] = l_decoder_val; FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DRAM_DENSITY, l_mcs, l_mcs_attrs) ); } @@ -167,25 +274,22 @@ fapi_try_exit: /// @param[in] i_target FAPI2 target /// @return fapi2::FAPI2_RC_SUCCESS if okay /// -fapi2::ReturnCode eff_config::ranks_per_dimm(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target) +fapi2::ReturnCode eff_config::ranks_per_dimm(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) { const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target); + const auto l_port_num = index( find_target<TARGET_TYPE_MCA>(i_target) ); + const auto l_dimm_num = index(i_target); - uint8_t l_decoder_val = 0; - FAPI_TRY( iv_pDecoder->num_package_ranks_per_dimm(i_target, l_decoder_val) ); + uint8_t l_ranks_per_dimm = 0; + uint8_t l_attrs_ranks_per_dimm[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; // Get & update MCS attribute - { - const auto l_port_num = index( find_target<TARGET_TYPE_MCA>(i_target) ); - const auto l_dimm_num = index(i_target); + FAPI_TRY( eff_num_ranks_per_dimm(l_mcs, &l_attrs_ranks_per_dimm[0][0]) ); + FAPI_TRY( logical_ranks_per_dimm(i_target, iv_pDecoder, l_ranks_per_dimm) ); - uint8_t l_attrs_ranks_per_dimm[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; - FAPI_TRY(eff_num_ranks_per_dimm(l_mcs, &l_attrs_ranks_per_dimm[0][0])); + l_attrs_ranks_per_dimm[l_port_num][l_dimm_num] = l_ranks_per_dimm; + FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_NUM_RANKS_PER_DIMM, l_mcs, l_attrs_ranks_per_dimm) ); - // TK - RIT skeleton. Need to finish - BRS - l_attrs_ranks_per_dimm[l_port_num][l_dimm_num] = 0x2; - FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_NUM_RANKS_PER_DIMM, l_mcs, l_attrs_ranks_per_dimm) ); - } fapi_try_exit: return fapi2::current_err; @@ -198,16 +302,19 @@ fapi_try_exit: /// @param[in] i_target FAPI2 target /// @return fapi2::FAPI2_RC_SUCCESS if okay /// -fapi2::ReturnCode eff_config::master_ranks_per_dimm(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target) +fapi2::ReturnCode eff_config::master_ranks_per_dimm(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) { - // TK - RIT skeleton. Need to finish - AAM const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target); const auto l_mca = find_target<TARGET_TYPE_MCA>(i_target); + uint8_t l_decoder_val = 0; uint8_t l_attrs_master_ranks_per_dimm[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; + + // Get & update MCS attribute + FAPI_TRY( iv_pDecoder->num_package_ranks_per_dimm(i_target, l_decoder_val) ); FAPI_TRY(eff_num_master_ranks_per_dimm(l_mcs, &l_attrs_master_ranks_per_dimm[0][0])); - l_attrs_master_ranks_per_dimm[index(l_mca)][index(i_target)] = 0x02; + l_attrs_master_ranks_per_dimm[index(l_mca)][index(i_target)] = l_decoder_val; FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_NUM_MASTER_RANKS_PER_DIMM, l_mcs, l_attrs_master_ranks_per_dimm) ); fapi_try_exit: @@ -219,7 +326,7 @@ fapi_try_exit: /// @param[in] i_target FAPI2 target /// @return fapi2::FAPI2_RC_SUCCESS if okay /// -fapi2::ReturnCode eff_config::primary_stack_type(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target) +fapi2::ReturnCode eff_config::primary_stack_type(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) { uint8_t l_decoder_val = 0; FAPI_TRY( iv_pDecoder->prim_sdram_signal_loading(i_target, l_decoder_val) ); @@ -248,20 +355,37 @@ fapi_try_exit: /// @warn Dependent on the following attributes already set: /// @warn eff_dram_density, eff_sdram_width, eff_ranks_per_dimm /// -fapi2::ReturnCode eff_config::dimm_size(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target) +fapi2::ReturnCode eff_config::dimm_size(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) { - // TK - RIT skeleton. Need to finish - AAM - const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target); + // Retrieve values needed to calculate dimm size + uint8_t l_bus_width = 0; + uint8_t l_sdram_width = 0; + uint8_t l_sdram_density = 0; + uint8_t l_logical_rank_per_dimm = 0; - // Get & update MCS attribute - const auto l_port_num = index( find_target<TARGET_TYPE_MCA>(i_target) ); - const auto l_dimm_num = index(i_target); + FAPI_TRY( iv_pDecoder->device_width(i_target, l_sdram_width) ); + FAPI_TRY( iv_pDecoder->prim_bus_width(i_target, l_bus_width) ); + FAPI_TRY( iv_pDecoder->sdram_density(i_target, l_sdram_density) ); + FAPI_TRY( logical_ranks_per_dimm(i_target, iv_pDecoder, l_logical_rank_per_dimm) ); - uint32_t l_attrs_dimm_size[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; - FAPI_TRY( eff_dimm_size(l_mcs, &l_attrs_dimm_size[0][0]) ); + { + // Calculate dimm size + // Formula from SPD Spec + // Total = SDRAM Capacity 8 * Primary Bus Width SDRAM Width * Logical Ranks per DIMM + uint32_t l_dimm_size = 0; + l_dimm_size = (l_sdram_density / 8.0) * (l_bus_width / l_sdram_width) * l_logical_rank_per_dimm; - l_attrs_dimm_size[l_port_num][l_dimm_num] = 0x10; - FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DIMM_SIZE, l_mcs, l_attrs_dimm_size) ); + // Get & update MCS attribute + const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target); + const auto l_port_num = index( find_target<TARGET_TYPE_MCA>(i_target) ); + const auto l_dimm_num = index(i_target); + + uint32_t l_attrs_dimm_size[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; + FAPI_TRY( eff_dimm_size(l_mcs, &l_attrs_dimm_size[0][0]) ); + + l_attrs_dimm_size[l_port_num][l_dimm_num] = uint8_t(l_dimm_size); + FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DIMM_SIZE, l_mcs, l_attrs_dimm_size) ); + } fapi_try_exit: return fapi2::current_err; @@ -280,16 +404,14 @@ fapi2::ReturnCode eff_config::hybrid_memory_type(const fapi2::Target<TARGET_TYPE const auto l_dimm_num = index(i_target); uint8_t l_decoder_val = 0; - FAPI_TRY(iv_pDecoder->hybrid_media(i_target, l_decoder_val)); + uint8_t l_mcs_attrs[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; // Get & update MCS attribute - { - uint8_t l_mcs_attrs[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; - FAPI_TRY( eff_hybrid_memory_type(l_mcs, &l_mcs_attrs[0][0]) ); + FAPI_TRY( eff_hybrid_memory_type(l_mcs, &l_mcs_attrs[0][0]) ); + FAPI_TRY(iv_pDecoder->hybrid_media(i_target, l_decoder_val)); - l_mcs_attrs[l_port_num][l_dimm_num] = l_decoder_val; - FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_HYBRID_MEMORY_TYPE, l_mcs, l_mcs_attrs) ); - } + l_mcs_attrs[l_port_num][l_dimm_num] = l_decoder_val; + FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_HYBRID_MEMORY_TYPE, l_mcs, l_mcs_attrs) ); fapi_try_exit: return fapi2::current_err; @@ -440,6 +562,7 @@ fapi2::ReturnCode eff_config::refresh_cycle_time(const fapi2::Target<TARGET_TYPE "Failed to calculate clock period (tCK)"); FAPI_DBG("Calculated clock period (tCK): %d", l_tCK_in_ps); + { // Calculate refresh cycle time in nCK & set attribute const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target); @@ -512,7 +635,7 @@ fapi_try_exit: /// @param[in] i_target FAPI2 target /// @return fapi2::FAPI2_RC_SUCCESS if okay /// -fapi2::ReturnCode eff_config::rcd_mirror_mode(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target) +fapi2::ReturnCode eff_config::rcd_mirror_mode(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) { // TK - RIT skeleton. Need to finish - AAM uint8_t l_attrs_mirror_mode[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; @@ -539,21 +662,19 @@ fapi_try_exit: /// @param[in] i_target FAPI2 target /// @return fapi2::FAPI2_RC_SUCCESS if okay /// -fapi2::ReturnCode eff_config::dram_bank_bits(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target) +fapi2::ReturnCode eff_config::dram_bank_bits(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) { - // TK - RIT skeleton. Need to finish - AAM - uint8_t l_attrs_bank_bits[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; - - // Targets const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target); - const auto l_mca = find_target<TARGET_TYPE_MCA>(i_target); - - // Current index - const auto l_port_num = index(l_mca); + const auto l_port_num = index( find_target<TARGET_TYPE_MCA>(i_target) ); const auto l_dimm_num = index(i_target); + uint8_t l_bank_bits = 0; + uint8_t l_attrs_bank_bits[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; + FAPI_TRY( eff_dram_bank_bits(l_mcs, &l_attrs_bank_bits[0][0]) ); - l_attrs_bank_bits[l_port_num][l_dimm_num] = 0x04; + FAPI_TRY( iv_pDecoder->banks(i_target, l_bank_bits) ); + + l_attrs_bank_bits[l_port_num][l_dimm_num] = l_bank_bits; FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DRAM_BANK_BITS, l_mcs, l_attrs_bank_bits) ); fapi_try_exit: @@ -567,22 +688,21 @@ fapi_try_exit: /// @param[in] i_target FAPI2 target /// @return fapi2::FAPI2_RC_SUCCESS if okay /// -fapi2::ReturnCode eff_config::dram_row_bits(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target) +fapi2::ReturnCode eff_config::dram_row_bits(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) { - // TK - RIT skeleton. Need to finish - AAM - uint8_t l_attrs_row_bits[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; - - // Targets const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target); - const auto l_mca = find_target<TARGET_TYPE_MCA>(i_target); - - // Current index - const auto l_port_num = index(l_mca); + const auto l_port_num = index( find_target<TARGET_TYPE_MCA>(i_target) ); const auto l_dimm_num = index(i_target); + uint8_t l_row_bits = 0; + uint8_t l_attrs_row_bits[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; + FAPI_TRY( eff_dram_row_bits(l_mcs, &l_attrs_row_bits[0][0]) ); - l_attrs_row_bits[l_port_num][l_dimm_num] = 0x10; + FAPI_TRY( iv_pDecoder->row_address_bits(i_target, l_row_bits) ); + + l_attrs_row_bits[l_port_num][l_dimm_num] = l_row_bits; FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DRAM_ROW_BITS, l_mcs, l_attrs_row_bits) ); + fapi_try_exit: return fapi2::current_err; @@ -594,7 +714,7 @@ fapi_try_exit: /// @param[in] i_target FAPI2 target /// @return fapi2::FAPI2_RC_SUCCESS if okay /// -fapi2::ReturnCode eff_config::custom_dimm(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target) +fapi2::ReturnCode eff_config::custom_dimm(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) { // TK - RIT skeleton. Need to finish - AAM // Targets @@ -621,7 +741,7 @@ fapi_try_exit: /// @param[in] i_target FAPI2 target /// @return fapi2::FAPI2_RC_SUCCESS if okay /// -fapi2::ReturnCode eff_config::dram_dqs_time(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target) +fapi2::ReturnCode eff_config::dram_dqs_time(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) { // TK - RIT skeleton. Need to finish - AAM uint8_t l_attrs_dqs_time[PORTS_PER_MCS] = {}; @@ -647,7 +767,7 @@ fapi_try_exit: /// @param[in] i_target FAPI2 target /// @return fapi2::FAPI2_RC_SUCCESS if okay /// -fapi2::ReturnCode eff_config::odt_read(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target) +fapi2::ReturnCode eff_config::odt_read(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) { // TK - RIT skeleton. Need to finish - AAM const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target); @@ -683,7 +803,7 @@ fapi_try_exit: /// @param[in] i_target FAPI2 target /// @return fapi2::FAPI2_RC_SUCCESS if okay /// -fapi2::ReturnCode eff_config::odt_write(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target) +fapi2::ReturnCode eff_config::odt_write(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) { // TK - RIT skeleton. Need to finish - AAM const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target); @@ -727,7 +847,7 @@ fapi_try_exit: /// @param[in] i_target FAPI2 target /// @return fapi2::FAPI2_RC_SUCCESS if okay /// -fapi2::ReturnCode eff_config::dram_tccd_l(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target) +fapi2::ReturnCode eff_config::dram_tccd_l(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) { // TK - RIT skeleton. Need to finish - AAM uint8_t l_attrs_tccd_l[PORTS_PER_MCS] = {}; @@ -753,7 +873,7 @@ fapi_try_exit: /// @param[in] i_target FAPI2 target /// @return fapi2::FAPI2_RC_SUCCESS if okay /// -fapi2::ReturnCode eff_config::rtt_park(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target) +fapi2::ReturnCode eff_config::rtt_park(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) { // TK - RIT skeleton. Need to finish - AAM const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target); @@ -785,7 +905,7 @@ fapi_try_exit: /// @param[in] i_target FAPI2 target /// @return fapi2::FAPI2_RC_SUCCESS if okay /// -fapi2::ReturnCode eff_config::dimm_rc00(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target) +fapi2::ReturnCode eff_config::dimm_rc00(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) { // TK - RIT skeleton. Need to finish - AAM uint8_t l_attrs_dimm_rc00[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; @@ -811,7 +931,7 @@ fapi_try_exit: /// @param[in] i_target FAPI2 target /// @return fapi2::FAPI2_RC_SUCCESS if okay /// -fapi2::ReturnCode eff_config::dimm_rc01(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target) +fapi2::ReturnCode eff_config::dimm_rc01(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) { // TK - RIT skeleton. Need to finish - AAM uint8_t l_attrs_dimm_rc01[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; @@ -836,7 +956,7 @@ fapi_try_exit: /// @param[in] i_target FAPI2 target /// @return fapi2::FAPI2_RC_SUCCESS if okay /// -fapi2::ReturnCode eff_config::dimm_rc02(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target) +fapi2::ReturnCode eff_config::dimm_rc02(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) { // TK - RIT skeleton. Need to finish - AAM uint8_t l_attrs_dimm_rc02[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; @@ -861,7 +981,7 @@ fapi_try_exit: /// @param[in] i_target FAPI2 target /// @return fapi2::FAPI2_RC_SUCCESS if okay /// -fapi2::ReturnCode eff_config::dimm_rc03(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target) +fapi2::ReturnCode eff_config::dimm_rc03(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) { // TK - RIT skeleton. Need to finish - AAM uint8_t l_attrs_dimm_rc03[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; @@ -887,7 +1007,7 @@ fapi_try_exit: /// @param[in] i_target FAPI2 target /// @return fapi2::FAPI2_RC_SUCCESS if okay /// -fapi2::ReturnCode eff_config::dimm_rc04(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target) +fapi2::ReturnCode eff_config::dimm_rc04(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) { // TK - RIT skeleton. Need to finish - AAM uint8_t l_attrs_dimm_rc04[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; @@ -912,7 +1032,7 @@ fapi_try_exit: /// @param[in] i_target FAPI2 target /// @return fapi2::FAPI2_RC_SUCCESS if okay /// -fapi2::ReturnCode eff_config::dimm_rc05(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target) +fapi2::ReturnCode eff_config::dimm_rc05(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) { // TK - RIT skeleton. Need to finish - AAM uint8_t l_attrs_dimm_rc05[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; @@ -937,7 +1057,7 @@ fapi_try_exit: /// @param[in] i_target FAPI2 target /// @return fapi2::FAPI2_RC_SUCCESS if okay /// -fapi2::ReturnCode eff_config::dimm_rc06_07(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target) +fapi2::ReturnCode eff_config::dimm_rc06_07(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) { // TK - RIT skeleton. Need to finish - AAM uint8_t l_attrs_dimm_rc06_07[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; @@ -962,7 +1082,7 @@ fapi_try_exit: /// @param[in] i_target FAPI2 target /// @return fapi2::FAPI2_RC_SUCCESS if okay /// -fapi2::ReturnCode eff_config::dimm_rc08(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target) +fapi2::ReturnCode eff_config::dimm_rc08(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) { // TK - RIT skeleton. Need to finish - AAM uint8_t l_attrs_dimm_rc08[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; @@ -987,7 +1107,7 @@ fapi_try_exit: /// @param[in] i_target FAPI2 target /// @return fapi2::FAPI2_RC_SUCCESS if okay /// -fapi2::ReturnCode eff_config::dimm_rc09(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target) +fapi2::ReturnCode eff_config::dimm_rc09(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) { // TK - RIT skeleton. Need to finish - AAM uint8_t l_attrs_dimm_rc09[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; @@ -1012,7 +1132,7 @@ fapi_try_exit: /// @param[in] i_target FAPI2 target /// @return fapi2::FAPI2_RC_SUCCESS if okay /// -fapi2::ReturnCode eff_config::dimm_rc10(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target) +fapi2::ReturnCode eff_config::dimm_rc10(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) { // TK - RIT skeleton. Need to finish - AAM uint8_t l_attrs_dimm_rc10[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; @@ -1038,7 +1158,7 @@ fapi_try_exit: /// @param[in] i_target FAPI2 target /// @return fapi2::FAPI2_RC_SUCCESS if okay /// -fapi2::ReturnCode eff_config::dimm_rc11(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target) +fapi2::ReturnCode eff_config::dimm_rc11(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) { // TK - RIT skeleton. Need to finish - AAM uint8_t l_attrs_dimm_rc11[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; @@ -1063,7 +1183,7 @@ fapi_try_exit: /// @param[in] i_target FAPI2 target /// @return fapi2::FAPI2_RC_SUCCESS if okay /// -fapi2::ReturnCode eff_config::dimm_rc12(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target) +fapi2::ReturnCode eff_config::dimm_rc12(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) { // TK - RIT skeleton. Need to finish - AAM uint8_t l_attrs_dimm_rc12[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; @@ -1088,7 +1208,7 @@ fapi_try_exit: /// @param[in] i_target FAPI2 target /// @return fapi2::FAPI2_RC_SUCCESS if okay /// -fapi2::ReturnCode eff_config::dimm_rc13(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target) +fapi2::ReturnCode eff_config::dimm_rc13(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) { // TK - RIT skeleton. Need to finish - AAM uint8_t l_attrs_dimm_rc13[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; @@ -1113,7 +1233,7 @@ fapi_try_exit: /// @param[in] i_target FAPI2 target /// @return fapi2::FAPI2_RC_SUCCESS if okay /// -fapi2::ReturnCode eff_config::dimm_rc14(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target) +fapi2::ReturnCode eff_config::dimm_rc14(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) { // TK - RIT skeleton. Need to finish - AAM uint8_t l_attrs_dimm_rc14[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; @@ -1138,7 +1258,7 @@ fapi_try_exit: /// @param[in] i_target FAPI2 target /// @return fapi2::FAPI2_RC_SUCCESS if okay /// -fapi2::ReturnCode eff_config::dimm_rc15(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target) +fapi2::ReturnCode eff_config::dimm_rc15(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) { // TK - RIT skeleton. Need to finish - AAM uint8_t l_attrs_dimm_rc15[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; @@ -1165,7 +1285,7 @@ fapi_try_exit: /// @param[in] i_target FAPI2 target /// @return fapi2::FAPI2_RC_SUCCESS if okay /// -fapi2::ReturnCode eff_config::dimm_rc1x(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target) +fapi2::ReturnCode eff_config::dimm_rc1x(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) { // TK - RIT skeleton. Need to finish - AAM uint8_t l_attrs_dimm_rc_1x[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; @@ -1192,7 +1312,7 @@ fapi_try_exit: /// @param[in] i_target FAPI2 target /// @return fapi2::FAPI2_RC_SUCCESS if okay /// -fapi2::ReturnCode eff_config::dimm_rc2x(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target) +fapi2::ReturnCode eff_config::dimm_rc2x(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) { // TK - RIT skeleton. Need to finish - AAM uint8_t l_attrs_dimm_rc_2x[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; @@ -1218,7 +1338,7 @@ fapi_try_exit: /// @param[in] i_target FAPI2 target /// @return fapi2::FAPI2_RC_SUCCESS if okay /// -fapi2::ReturnCode eff_config::dimm_rc3x(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target) +fapi2::ReturnCode eff_config::dimm_rc3x(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) { // TK - RIT skeleton. Need to finish - AAM uint8_t l_attrs_dimm_rc_3x[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; @@ -1244,7 +1364,7 @@ fapi_try_exit: /// @param[in] i_target FAPI2 target /// @return fapi2::FAPI2_RC_SUCCESS if okay /// -fapi2::ReturnCode eff_config::dimm_rc4x(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target) +fapi2::ReturnCode eff_config::dimm_rc4x(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) { // TK - RIT skeleton. Need to finish - AAM uint8_t l_attrs_dimm_rc_4x[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; @@ -1270,7 +1390,7 @@ fapi_try_exit: /// @param[in] i_target FAPI2 target /// @return fapi2::FAPI2_RC_SUCCESS if okay /// -fapi2::ReturnCode eff_config::dimm_rc5x(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target) +fapi2::ReturnCode eff_config::dimm_rc5x(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) { // TK - RIT skeleton. Need to finish - AAM uint8_t l_attrs_dimm_rc_5x[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; @@ -1296,7 +1416,7 @@ fapi_try_exit: /// @param[in] i_target FAPI2 target /// @return fapi2::FAPI2_RC_SUCCESS if okay /// -fapi2::ReturnCode eff_config::dimm_rc6x(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target) +fapi2::ReturnCode eff_config::dimm_rc6x(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) { // TK - RIT skeleton. Need to finish - AAM uint8_t l_attrs_dimm_rc_6x[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; @@ -1322,7 +1442,7 @@ fapi_try_exit: /// @param[in] i_target FAPI2 target /// @return fapi2::FAPI2_RC_SUCCESS if okay /// -fapi2::ReturnCode eff_config::dimm_rc7x(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target) +fapi2::ReturnCode eff_config::dimm_rc7x(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) { // TK - RIT skeleton. Need to finish - AAM uint8_t l_attrs_dimm_rc_7x[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; @@ -1348,7 +1468,7 @@ fapi_try_exit: /// @param[in] i_target FAPI2 target /// @return fapi2::FAPI2_RC_SUCCESS if okay /// -fapi2::ReturnCode eff_config::dimm_rc8x(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target) +fapi2::ReturnCode eff_config::dimm_rc8x(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) { // TK - RIT skeleton. Need to finish - AAM uint8_t l_attrs_dimm_rc_8x[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; @@ -1374,7 +1494,7 @@ fapi_try_exit: /// @param[in] i_target FAPI2 target /// @return fapi2::FAPI2_RC_SUCCESS if okay /// -fapi2::ReturnCode eff_config::dimm_rc9x(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target) +fapi2::ReturnCode eff_config::dimm_rc9x(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) { // TK - RIT skeleton. Need to finish - AAM uint8_t l_attrs_dimm_rc_9x[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; @@ -1400,7 +1520,7 @@ fapi_try_exit: /// @param[in] i_target FAPI2 target /// @return fapi2::FAPI2_RC_SUCCESS if okay /// -fapi2::ReturnCode eff_config::dimm_rcax(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target) +fapi2::ReturnCode eff_config::dimm_rcax(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) { // TK - RIT skeleton. Need to finish - AAM uint8_t l_attrs_dimm_rc_ax[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; @@ -1426,7 +1546,7 @@ fapi_try_exit: /// @param[in] i_target FAPI2 target /// @return fapi2::FAPI2_RC_SUCCESS if okay /// -fapi2::ReturnCode eff_config::dimm_rcbx(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target) +fapi2::ReturnCode eff_config::dimm_rcbx(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) { // TK - RIT skeleton. Need to finish - AAM uint8_t l_attrs_dimm_rc_bx[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; @@ -1452,7 +1572,7 @@ fapi_try_exit: /// @param[in] i_target FAPI2 target /// @return fapi2::FAPI2_RC_SUCCESS if okay /// -fapi2::ReturnCode eff_config::dram_twr(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target) +fapi2::ReturnCode eff_config::dram_twr(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) { // TK - RIT skeleton. Need to finish - AAM std::vector<uint8_t> l_attrs_twr(PORTS_PER_MCS, 0); @@ -1480,7 +1600,7 @@ fapi_try_exit: /// @param[in] i_target FAPI2 target /// @return fapi2::FAPI2_RC_SUCCESS if okay /// -fapi2::ReturnCode eff_config::burst_length(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target) +fapi2::ReturnCode eff_config::burst_length(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) { // TK - RIT skeleton. Need to finish - AAM std::vector<uint8_t> l_attrs_bl(PORTS_PER_MCS, 0); @@ -1510,7 +1630,7 @@ fapi_try_exit: /// @param[in] i_target FAPI2 target /// @return fapi2::FAPI2_RC_SUCCESS if okay /// -fapi2::ReturnCode eff_config::read_burst_type(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target) +fapi2::ReturnCode eff_config::read_burst_type(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) { // TK - RIT skeleton. Need to finish - AAM uint8_t l_attrs_rbt[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; @@ -1539,7 +1659,7 @@ fapi_try_exit: /// @param[in] i_target FAPI2 target /// @return fapi2::FAPI2_RC_SUCCESS if okay /// -fapi2::ReturnCode eff_config::dram_tm(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target) +fapi2::ReturnCode eff_config::dram_tm(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) { // TK - RIT skeleton. Need to finish - AAM uint8_t l_attrs_tm[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; @@ -1569,7 +1689,7 @@ fapi_try_exit: /// @param[in] i_target FAPI2 target /// @return fapi2::FAPI2_RC_SUCCESS if okay /// -fapi2::ReturnCode eff_config::dram_cwl(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target) +fapi2::ReturnCode eff_config::dram_cwl(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) { // TK - RIT skeleton. Need to finish - AAM std::vector<uint8_t> l_attrs_cwl(PORTS_PER_MCS, 0); @@ -1598,7 +1718,7 @@ fapi_try_exit: /// @param[in] i_target FAPI2 target /// @return fapi2::FAPI2_RC_SUCCESS if okay /// -fapi2::ReturnCode eff_config::dram_lpasr(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target) +fapi2::ReturnCode eff_config::dram_lpasr(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) { // TK - RIT skeleton. Need to finish - AAM std::vector<uint8_t> l_attrs_lpasr(PORTS_PER_MCS, 0); @@ -1627,7 +1747,7 @@ fapi_try_exit: /// @param[in] i_target FAPI2 target /// @return fapi2::FAPI2_RC_SUCCESS if okay /// -fapi2::ReturnCode eff_config::additive_latency(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target) +fapi2::ReturnCode eff_config::additive_latency(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) { // TK - RIT skeleton. Need to finish - AAM std::vector<uint8_t> l_attrs_dram_al(PORTS_PER_MCS, 0); @@ -1656,7 +1776,7 @@ fapi_try_exit: /// @param[in] i_target FAPI2 target /// @return fapi2::FAPI2_RC_SUCCESS if okay /// -fapi2::ReturnCode eff_config::dll_reset(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target) +fapi2::ReturnCode eff_config::dll_reset(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) { // TK - RIT skeleton. Need to finish - AAM uint8_t l_attrs_dll_reset[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; @@ -1685,7 +1805,7 @@ fapi_try_exit: /// @param[in] i_target FAPI2 target /// @return fapi2::FAPI2_RC_SUCCESS if okay /// -fapi2::ReturnCode eff_config::dll_enable(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target) +fapi2::ReturnCode eff_config::dll_enable(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) { // TK - RIT skeleton. Need to finish - AAM uint8_t l_attrs_dll_enable[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; @@ -1714,7 +1834,7 @@ fapi_try_exit: /// @param[in] i_target FAPI2 target /// @return fapi2::FAPI2_RC_SUCCESS if okay /// -fapi2::ReturnCode eff_config::dram_ron(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target) +fapi2::ReturnCode eff_config::dram_ron(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) { // TK - RIT skeleton. Need to finish - AAM uint8_t l_attrs_dram_ron[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; @@ -1743,7 +1863,7 @@ fapi_try_exit: /// @param[in] i_target FAPI2 target /// @return fapi2::FAPI2_RC_SUCCESS if okay /// -fapi2::ReturnCode eff_config::rtt_nom(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target) +fapi2::ReturnCode eff_config::rtt_nom(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) { // TK - RIT skeleton. Need to finish - AAM const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target); @@ -1774,7 +1894,7 @@ fapi_try_exit: /// @param[in] i_target FAPI2 target /// @return fapi2::FAPI2_RC_SUCCESS if okay /// -fapi2::ReturnCode eff_config::write_level_enable(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target) +fapi2::ReturnCode eff_config::write_level_enable(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) { // TK - RIT skeleton. Need to finish - AAM std::vector<uint8_t> l_attrs_wr_lvl_enable(PORTS_PER_MCS, 0); @@ -1803,7 +1923,7 @@ fapi_try_exit: /// @param[in] i_target FAPI2 target /// @return fapi2::FAPI2_RC_SUCCESS if okay /// -fapi2::ReturnCode eff_config::output_buffer(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target) +fapi2::ReturnCode eff_config::output_buffer(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) { // TK - RIT skeleton. Need to finish - AAM std::vector<uint8_t> l_attrs_output_buffer(PORTS_PER_MCS, 0); @@ -1832,7 +1952,7 @@ fapi_try_exit: /// @param[in] i_target FAPI2 target /// @return fapi2::FAPI2_RC_SUCCESS if okay /// -fapi2::ReturnCode eff_config::vref_dq_train_value(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target) +fapi2::ReturnCode eff_config::vref_dq_train_value(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) { // TK - RIT skeleton. Need to finish - AAM const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target); @@ -1865,7 +1985,7 @@ fapi_try_exit: /// @param[in] i_target FAPI2 target /// @return fapi2::FAPI2_RC_SUCCESS if okay /// -fapi2::ReturnCode eff_config::vref_dq_train_enable(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target) +fapi2::ReturnCode eff_config::vref_dq_train_enable(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) { // TK - RIT skeleton. Need to finish - AAM const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target); @@ -1898,7 +2018,7 @@ fapi_try_exit: /// @param[in] i_target FAPI2 target /// @return fapi2::FAPI2_RC_SUCCESS if okay /// -fapi2::ReturnCode eff_config::vref_dq_train_range(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target) +fapi2::ReturnCode eff_config::vref_dq_train_range(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) { // TK - RIT skeleton. Need to finish - AAM const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target); @@ -1930,7 +2050,7 @@ fapi_try_exit: /// @param[in] i_target FAPI2 target /// @return fapi2::FAPI2_RC_SUCCESS if okay /// -fapi2::ReturnCode eff_config::ca_parity_latency(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target) +fapi2::ReturnCode eff_config::ca_parity_latency(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) { // TK - RIT skeleton. Need to finish - AAM std::vector<uint8_t> l_attrs_ca_parity_latency(PORTS_PER_MCS, 0); @@ -1959,7 +2079,7 @@ fapi_try_exit: /// @param[in] i_target FAPI2 target /// @return fapi2::FAPI2_RC_SUCCESS if okay /// -fapi2::ReturnCode eff_config::crc_error_clear(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target) +fapi2::ReturnCode eff_config::crc_error_clear(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) { // TK - RIT skeleton. Need to finish - AAM std::vector<uint8_t> l_attrs_crc_error_clear(PORTS_PER_MCS, 0); @@ -1988,7 +2108,7 @@ fapi_try_exit: /// @param[in] i_target FAPI2 target /// @return fapi2::FAPI2_RC_SUCCESS if okay /// -fapi2::ReturnCode eff_config::ca_parity_error_status(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target) +fapi2::ReturnCode eff_config::ca_parity_error_status(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) { // TK - RIT skeleton. Need to finish - AAM std::vector<uint8_t> l_attrs_ca_parity_error_status(PORTS_PER_MCS, 0); @@ -2017,7 +2137,7 @@ fapi_try_exit: /// @param[in] i_target FAPI2 target /// @return fapi2::FAPI2_RC_SUCCESS if okay /// -fapi2::ReturnCode eff_config::ca_parity(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target) +fapi2::ReturnCode eff_config::ca_parity(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) { // TK - RIT skeleton. Need to finish - AAM std::vector<uint8_t> l_attrs_ca_parity(PORTS_PER_MCS, 0); @@ -2046,7 +2166,7 @@ fapi_try_exit: /// @param[in] i_target FAPI2 target /// @return fapi2::FAPI2_RC_SUCCESS if okay /// -fapi2::ReturnCode eff_config::odt_input_buffer(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target) +fapi2::ReturnCode eff_config::odt_input_buffer(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) { // TK - RIT skeleton. Need to finish - AAM std::vector<uint8_t> l_attrs_odt_input_buffer(PORTS_PER_MCS, 0); @@ -2075,7 +2195,7 @@ fapi_try_exit: /// @param[in] i_target FAPI2 target /// @return fapi2::FAPI2_RC_SUCCESS if okay /// -fapi2::ReturnCode eff_config::data_mask(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target) +fapi2::ReturnCode eff_config::data_mask(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) { // TK - RIT skeleton. Need to finish - AAM std::vector<uint8_t> l_attrs_data_mask(PORTS_PER_MCS, 0); @@ -2104,7 +2224,7 @@ fapi_try_exit: /// @param[in] i_target FAPI2 target /// @return fapi2::FAPI2_RC_SUCCESS if okay /// -fapi2::ReturnCode eff_config::write_dbi(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target) +fapi2::ReturnCode eff_config::write_dbi(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) { // TK - RIT skeleton. Need to finish - AAM std::vector<uint8_t> l_attrs_write_dbi(PORTS_PER_MCS, 0); @@ -2134,18 +2254,13 @@ fapi_try_exit: /// @param[in] i_target FAPI2 target /// @return fapi2::FAPI2_RC_SUCCESS if okay /// -fapi2::ReturnCode eff_config::read_dbi(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target) +fapi2::ReturnCode eff_config::read_dbi(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) { // TK - RIT skeleton. Need to finish - AAM - std::vector<uint8_t> l_attrs_read_dbi(PORTS_PER_MCS, 0); - - // Targets const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target); - const auto l_mca = find_target<TARGET_TYPE_MCA>(i_target); - - // Current index - const auto l_port_num = index(l_mca); + const auto l_port_num = index( find_target<TARGET_TYPE_MCA>(i_target) ); + std::vector<uint8_t> l_attrs_read_dbi(PORTS_PER_MCS, 0); FAPI_TRY( eff_read_dbi(l_mcs, l_attrs_read_dbi.data()) ); l_attrs_read_dbi[l_port_num] = 0x00; @@ -2164,24 +2279,20 @@ fapi_try_exit: /// @param[in] i_target FAPI2 target /// @return fapi2::FAPI2_RC_SUCCESS if okay /// -fapi2::ReturnCode eff_config::post_package_repair(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target) +fapi2::ReturnCode eff_config::post_package_repair(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) { // TK - RIT skeleton. Need to finish - AAM - uint8_t l_attrs_dram_ppr[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; - - // Targets const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target); - const auto l_mca = find_target<TARGET_TYPE_MCA>(i_target); - - // Current index - const auto l_port_num = index(l_mca); + const auto l_port_num = index( find_target<TARGET_TYPE_MCA>(i_target) ); const auto l_dimm_num = index(i_target); - // Port level? - FAPI_TRY( eff_dram_ppr(l_mcs, &l_attrs_dram_ppr[0][0]) ); + uint8_t l_decoder_val = 0; + uint8_t l_attrs_dram_ppr[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; - l_attrs_dram_ppr[l_port_num][l_dimm_num] = 0x00; + FAPI_TRY( eff_dram_ppr(l_mcs, &l_attrs_dram_ppr[0][0]) ); + FAPI_TRY( iv_pDecoder->post_package_repair(i_target, l_decoder_val) ); + l_attrs_dram_ppr[l_port_num][l_dimm_num] = l_decoder_val; FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DRAM_PPR, l_mcs, l_attrs_dram_ppr), "Failed setting attribute for DRAM_PPR"); @@ -2194,18 +2305,13 @@ fapi_try_exit: /// @param[in] i_target FAPI2 target /// @return fapi2::FAPI2_RC_SUCCESS if okay /// -fapi2::ReturnCode eff_config::read_preamble_train(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target) +fapi2::ReturnCode eff_config::read_preamble_train(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) { // TK - RIT skeleton. Need to finish - AAM - std::vector<uint8_t> l_attrs_rd_preamble_train(PORTS_PER_MCS, 0); - - // Targets const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target); - const auto l_mca = find_target<TARGET_TYPE_MCA>(i_target); - - // Current index - const auto l_port_num = index(l_mca); + const auto l_port_num = index( find_target<TARGET_TYPE_MCA>(i_target) ); + std::vector<uint8_t> l_attrs_rd_preamble_train(PORTS_PER_MCS, 0); FAPI_TRY( eff_rd_preamble_train(l_mcs, l_attrs_rd_preamble_train.data()) ); l_attrs_rd_preamble_train[l_port_num] = 0x00; @@ -2224,7 +2330,7 @@ fapi_try_exit: /// @param[in] i_target FAPI2 target /// @return fapi2::FAPI2_RC_SUCCESS if okay /// -fapi2::ReturnCode eff_config::read_preamble(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target) +fapi2::ReturnCode eff_config::read_preamble(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) { // TK - RIT skeleton. Need to finish - AAM std::vector<uint8_t> l_attrs_rd_preamble(PORTS_PER_MCS, 0); @@ -2254,7 +2360,7 @@ fapi_try_exit: /// @param[in] i_target FAPI2 target /// @return fapi2::FAPI2_RC_SUCCESS if okay /// -fapi2::ReturnCode eff_config::write_preamble(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target) +fapi2::ReturnCode eff_config::write_preamble(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) { // TK - RIT skeleton. Need to finish - AAM std::vector<uint8_t> l_attrs_wr_preamble(PORTS_PER_MCS, 0); @@ -2284,7 +2390,7 @@ fapi_try_exit: /// @param[in] i_target FAPI2 target /// @return fapi2::FAPI2_RC_SUCCESS if okay /// -fapi2::ReturnCode eff_config::self_refresh_abort(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target) +fapi2::ReturnCode eff_config::self_refresh_abort(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) { // TK - RIT skeleton. Need to finish - AAM std::vector<uint8_t> l_attrs_self_ref_abort(PORTS_PER_MCS, 0); @@ -2315,7 +2421,7 @@ fapi_try_exit: /// @param[in] i_target FAPI2 target /// @return fapi2::FAPI2_RC_SUCCESS if okay /// -fapi2::ReturnCode eff_config::cs_to_cmd_addr_latency(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target) +fapi2::ReturnCode eff_config::cs_to_cmd_addr_latency(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) { // TK - RIT skeleton. Need to finish - AAM std::vector<uint8_t> l_attrs_cs_cmd_latency(PORTS_PER_MCS, 0); @@ -2345,7 +2451,7 @@ fapi_try_exit: /// @param[in] i_target FAPI2 target /// @return fapi2::FAPI2_RC_SUCCESS if okay /// -fapi2::ReturnCode eff_config::internal_vref_monitor(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target) +fapi2::ReturnCode eff_config::internal_vref_monitor(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) { // TK - RIT skeleton. Need to finish - AAM std::vector<uint8_t> l_attrs_int_vref_mon(PORTS_PER_MCS, 0); @@ -2375,7 +2481,7 @@ fapi_try_exit: /// @param[in] i_target FAPI2 target /// @return fapi2::FAPI2_RC_SUCCESS if okay /// -fapi2::ReturnCode eff_config::max_powerdown_mode(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target) +fapi2::ReturnCode eff_config::max_powerdown_mode(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) { // TK - RIT skeleton. Need to finish - AAM std::vector<uint8_t> l_attrs_powerdown_mode(PORTS_PER_MCS, 0); @@ -2405,7 +2511,7 @@ fapi_try_exit: /// @param[in] i_target FAPI2 target /// @return fapi2::FAPI2_RC_SUCCESS if okay /// -fapi2::ReturnCode eff_config::mpr_read_format(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target) +fapi2::ReturnCode eff_config::mpr_read_format(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) { // TK - RIT skeleton. Need to finish - AAM std::vector<uint8_t> l_attrs_mpr_rd_format(PORTS_PER_MCS, 0); @@ -2435,7 +2541,7 @@ fapi_try_exit: /// @param[in] i_target FAPI2 target /// @return fapi2::FAPI2_RC_SUCCESS if okay /// -fapi2::ReturnCode eff_config::crc_wr_latency(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target) +fapi2::ReturnCode eff_config::crc_wr_latency(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) { // TK - RIT skeleton. Need to finish - AAM std::vector<uint8_t> l_attrs_crc_wr_latency(PORTS_PER_MCS, 0); @@ -2465,7 +2571,7 @@ fapi_try_exit: /// @param[in] i_target FAPI2 target /// @return fapi2::FAPI2_RC_SUCCESS if okay /// -fapi2::ReturnCode eff_config::temp_readout(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target) +fapi2::ReturnCode eff_config::temp_readout(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) { // TK - RIT skeleton. Need to finish - AAM std::vector<uint8_t> l_attrs_temp_readout(PORTS_PER_MCS, 0); @@ -2495,7 +2601,7 @@ fapi_try_exit: /// @param[in] i_target FAPI2 target /// @return fapi2::FAPI2_RC_SUCCESS if okay /// -fapi2::ReturnCode eff_config::per_dram_addressability(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target) +fapi2::ReturnCode eff_config::per_dram_addressability(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) { // TK - RIT skeleton. Need to finish - AAM std::vector<uint8_t> l_attrs_per_dram_access(PORTS_PER_MCS, 0); @@ -2525,7 +2631,7 @@ fapi_try_exit: /// @param[in] i_target FAPI2 target /// @return fapi2::FAPI2_RC_SUCCESS if okay /// -fapi2::ReturnCode eff_config::geardown_mode(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target) +fapi2::ReturnCode eff_config::geardown_mode(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) { // TK - RIT skeleton. Need to finish - AAM std::vector<uint8_t> l_attrs_geardown_mode(PORTS_PER_MCS, 0); @@ -2555,7 +2661,7 @@ fapi_try_exit: /// @param[in] i_target FAPI2 target /// @return fapi2::FAPI2_RC_SUCCESS if okay /// -fapi2::ReturnCode eff_config::mpr_page(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target) +fapi2::ReturnCode eff_config::mpr_page(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) { // TK - RIT skeleton. Need to finish - AAM std::vector<uint8_t> l_attrs_mpr_page(PORTS_PER_MCS, 0); @@ -2585,7 +2691,7 @@ fapi_try_exit: /// @param[in] i_target FAPI2 target /// @return fapi2::FAPI2_RC_SUCCESS if okay /// -fapi2::ReturnCode eff_config::mpr_mode(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target) +fapi2::ReturnCode eff_config::mpr_mode(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) { // TK - RIT skeleton. Need to finish - AAM std::vector<uint8_t> l_attrs_mpr_mode(PORTS_PER_MCS, 0); @@ -2615,7 +2721,7 @@ fapi_try_exit: /// @param[in] i_target FAPI2 target /// @return fapi2::FAPI2_RC_SUCCESS if okay /// -fapi2::ReturnCode eff_config::write_crc(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target) +fapi2::ReturnCode eff_config::write_crc(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) { // TK - RIT skeleton. Need to finish - AAM std::vector<uint8_t> l_attrs_write_crc(PORTS_PER_MCS, 0); @@ -2645,7 +2751,7 @@ fapi_try_exit: /// @param[in] i_target FAPI2 target /// @return fapi2::FAPI2_RC_SUCCESS if okay /// -fapi2::ReturnCode eff_config::rtt_write(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target) +fapi2::ReturnCode eff_config::rtt_write(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) { // TK - RIT skeleton. Need to finish - AAM const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target); @@ -2677,7 +2783,7 @@ fapi_try_exit: /// @param[in] i_target FAPI2 target /// @return fapi2::FAPI2_RC_SUCCESS if okay /// -fapi2::ReturnCode eff_config::zqcal_interval(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target) +fapi2::ReturnCode eff_config::zqcal_interval(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) { // TK - RIT skeleton. Need to finish - AAM std::vector<uint32_t> l_attrs_zqcal_interval(PORTS_PER_MCS, 0); @@ -2713,7 +2819,7 @@ fapi_try_exit: /// @param[in] i_target FAPI2 target /// @return fapi2::FAPI2_RC_SUCCESS if okay /// -fapi2::ReturnCode eff_config::memcal_interval(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target) +fapi2::ReturnCode eff_config::memcal_interval(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) { // TK - RIT skeleton. Need to finish - AAM std::vector<uint32_t> l_attrs_memcal_interval(PORTS_PER_MCS, 0); @@ -2739,4 +2845,496 @@ fapi_try_exit: return fapi2::current_err; } +/// +/// @brief Determines & sets effective config for tRP +/// @param[in] i_target FAPI2 target +/// @return fapi2::FAPI2_RC_SUCCESS if okay +/// +fapi2::ReturnCode eff_config::dram_trp(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) +{ + const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target); + const auto l_port_num = index(find_target<TARGET_TYPE_MCA>(i_target)); + + int64_t l_trp_in_ps = 0; + + // Calculate tRP (in ps) + { + int64_t l_trp_mtb = 0; + int64_t l_trp_ftb = 0; + int64_t l_ftb = 0; + int64_t l_mtb = 0; + + FAPI_TRY( iv_pDecoder->medium_timebase(i_target, l_mtb) ); + FAPI_TRY( iv_pDecoder->fine_timebase(i_target, l_ftb) ); + FAPI_TRY( iv_pDecoder->min_row_precharge_delay_time(i_target, l_trp_mtb) ); + FAPI_TRY( iv_pDecoder->fine_offset_min_trp(i_target, l_trp_ftb) ); + + l_trp_in_ps = calc_timing_from_timebase(l_trp_mtb, l_mtb, l_trp_ftb, l_ftb); + } + + { + std::vector<uint8_t> l_attrs_dram_trp(PORTS_PER_MCS, 0); + int64_t l_tCK_in_ps = 0; + int64_t l_trp_in_nck = 0; + + // Calculate clock period (tCK) from selected freq from mss_freq + FAPI_TRY( clock_period(i_target, l_tCK_in_ps), "Failed to calculate clock period (tCK)"); + FAPI_DBG("Calculated clock period (tCK): %d", l_tCK_in_ps); + + // Calculate nck + l_trp_in_nck = calc_nck(l_trp_in_ps, + l_tCK_in_ps, + int64_t(INVERSE_DDR4_CORRECTION_FACTOR)); + + FAPI_DBG("Calculated tRP (nck): %d", l_trp_in_nck); + + // Get & update MCS attribute + FAPI_TRY( eff_dram_trp(l_mcs, l_attrs_dram_trp.data()) ); + + l_attrs_dram_trp[l_port_num] = uint8_t( l_trp_in_nck ); + FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DRAM_TRP, + l_mcs, + UINT8_VECTOR_TO_1D_ARRAY(l_attrs_dram_trp, PORTS_PER_MCS)), + "Failed setting attribute for DRAM_TRP"); + } + +fapi_try_exit: + return fapi2::current_err; +} + +/// +/// @brief Determines & sets effective config for tRCD +/// @param[in] i_target FAPI2 target +/// @return fapi2::FAPI2_RC_SUCCESS if okay +/// +fapi2::ReturnCode eff_config::dram_trcd(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) +{ + const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target); + const auto l_port_num = index(find_target<TARGET_TYPE_MCA>(i_target)); + int64_t l_trcd_in_ps = 0; + + // Calculate trcd (in ps) + { + int64_t l_trcd_mtb = 0; + int64_t l_trcd_ftb = 0; + int64_t l_ftb = 0; + int64_t l_mtb = 0; + + FAPI_TRY( iv_pDecoder->medium_timebase(i_target, l_mtb) ); + FAPI_TRY( iv_pDecoder->fine_timebase(i_target, l_ftb) ); + FAPI_TRY( iv_pDecoder->min_ras_to_cas_delay_time(i_target, l_trcd_mtb) ); + FAPI_TRY( iv_pDecoder->fine_offset_min_trcd(i_target, l_trcd_ftb) ); + + l_trcd_in_ps = calc_timing_from_timebase(l_trcd_mtb, l_mtb, l_trcd_ftb, l_ftb); + } + + + { + std::vector<uint8_t> l_attrs_dram_trcd(PORTS_PER_MCS, 0); + int64_t l_tCK_in_ps = 0; + int64_t l_trcd_in_nck = 0; + + // Calculate clock period (tCK) from selected freq from mss_freq + FAPI_TRY( clock_period(i_target, l_tCK_in_ps), "Failed to calculate clock period (tCK)"); + FAPI_DBG("Calculated clock period (tCK): %d", l_tCK_in_ps); + + // Calculate nck + l_trcd_in_nck = calc_nck(l_trcd_in_ps, + l_tCK_in_ps, + int64_t(INVERSE_DDR4_CORRECTION_FACTOR)); + + FAPI_DBG("Calculated trcd (nck): %d", l_trcd_in_nck); + + // Get & update MCS attribute + FAPI_TRY( eff_dram_trcd(l_mcs, l_attrs_dram_trcd.data()) ); + + l_attrs_dram_trcd[l_port_num] = l_trcd_in_nck; + FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DRAM_TRCD, + l_mcs, + UINT8_VECTOR_TO_1D_ARRAY(l_attrs_dram_trcd, PORTS_PER_MCS)), + "Failed setting attribute for DRAM_TRCD"); + } + +fapi_try_exit: + return fapi2::current_err; +} + +/// +/// @brief Determines & sets effective config for tWTR_L +/// @param[in] i_target FAPI2 target +/// @return fapi2::FAPI2_RC_SUCCESS if okay +/// +fapi2::ReturnCode eff_config::dram_twtr_l(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) +{ + const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target); + const auto l_port_num = index(find_target<TARGET_TYPE_MCA>(i_target)); + int64_t l_twtr_l_in_ps = 0; + + // Calculate twtr_l (in ps) + { + constexpr int64_t l_twtr_l_ftb = 0; + int64_t l_twtr_l_mtb = 0; + int64_t l_ftb = 0; + int64_t l_mtb = 0; + + FAPI_TRY( iv_pDecoder->medium_timebase(i_target, l_mtb) ); + FAPI_TRY( iv_pDecoder->fine_timebase(i_target, l_ftb) ); + FAPI_TRY( iv_pDecoder->min_twtr_l(i_target, l_twtr_l_mtb) ); + + l_twtr_l_in_ps = calc_timing_from_timebase(l_twtr_l_mtb, l_mtb, l_twtr_l_ftb, l_ftb); + } + + + { + std::vector<uint8_t> l_attrs_dram_twtr_l(PORTS_PER_MCS, 0); + int64_t l_tCK_in_ps = 0; + int64_t l_twtr_l_in_nck = 0; + + // Calculate clock period (tCK) from selected freq from mss_freq + FAPI_TRY( clock_period(i_target, l_tCK_in_ps), "Failed to calculate clock period (tCK)"); + FAPI_DBG("Calculated clock period (tCK): %d", l_tCK_in_ps); + + // Calculate nck + l_twtr_l_in_nck = calc_nck(l_twtr_l_in_ps, + l_tCK_in_ps, + int64_t(INVERSE_DDR4_CORRECTION_FACTOR)); + + FAPI_DBG("Calculated twtr_l (nck): %d", l_twtr_l_in_nck); + + // Get & update MCS attribute + FAPI_TRY( eff_dram_twtr_l(l_mcs, l_attrs_dram_twtr_l.data()) ); + + l_attrs_dram_twtr_l[l_port_num] = uint8_t( l_twtr_l_in_nck ); + FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DRAM_TWTR_L, + l_mcs, + UINT8_VECTOR_TO_1D_ARRAY(l_attrs_dram_twtr_l, PORTS_PER_MCS)), + "Failed setting attribute for DRAM_TWTR_L"); + } + +fapi_try_exit: + return fapi2::current_err; +} + +/// +/// @brief Determines & sets effective config for tWTR_S +/// @param[in] i_target FAPI2 target +/// @return fapi2::FAPI2_RC_SUCCESS if okay +/// +fapi2::ReturnCode eff_config::dram_twtr_s(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) +{ + const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target); + const auto l_port_num = index(find_target<TARGET_TYPE_MCA>(i_target)); + int64_t l_twtr_s_in_ps = 0; + + // Calculate twtr_s (in ps) + { + constexpr int64_t l_twtr_s_ftb = 0; + int64_t l_twtr_s_mtb = 0; + int64_t l_ftb = 0; + int64_t l_mtb = 0; + + FAPI_TRY( iv_pDecoder->medium_timebase(i_target, l_mtb) ); + FAPI_TRY( iv_pDecoder->fine_timebase(i_target, l_ftb) ); + FAPI_TRY( iv_pDecoder->min_twtr_s(i_target, l_twtr_s_mtb) ); + + l_twtr_s_in_ps = calc_timing_from_timebase(l_twtr_s_mtb, l_mtb, l_twtr_s_ftb, l_ftb); + } + + { + std::vector<uint8_t> l_attrs_dram_twtr_s(PORTS_PER_MCS, 0); + int64_t l_tCK_in_ps = 0; + int64_t l_twtr_s_in_nck = 0; + + // Calculate clock period (tCK) from selected freq from mss_freq + FAPI_TRY( clock_period(i_target, l_tCK_in_ps), "Failed to calculate clock period (tCK)"); + FAPI_DBG("Calculated clock period (tCK): %d", l_tCK_in_ps); + + // Calculate nck + l_twtr_s_in_nck = calc_nck(l_twtr_s_in_ps, + l_tCK_in_ps, + int64_t(INVERSE_DDR4_CORRECTION_FACTOR)); + + FAPI_DBG("Calculated twtr_s (nck): %d", l_twtr_s_in_nck); + + // Get & update MCS attribute + FAPI_TRY( eff_dram_twtr_s(l_mcs, l_attrs_dram_twtr_s.data()) ); + + l_attrs_dram_twtr_s[l_port_num] = uint8_t( l_twtr_s_in_nck ); + FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DRAM_TWTR_S, + l_mcs, + UINT8_VECTOR_TO_1D_ARRAY(l_attrs_dram_twtr_s, PORTS_PER_MCS)), + "Failed setting attribute for DRAM_TWTR_S"); + } + +fapi_try_exit: + return fapi2::current_err; +} + +/// +/// @brief Determines & sets effective config for tRRD_S +/// @param[in] i_target FAPI2 target +/// @return fapi2::FAPI2_RC_SUCCESS if okay +/// +fapi2::ReturnCode eff_config::dram_trrd_s(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) +{ + const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target); + const auto l_port_num = index(find_target<TARGET_TYPE_MCA>(i_target)); + int64_t l_trrd_s_in_ps = 0; + + // Calculate trrd_s (in ps) + { + int64_t l_trrd_s_mtb = 0; + int64_t l_trrd_s_ftb = 0; + int64_t l_ftb = 0; + int64_t l_mtb = 0; + + FAPI_TRY( iv_pDecoder->medium_timebase(i_target, l_mtb) ); + FAPI_TRY( iv_pDecoder->fine_timebase(i_target, l_ftb) ); + FAPI_TRY( iv_pDecoder->min_trrd_s(i_target, l_trrd_s_mtb) ); + FAPI_TRY( iv_pDecoder->fine_offset_min_trrd_s(i_target, l_trrd_s_ftb) ); + + l_trrd_s_in_ps = calc_timing_from_timebase(l_trrd_s_mtb, l_mtb, l_trrd_s_ftb, l_ftb); + } + + { + std::vector<uint8_t> l_attrs_dram_trrd_s(PORTS_PER_MCS, 0); + int64_t l_tCK_in_ps = 0; + int64_t l_trrd_s_in_nck = 0; + + // Calculate clock period (tCK) from selected freq from mss_freq + FAPI_TRY( clock_period(i_target, l_tCK_in_ps), "Failed to calculate clock period (tCK)"); + FAPI_DBG("Calculated clock period (tCK): %d", l_tCK_in_ps); + + // Calculate nck + l_trrd_s_in_nck = calc_nck(l_trrd_s_in_ps, + l_tCK_in_ps, + int64_t(INVERSE_DDR4_CORRECTION_FACTOR)); + + FAPI_DBG("Calculated trrd_s (nck): %d", l_trrd_s_in_nck); + + // Get & update MCS attribute + FAPI_TRY( eff_dram_trrd_s(l_mcs, l_attrs_dram_trrd_s.data()) ); + + l_attrs_dram_trrd_s[l_port_num] = uint8_t( l_trrd_s_in_nck ); + FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DRAM_TRRD_S, + l_mcs, + UINT8_VECTOR_TO_1D_ARRAY(l_attrs_dram_trrd_s, PORTS_PER_MCS)), + "Failed setting attribute for DRAM_TRRD_S"); + } + +fapi_try_exit: + return fapi2::current_err; +} + +/// +/// @brief Determines & sets effective config for tRRD_L +/// @param[in] i_target FAPI2 target +/// @return fapi2::FAPI2_RC_SUCCESS if okay +/// +fapi2::ReturnCode eff_config::dram_trrd_l(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) +{ + const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target); + const auto l_port_num = index(find_target<TARGET_TYPE_MCA>(i_target)); + int64_t l_trrd_l_in_ps = 0; + + // Calculate trrd_l (in ps) + { + int64_t l_trrd_l_mtb = 0; + int64_t l_trrd_l_ftb = 0; + int64_t l_ftb = 0; + int64_t l_mtb = 0; + + FAPI_TRY( iv_pDecoder->medium_timebase(i_target, l_mtb) ); + FAPI_TRY( iv_pDecoder->fine_timebase(i_target, l_ftb) ); + FAPI_TRY( iv_pDecoder->min_trrd_l(i_target, l_trrd_l_mtb) ); + FAPI_TRY( iv_pDecoder->fine_offset_min_trrd_l(i_target, l_trrd_l_ftb) ); + + l_trrd_l_in_ps = calc_timing_from_timebase(l_trrd_l_mtb, l_mtb, l_trrd_l_ftb, l_ftb); + } + + { + std::vector<uint8_t> l_attrs_dram_trrd_l(PORTS_PER_MCS, 0); + int64_t l_tCK_in_ps = 0; + int64_t l_trrd_l_in_nck = 0; + + // Calculate clock period (tCK) from selected freq from mss_freq + FAPI_TRY( clock_period(i_target, l_tCK_in_ps), "Failed to calculate clock period (tCK)"); + FAPI_DBG("Calculated clock period (tCK): %d", l_tCK_in_ps); + + // Calculate nck + l_trrd_l_in_nck = calc_nck(l_trrd_l_in_ps, + l_tCK_in_ps, + int64_t(INVERSE_DDR4_CORRECTION_FACTOR)); + + FAPI_DBG("Calculated trrd_l (nck): %d", l_trrd_l_in_nck); + + // Get & update MCS attribute + FAPI_TRY( eff_dram_trrd_l(l_mcs, l_attrs_dram_trrd_l.data()) ); + + l_attrs_dram_trrd_l[l_port_num] = uint8_t( l_trrd_l_in_nck ); + FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DRAM_TRRD_L, + l_mcs, + UINT8_VECTOR_TO_1D_ARRAY(l_attrs_dram_trrd_l, PORTS_PER_MCS)), + "Failed setting attribute for DRAM_TRRD_L"); + } + +fapi_try_exit: + return fapi2::current_err; +} + +/// +/// @brief Determines & sets effective config for tfaw +/// @param[in] i_target FAPI2 target +/// @return fapi2::FAPI2_RC_SUCCESS if okay +/// +fapi2::ReturnCode eff_config::dram_tfaw(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) +{ + const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target); + const auto l_port_num = index(find_target<TARGET_TYPE_MCA>(i_target)); + int64_t l_tfaw_in_ps = 0; + + // Calculate tfaw (in ps) + { + constexpr int64_t l_tfaw_ftb = 0; + int64_t l_tfaw_mtb = 0; + int64_t l_ftb = 0; + int64_t l_mtb = 0; + + FAPI_TRY( iv_pDecoder->medium_timebase(i_target, l_mtb) ); + FAPI_TRY( iv_pDecoder->fine_timebase(i_target, l_ftb) ); + FAPI_TRY( iv_pDecoder->min_tfaw(i_target, l_tfaw_mtb) ); + + l_tfaw_in_ps = calc_timing_from_timebase(l_tfaw_mtb, l_mtb, l_tfaw_ftb, l_ftb); + } + + { + std::vector<uint8_t> l_attrs_dram_tfaw(PORTS_PER_MCS, 0); + int64_t l_tCK_in_ps = 0; + int64_t l_tfaw_in_nck = 0; + + // Calculate clock period (tCK) from selected freq from mss_freq + FAPI_TRY( clock_period(i_target, l_tCK_in_ps), "Failed to calculate clock period (tCK)"); + FAPI_DBG("Calculated clock period (tCK): %d", l_tCK_in_ps); + + // Calculate nck + l_tfaw_in_nck = calc_nck(l_tfaw_in_ps, + l_tCK_in_ps, + int64_t(INVERSE_DDR4_CORRECTION_FACTOR)); + + FAPI_DBG("Calculated tfaw (nck): %d", l_tfaw_in_nck); + + // Get & update MCS attribute + FAPI_TRY( eff_dram_tfaw(l_mcs, l_attrs_dram_tfaw.data()) ); + + l_attrs_dram_tfaw[l_port_num] = uint8_t( l_tfaw_in_nck ); + FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DRAM_TFAW, + l_mcs, + UINT8_VECTOR_TO_1D_ARRAY(l_attrs_dram_tfaw, PORTS_PER_MCS)), + "Failed setting attribute for DRAM_TFAW"); + } + +fapi_try_exit: + return fapi2::current_err; +} + +/// +/// @brief Determines & sets effective config for tRAS +/// @param[in] i_target FAPI2 target +/// @return fapi2::FAPI2_RC_SUCCESS if okay +/// +fapi2::ReturnCode eff_config::dram_tras(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) +{ + // TK - RIT skeleton. Need to finish - AAM + const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target); + const auto l_port_num = index(find_target<TARGET_TYPE_MCA>(i_target)); + int64_t l_tras_in_ps = 0; + + // Calculate tras (in ps) + { + constexpr int64_t l_tras_ftb = 0; + int64_t l_tras_mtb = 0; + int64_t l_ftb = 0; + int64_t l_mtb = 0; + + FAPI_TRY( iv_pDecoder->medium_timebase(i_target, l_mtb) ); + FAPI_TRY( iv_pDecoder->fine_timebase(i_target, l_ftb) ); + FAPI_TRY( iv_pDecoder->min_active_to_precharge_delay_time(i_target, l_tras_mtb) ); + + l_tras_in_ps = calc_timing_from_timebase(l_tras_mtb, l_mtb, l_tras_ftb, l_ftb); + } + + { + std::vector<uint8_t> l_attrs_dram_tras(PORTS_PER_MCS, 0); + int64_t l_tCK_in_ps = 0; + int64_t l_tras_in_nck = 0; + + // Calculate clock period (tCK) from selected freq from mss_freq + FAPI_TRY( clock_period(i_target, l_tCK_in_ps), "Failed to calculate clock period (tCK)"); + FAPI_DBG("Calculated clock period (tCK): %d", l_tCK_in_ps); + + // Calculate nck + l_tras_in_nck = calc_nck(l_tras_in_ps, + l_tCK_in_ps, + int64_t(INVERSE_DDR4_CORRECTION_FACTOR)); + + FAPI_DBG("Calculated tras (nck): %d", l_tras_in_nck); + + // Get & update MCS attribute + FAPI_TRY( eff_dram_tras(l_mcs, l_attrs_dram_tras.data()) ); + + l_attrs_dram_tras[l_port_num] = uint8_t( l_tras_in_nck ); + FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DRAM_TRAS, + l_mcs, + UINT8_VECTOR_TO_1D_ARRAY(l_attrs_dram_tras, PORTS_PER_MCS)), + "Failed setting attribute for tRAS"); + } + +fapi_try_exit: + return fapi2::current_err; +} + +/// +/// @brief Determines & sets effective config for tRTP +/// @param[in] i_target FAPI2 target +/// @return fapi2::FAPI2_RC_SUCCESS if okay +/// +fapi2::ReturnCode eff_config::dram_trtp(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) +{ + const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target); + const auto l_port_num = index(find_target<TARGET_TYPE_MCA>(i_target)); + + // Values from proposed DDR4 Full spec update(79-4A) + // Item No. 1716.78C + // Page 241 & 246 + constexpr int64_t l_max_trtp_in_ps = 7500; + constexpr int64_t l_min_trtp_in_nck = 4; + + std::vector<uint8_t> l_attrs_dram_trtp(PORTS_PER_MCS, 0); + int64_t l_tCK_in_ps = 0; + int64_t l_calc_trtp_in_nck = 0; + + // Calculate clock period (tCK) from selected freq from mss_freq + FAPI_TRY( clock_period(i_target, l_tCK_in_ps), "Failed to calculate clock period (tCK)"); + FAPI_DBG("Calculated clock period (tCK): %d", l_tCK_in_ps); + + // Calculate nck + l_calc_trtp_in_nck = calc_nck(l_max_trtp_in_ps, + l_tCK_in_ps, + int64_t(INVERSE_DDR4_CORRECTION_FACTOR)); + + FAPI_DBG("Calculated trtp (nck): %d", l_calc_trtp_in_nck); + + // Get & update MCS attribute + FAPI_TRY( eff_dram_trtp(l_mcs, l_attrs_dram_trtp.data()) ); + + l_attrs_dram_trtp[l_port_num] = uint8_t( std::max(l_min_trtp_in_nck, l_calc_trtp_in_nck) ); + FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DRAM_TRTP, + l_mcs, + UINT8_VECTOR_TO_1D_ARRAY(l_attrs_dram_trtp, PORTS_PER_MCS)), + "Failed setting attribute for DRAM_TRTP"); + +fapi_try_exit: + return fapi2::current_err; +} + }// mss diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/eff_config.H b/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/eff_config.H index 577eea4a2..cf854e98d 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/eff_config.H +++ b/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/eff_config.H @@ -43,12 +43,21 @@ namespace mss class eff_config { public: + //TK - Make this constructor take this as param - AAM std::shared_ptr<spd::decoder> iv_pDecoder; - // ctor + // TK - Adding decoder in ctor can allow me to save off the + // state of decoder timebases, target, fapi2 positions, + // and clock period eliminate code duplication. + + // + // @brief Constructor + // eff_config() = default; - // dtor + // + // @brief Destructor + // ~eff_config() = default; //////////////////////// @@ -690,8 +699,106 @@ class eff_config /// fapi2::ReturnCode memcal_interval(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target); + /// + /// @brief Determines & sets effective config for tRP + /// @param[in] i_target FAPI2 target + /// @return fapi2::FAPI2_RC_SUCCESS if okay + /// + fapi2::ReturnCode dram_trp(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target); + + /// + /// @brief Determines & sets effective config for tRCD + /// @param[in] i_target FAPI2 target + /// @return fapi2::FAPI2_RC_SUCCESS if okay + /// + fapi2::ReturnCode dram_trcd(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target); + + /// + /// @brief Determines & sets effective config for tWTR_L + /// @param[in] i_target FAPI2 target + /// @return fapi2::FAPI2_RC_SUCCESS if okay + /// + fapi2::ReturnCode dram_twtr_l(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target); + + /// + /// @brief Determines & sets effective config for tWTR_S + /// @param[in] i_target FAPI2 target + /// @return fapi2::FAPI2_RC_SUCCESS if okay + /// + fapi2::ReturnCode dram_twtr_s(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target); + + /// + /// @brief Determines & sets effective config for tRRD_S + /// @param[in] i_target FAPI2 target + /// @return fapi2::FAPI2_RC_SUCCESS if okay + /// + fapi2::ReturnCode dram_trrd_s(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target); + + /// + /// @brief Determines & sets effective config for tRRD_L + /// @param[in] i_target FAPI2 target + /// @return fapi2::FAPI2_RC_SUCCESS if okay + /// + fapi2::ReturnCode dram_trrd_l(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target); + + /// + /// @brief Determines & sets effective config for tfaw + /// @param[in] i_target FAPI2 target + /// @return fapi2::FAPI2_RC_SUCCESS if okay + /// + fapi2::ReturnCode dram_tfaw(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target); + + /// + /// @brief Determines & sets effective config for tRAS + /// @param[in] i_target FAPI2 target + /// @return fapi2::FAPI2_RC_SUCCESS if okay + /// + fapi2::ReturnCode dram_tras(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target); + + /// + /// @brief Determines & sets effective config for tRTP + /// @param[in] i_target FAPI2 target + /// @return fapi2::FAPI2_RC_SUCCESS if okay + /// + fapi2::ReturnCode dram_trtp(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target); + };// eff_config + + +/// +/// @brief Returns Logical ranks in Primary SDRAM type +/// @param[in] i_target dimm target +/// @param[in] i_pDecoder shared pointer to the SPD decoder +/// @param[out] o_logical_ranks number of logical ranks +/// @return fapi2::FAPI2_RC_SUCCESS if okay +/// +fapi2::ReturnCode prim_sdram_logical_ranks(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target, + const std::shared_ptr<spd::decoder>& i_pDecoder, + uint8_t& o_logical_ranks); + +/// +/// @brief Returns Logical ranks in Secondary SDRAM type +/// @param[in] i_target dimm target +/// @param[in] i_pDecoder shared pointer to the SPD decoder +/// @param[out] o_logical_ranks number of logical ranks +/// @return fapi2::FAPI2_RC_SUCCESS if okay +/// +fapi2::ReturnCode sec_sdram_logical_ranks(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target, + const std::shared_ptr<spd::decoder>& i_pDecoder, + uint8_t& o_logical_ranks); + +/// +/// @brief Returns Logical ranks per DIMM +/// @param[in] i_target dimm target +/// @param[in] i_pDecoder shared pointer to the SPD decoder +/// @param[out] o_logical_ranks number of logical ranks +/// @return fapi2::FAPI2_RC_SUCCESS if okay +/// +fapi2::ReturnCode logical_ranks_per_dimm(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target, + const std::shared_ptr<spd::decoder>& i_pDecoder, + uint8_t& o_logical_rank_per_dimm); + } // mss #endif // _MSS_EFF_CONFIG_H_ diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/freq/cycle_time.H b/src/import/chips/p9/procedures/hwp/memory/lib/freq/cycle_time.H index 847553ddd..785e62845 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/freq/cycle_time.H +++ b/src/import/chips/p9/procedures/hwp/memory/lib/freq/cycle_time.H @@ -118,7 +118,7 @@ inline fapi2::ReturnCode select_supported_freq(uint64_t& io_dimm_freq) // Selects next lowest freq btw 1866 - 2666 [MT/s] { - auto iterator = std::lower_bound(P9_FREQS.begin(), P9_FREQS.end(), io_dimm_freq); + auto iterator = std::upper_bound(P9_FREQS.begin(), P9_FREQS.end(), io_dimm_freq); io_dimm_freq = *(--iterator); } fapi_try_exit: diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/mss_attribute_accessors.H b/src/import/chips/p9/procedures/hwp/memory/lib/mss_attribute_accessors.H index c9178b30d..aaf9231f6 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/mss_attribute_accessors.H +++ b/src/import/chips/p9/procedures/hwp/memory/lib/mss_attribute_accessors.H @@ -233,97 +233,6 @@ fapi_try_exit: } /// -/// @brief ATTR_EFF_NUM_RANKS_PER_DIMM getter -/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_DIMM> -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (F) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Number of ranks in each DIMM. Used in various locations and is computed in -/// mss_eff_cnfg. values are 0,1,2, 4 up to 32 creator: mss_eff_cnfg consumer: -/// various firmware notes: -/// none -/// -inline fapi2::ReturnCode eff_num_ranks_per_dimm(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target, - uint8_t& o_value) -{ - uint8_t l_value[2][2]; - auto l_mca = i_target.getParent<fapi2::TARGET_TYPE_MCA>(); - auto l_mcs = l_mca.getParent<fapi2::TARGET_TYPE_MCS>(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_NUM_RANKS_PER_DIMM, l_mcs, l_value) ); - o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_NUM_RANKS_PER_DIMM: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_NUM_RANKS_PER_DIMM getter -/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_MCA> -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (G) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Number of ranks in each DIMM. Used in various locations and is computed in -/// mss_eff_cnfg. values are 0,1,2, 4 up to 32 creator: mss_eff_cnfg consumer: -/// various firmware notes: -/// none -/// -inline fapi2::ReturnCode eff_num_ranks_per_dimm(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target, uint8_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2][2]; - auto l_mcs = i_target.getParent<fapi2::TARGET_TYPE_MCS>(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_NUM_RANKS_PER_DIMM, l_mcs, l_value) ); - memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_NUM_RANKS_PER_DIMM: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_NUM_RANKS_PER_DIMM getter -/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_MCS> -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (H) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Number of ranks in each DIMM. Used in various locations and is computed in -/// mss_eff_cnfg. values are 0,1,2, 4 up to 32 creator: mss_eff_cnfg consumer: -/// various firmware notes: -/// none -/// -inline fapi2::ReturnCode eff_num_ranks_per_dimm(const fapi2::Target<fapi2::TARGET_TYPE_MCS>& i_target, uint8_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2][2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_NUM_RANKS_PER_DIMM, i_target, l_value) ); - memcpy(o_array, &l_value, 4); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_NUM_RANKS_PER_DIMM: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// /// @brief ATTR_EFF_CUSTOM_DIMM getter /// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_DIMM> /// @param[out] ref to the value uint8_t @@ -417,180 +326,6 @@ fapi_try_exit: } /// -/// @brief ATTR_EFF_DRAM_WIDTH getter -/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_DIMM> -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (F) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note DRAM Device Width: X4, X8, X16, X32. Used in various locations and is computed -/// in mss_eff_cnfg. creator: mss_eff_cnfg consumer: various firmware notes: -/// none -/// -inline fapi2::ReturnCode eff_dram_width(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target, uint8_t& o_value) -{ - uint8_t l_value[2][2]; - auto l_mca = i_target.getParent<fapi2::TARGET_TYPE_MCA>(); - auto l_mcs = l_mca.getParent<fapi2::TARGET_TYPE_MCS>(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_WIDTH, l_mcs, l_value) ); - o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DRAM_WIDTH: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_DRAM_WIDTH getter -/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_MCA> -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (G) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note DRAM Device Width: X4, X8, X16, X32. Used in various locations and is computed -/// in mss_eff_cnfg. creator: mss_eff_cnfg consumer: various firmware notes: -/// none -/// -inline fapi2::ReturnCode eff_dram_width(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target, uint8_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2][2]; - auto l_mcs = i_target.getParent<fapi2::TARGET_TYPE_MCS>(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_WIDTH, l_mcs, l_value) ); - memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DRAM_WIDTH: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_DRAM_WIDTH getter -/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_MCS> -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (H) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note DRAM Device Width: X4, X8, X16, X32. Used in various locations and is computed -/// in mss_eff_cnfg. creator: mss_eff_cnfg consumer: various firmware notes: -/// none -/// -inline fapi2::ReturnCode eff_dram_width(const fapi2::Target<fapi2::TARGET_TYPE_MCS>& i_target, uint8_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2][2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_WIDTH, i_target, l_value) ); - memcpy(o_array, &l_value, 4); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DRAM_WIDTH: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_DRAM_RANK_MIX getter -/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_DIMM> -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (F) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note DRAM Device Rank Mix Used in various locations and is computed in mss_eff_cnfg. -/// creator: mss_eff_cnfg consumer: various firmware notes: -/// none -/// -inline fapi2::ReturnCode eff_dram_rank_mix(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target, uint8_t& o_value) -{ - uint8_t l_value[2][2]; - auto l_mca = i_target.getParent<fapi2::TARGET_TYPE_MCA>(); - auto l_mcs = l_mca.getParent<fapi2::TARGET_TYPE_MCS>(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_RANK_MIX, l_mcs, l_value) ); - o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DRAM_RANK_MIX: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_DRAM_RANK_MIX getter -/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_MCA> -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (G) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note DRAM Device Rank Mix Used in various locations and is computed in mss_eff_cnfg. -/// creator: mss_eff_cnfg consumer: various firmware notes: -/// none -/// -inline fapi2::ReturnCode eff_dram_rank_mix(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target, uint8_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2][2]; - auto l_mcs = i_target.getParent<fapi2::TARGET_TYPE_MCS>(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_RANK_MIX, l_mcs, l_value) ); - memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DRAM_RANK_MIX: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_DRAM_RANK_MIX getter -/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_MCS> -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (H) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note DRAM Device Rank Mix Used in various locations and is computed in mss_eff_cnfg. -/// creator: mss_eff_cnfg consumer: various firmware notes: -/// none -/// -inline fapi2::ReturnCode eff_dram_rank_mix(const fapi2::Target<fapi2::TARGET_TYPE_MCS>& i_target, uint8_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2][2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_RANK_MIX, i_target, l_value) ); - memcpy(o_array, &l_value, 4); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DRAM_RANK_MIX: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// /// @brief ATTR_EFF_DIMM_SPARE getter /// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_DIMM> /// @param[out] uint8_t* memory to store the value @@ -20166,6 +19901,277 @@ fapi_try_exit: return fapi2::current_err; } +/// +/// @brief ATTR_EFF_DRAM_WIDTH getter +/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_DIMM> +/// @param[out] ref to the value uint8_t +/// @note Generated by gen_accessors.pl generateParameters (F) +/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK +/// @note SDRAM Device Width Decodes SPD Byte 12 (bits 2~0). Options: X4 (4 bits), X8 (8 +/// bits), X16 (16 bits), X32 (32 bits). creator: mss_eff_cnfg consumer: various +/// firmware notes: +/// none +/// +inline fapi2::ReturnCode eff_dram_width(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target, uint8_t& o_value) +{ + uint8_t l_value[2][2]; + auto l_mca = i_target.getParent<fapi2::TARGET_TYPE_MCA>(); + auto l_mcs = l_mca.getParent<fapi2::TARGET_TYPE_MCS>(); + + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_WIDTH, l_mcs, l_value) ); + o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; + return fapi2::current_err; + +fapi_try_exit: + FAPI_ERR("failed accessing ATTR_EFF_DRAM_WIDTH: 0x%lx (target: %s)", + uint64_t(fapi2::current_err), mss::c_str(i_target)); + return fapi2::current_err; +} + +/// +/// @brief ATTR_EFF_DRAM_WIDTH getter +/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_MCA> +/// @param[out] uint8_t* memory to store the value +/// @note Generated by gen_accessors.pl generateParameters (G) +/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK +/// @note SDRAM Device Width Decodes SPD Byte 12 (bits 2~0). Options: X4 (4 bits), X8 (8 +/// bits), X16 (16 bits), X32 (32 bits). creator: mss_eff_cnfg consumer: various +/// firmware notes: +/// none +/// +inline fapi2::ReturnCode eff_dram_width(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target, uint8_t* o_array) +{ + if (o_array == nullptr) + { + FAPI_ERR("nullptr passed to attribute accessor %s", __func__); + return fapi2::FAPI2_RC_INVALID_PARAMETER; + } + + uint8_t l_value[2][2]; + auto l_mcs = i_target.getParent<fapi2::TARGET_TYPE_MCS>(); + + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_WIDTH, l_mcs, l_value) ); + memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); + return fapi2::current_err; + +fapi_try_exit: + FAPI_ERR("failed accessing ATTR_EFF_DRAM_WIDTH: 0x%lx (target: %s)", + uint64_t(fapi2::current_err), mss::c_str(i_target)); + return fapi2::current_err; +} + +/// +/// @brief ATTR_EFF_DRAM_WIDTH getter +/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_MCS> +/// @param[out] uint8_t* memory to store the value +/// @note Generated by gen_accessors.pl generateParameters (H) +/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK +/// @note SDRAM Device Width Decodes SPD Byte 12 (bits 2~0). Options: X4 (4 bits), X8 (8 +/// bits), X16 (16 bits), X32 (32 bits). creator: mss_eff_cnfg consumer: various +/// firmware notes: +/// none +/// +inline fapi2::ReturnCode eff_dram_width(const fapi2::Target<fapi2::TARGET_TYPE_MCS>& i_target, uint8_t* o_array) +{ + if (o_array == nullptr) + { + FAPI_ERR("nullptr passed to attribute accessor %s", __func__); + return fapi2::FAPI2_RC_INVALID_PARAMETER; + } + + uint8_t l_value[2][2]; + + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_WIDTH, i_target, l_value) ); + memcpy(o_array, &l_value, 4); + return fapi2::current_err; + +fapi_try_exit: + FAPI_ERR("failed accessing ATTR_EFF_DRAM_WIDTH: 0x%lx (target: %s)", + uint64_t(fapi2::current_err), mss::c_str(i_target)); + return fapi2::current_err; +} + +/// +/// @brief ATTR_EFF_DRAM_RANK_MIX getter +/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_DIMM> +/// @param[out] ref to the value uint8_t +/// @note Generated by gen_accessors.pl generateParameters (F) +/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK +/// @note DRAM Device Rank Mix Decodes SPD Byte 12 (bits 5~3). creator: mss_eff_cnfg +/// consumer: various firmware notes: +/// none +/// +inline fapi2::ReturnCode eff_dram_rank_mix(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target, uint8_t& o_value) +{ + uint8_t l_value[2][2]; + auto l_mca = i_target.getParent<fapi2::TARGET_TYPE_MCA>(); + auto l_mcs = l_mca.getParent<fapi2::TARGET_TYPE_MCS>(); + + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_RANK_MIX, l_mcs, l_value) ); + o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; + return fapi2::current_err; + +fapi_try_exit: + FAPI_ERR("failed accessing ATTR_EFF_DRAM_RANK_MIX: 0x%lx (target: %s)", + uint64_t(fapi2::current_err), mss::c_str(i_target)); + return fapi2::current_err; +} + +/// +/// @brief ATTR_EFF_DRAM_RANK_MIX getter +/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_MCA> +/// @param[out] uint8_t* memory to store the value +/// @note Generated by gen_accessors.pl generateParameters (G) +/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK +/// @note DRAM Device Rank Mix Decodes SPD Byte 12 (bits 5~3). creator: mss_eff_cnfg +/// consumer: various firmware notes: +/// none +/// +inline fapi2::ReturnCode eff_dram_rank_mix(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target, uint8_t* o_array) +{ + if (o_array == nullptr) + { + FAPI_ERR("nullptr passed to attribute accessor %s", __func__); + return fapi2::FAPI2_RC_INVALID_PARAMETER; + } + + uint8_t l_value[2][2]; + auto l_mcs = i_target.getParent<fapi2::TARGET_TYPE_MCS>(); + + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_RANK_MIX, l_mcs, l_value) ); + memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); + return fapi2::current_err; + +fapi_try_exit: + FAPI_ERR("failed accessing ATTR_EFF_DRAM_RANK_MIX: 0x%lx (target: %s)", + uint64_t(fapi2::current_err), mss::c_str(i_target)); + return fapi2::current_err; +} + +/// +/// @brief ATTR_EFF_DRAM_RANK_MIX getter +/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_MCS> +/// @param[out] uint8_t* memory to store the value +/// @note Generated by gen_accessors.pl generateParameters (H) +/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK +/// @note DRAM Device Rank Mix Decodes SPD Byte 12 (bits 5~3). creator: mss_eff_cnfg +/// consumer: various firmware notes: +/// none +/// +inline fapi2::ReturnCode eff_dram_rank_mix(const fapi2::Target<fapi2::TARGET_TYPE_MCS>& i_target, uint8_t* o_array) +{ + if (o_array == nullptr) + { + FAPI_ERR("nullptr passed to attribute accessor %s", __func__); + return fapi2::FAPI2_RC_INVALID_PARAMETER; + } + + uint8_t l_value[2][2]; + + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_RANK_MIX, i_target, l_value) ); + memcpy(o_array, &l_value, 4); + return fapi2::current_err; + +fapi_try_exit: + FAPI_ERR("failed accessing ATTR_EFF_DRAM_RANK_MIX: 0x%lx (target: %s)", + uint64_t(fapi2::current_err), mss::c_str(i_target)); + return fapi2::current_err; +} + +/// +/// @brief ATTR_EFF_NUM_RANKS_PER_DIMM getter +/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_DIMM> +/// @param[out] ref to the value uint8_t +/// @note Generated by gen_accessors.pl generateParameters (F) +/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK +/// @note Total number of ranks in each DIMM. For monolithic and multi-load stack modules +/// (SDP/DDP) this is the same as the number of package ranks per DIMM (SPD Byte 12 +/// bits 5~3). For single load stack (3DS) modules this value is conceptually +/// [master + slave] ranks. creator: mss_eff_cnfg consumer: various firmware notes: +/// none +/// +inline fapi2::ReturnCode eff_num_ranks_per_dimm(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target, + uint8_t& o_value) +{ + uint8_t l_value[2][2]; + auto l_mca = i_target.getParent<fapi2::TARGET_TYPE_MCA>(); + auto l_mcs = l_mca.getParent<fapi2::TARGET_TYPE_MCS>(); + + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_NUM_RANKS_PER_DIMM, l_mcs, l_value) ); + o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; + return fapi2::current_err; + +fapi_try_exit: + FAPI_ERR("failed accessing ATTR_EFF_NUM_RANKS_PER_DIMM: 0x%lx (target: %s)", + uint64_t(fapi2::current_err), mss::c_str(i_target)); + return fapi2::current_err; +} + +/// +/// @brief ATTR_EFF_NUM_RANKS_PER_DIMM getter +/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_MCA> +/// @param[out] uint8_t* memory to store the value +/// @note Generated by gen_accessors.pl generateParameters (G) +/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK +/// @note Total number of ranks in each DIMM. For monolithic and multi-load stack modules +/// (SDP/DDP) this is the same as the number of package ranks per DIMM (SPD Byte 12 +/// bits 5~3). For single load stack (3DS) modules this value is conceptually +/// [master + slave] ranks. creator: mss_eff_cnfg consumer: various firmware notes: +/// none +/// +inline fapi2::ReturnCode eff_num_ranks_per_dimm(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target, uint8_t* o_array) +{ + if (o_array == nullptr) + { + FAPI_ERR("nullptr passed to attribute accessor %s", __func__); + return fapi2::FAPI2_RC_INVALID_PARAMETER; + } + + uint8_t l_value[2][2]; + auto l_mcs = i_target.getParent<fapi2::TARGET_TYPE_MCS>(); + + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_NUM_RANKS_PER_DIMM, l_mcs, l_value) ); + memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); + return fapi2::current_err; + +fapi_try_exit: + FAPI_ERR("failed accessing ATTR_EFF_NUM_RANKS_PER_DIMM: 0x%lx (target: %s)", + uint64_t(fapi2::current_err), mss::c_str(i_target)); + return fapi2::current_err; +} + +/// +/// @brief ATTR_EFF_NUM_RANKS_PER_DIMM getter +/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_MCS> +/// @param[out] uint8_t* memory to store the value +/// @note Generated by gen_accessors.pl generateParameters (H) +/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK +/// @note Total number of ranks in each DIMM. For monolithic and multi-load stack modules +/// (SDP/DDP) this is the same as the number of package ranks per DIMM (SPD Byte 12 +/// bits 5~3). For single load stack (3DS) modules this value is conceptually +/// [master + slave] ranks. creator: mss_eff_cnfg consumer: various firmware notes: +/// none +/// +inline fapi2::ReturnCode eff_num_ranks_per_dimm(const fapi2::Target<fapi2::TARGET_TYPE_MCS>& i_target, uint8_t* o_array) +{ + if (o_array == nullptr) + { + FAPI_ERR("nullptr passed to attribute accessor %s", __func__); + return fapi2::FAPI2_RC_INVALID_PARAMETER; + } + + uint8_t l_value[2][2]; + + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_NUM_RANKS_PER_DIMM, i_target, l_value) ); + memcpy(o_array, &l_value, 4); + return fapi2::current_err; + +fapi_try_exit: + FAPI_ERR("failed accessing ATTR_EFF_NUM_RANKS_PER_DIMM: 0x%lx (target: %s)", + uint64_t(fapi2::current_err), mss::c_str(i_target)); + return fapi2::current_err; +} + /// /// @brief ATTR_MRW_SAFEMODE_MEM_THROTTLED_N_COMMANDS_PER_PORT getter diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/spd/spd_decoder.C b/src/import/chips/p9/procedures/hwp/memory/lib/spd/spd_decoder.C index 03ef676a1..a3d062a41 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/spd/spd_decoder.C +++ b/src/import/chips/p9/procedures/hwp/memory/lib/spd/spd_decoder.C @@ -438,19 +438,21 @@ fapi2::ReturnCode rev_encoding_level(const fapi2::Target<fapi2::TARGET_TYPE_DIMM l_raw_byte); // Extracting desired bits - uint8_t l_bit_fields = 0; - l_buffer.extractToRight<ENCODING_LEVEL_START, ENCODING_LEVEL_LEN>(l_bit_fields); + uint8_t l_field_bits = 0; + l_buffer.extractToRight<ENCODING_LEVEL_START, ENCODING_LEVEL_LEN>(l_field_bits); + + FAPI_DBG("Field Bits value: %d", l_field_bits); // Check that value is valid constexpr size_t UNDEFINED = 0xF; // per JEDEC spec this value is undefined FAPI_TRY( mss::check::spd::fail_for_invalid_value(i_target, - (l_bit_fields != UNDEFINED), + (l_field_bits != UNDEFINED), BYTE_INDEX, l_raw_byte, "Failed check on SPD rev encoding level") ); // Update output only after check passes - o_value = l_bit_fields; + o_value = l_field_bits; // Print decoded info FAPI_DBG("%s. Rev - Encoding Level : %d", @@ -488,19 +490,21 @@ fapi2::ReturnCode rev_additions_level(const fapi2::Target<fapi2::TARGET_TYPE_DIM l_raw_byte); // Extracting desired bits - uint8_t l_bit_fields = 0; - l_buffer.extractToRight<ADDITIONS_LEVEL_START, ADDITIONS_LEVEL_LEN>(l_bit_fields); + uint8_t l_field_bits = 0; + l_buffer.extractToRight<ADDITIONS_LEVEL_START, ADDITIONS_LEVEL_LEN>(l_field_bits); + + FAPI_DBG("Field Bits value: %d", l_field_bits); // Check that value is valid constexpr size_t UNDEFINED = 0xF; // per JEDEC spec this value is undefined FAPI_TRY( mss::check::spd::fail_for_invalid_value(i_target, - (l_bit_fields != UNDEFINED), + (l_field_bits != UNDEFINED), BYTE_INDEX, l_raw_byte, "Failed check on SPD rev encoding level") ); // Update output only after check passes - o_value = l_bit_fields; + o_value = l_field_bits; // Print decoded info FAPI_DBG("%s. Rev - Additions Level : %d", @@ -1017,7 +1021,7 @@ fapi2::ReturnCode decoder::sdram_density(const fapi2::Target<TARGET_TYPE_DIMM>& BYTE_INDEX, l_field_bits, "Failed check for SPD DRAM capacity") ); - FAPI_DBG("%s. SDRAM density: %d", + FAPI_DBG("%s. SDRAM density: %d Gb", mss::c_str(i_target), o_value); @@ -1853,7 +1857,7 @@ fapi2::ReturnCode decoder::device_width(const fapi2::Target<TARGET_TYPE_DIMM>& i l_field_bits, "Failed check for Device Width") ); - FAPI_DBG("%s. Device Width: %d", + FAPI_DBG("%s. Device Width: %d bits", mss::c_str(i_target), o_value); @@ -1887,6 +1891,7 @@ fapi2::ReturnCode decoder::num_package_ranks_per_dimm(const fapi2::Target<TARGET // Extracting desired bits fapi2::buffer<uint8_t> l_spd_buffer(l_raw_byte); uint8_t l_field_bits = 0; + l_spd_buffer.extractToRight<PACKAGE_RANKS_START, PACKAGE_RANKS_LEN>(l_field_bits); FAPI_DBG("Field Bits value: %d", l_field_bits); @@ -3926,7 +3931,7 @@ fapi2::ReturnCode decoder::fine_offset_min_taa(const fapi2::Target<fapi2::TARGET int64_t& o_value) { // Trace in the front assists w/ debug - constexpr size_t BYTE_INDEX = 125; + constexpr size_t BYTE_INDEX = 123; FAPI_DBG("%s SPD data at Byte %d: 0x%llX.", mss::c_str(i_target), diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/spd/spd_decoder.H b/src/import/chips/p9/procedures/hwp/memory/lib/spd/spd_decoder.H index c3064aff8..fd74dc45e 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/spd/spd_decoder.H +++ b/src/import/chips/p9/procedures/hwp/memory/lib/spd/spd_decoder.H @@ -314,19 +314,19 @@ enum BYTE_EXTRACT : uint64_t // Bytes 320 ~ 383 Module Supplier’s Data ?? }; -enum SDRAM_PACKAGE_TYPE : uint64_t +enum SDRAM_PACKAGE_TYPE : size_t { // Signal loading MONOLITHIC = 0, NON_MONOLITHIC = 1, // Package Type - UNSPECIFIED = 0, + UNSPECIFIED = MONOLITHIC, MULTI_LOAD_STACK = 1, SINGLE_LOAD_STACK = 2, }; -enum NOMINAL_VOLTAGE : uint64_t +enum NOMINAL_VOLTAGE : size_t { NOT_OPERABLE = 0, OPERABLE = 1, @@ -335,6 +335,11 @@ enum NOMINAL_VOLTAGE : uint64_t ENDURANT = 1 }; +enum rank_mix : size_t +{ + SYMMETRICAL, + ASYMMETRICAL, +}; /// /// @class decoder diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/utils/fake_spd.C b/src/import/chips/p9/procedures/hwp/memory/lib/utils/fake_spd.C index cf4f14e64..92931e609 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/utils/fake_spd.C +++ b/src/import/chips/p9/procedures/hwp/memory/lib/utils/fake_spd.C @@ -33,7 +33,7 @@ /// DIMM data was taken from /afs/awd.austin.ibm.com/projects/eclipz/lab/p8/gsiexe/ /// 78P0AAM_DDR4_8G1RX8_mu/MICRON_SPD_8G_1Rx8_DDR4_2400_RDIMM.hex on 7/31/2015. -static const uint8_t raw_spd[] = +static constexpr uint8_t raw_spd[] = { 0x23, 0x10, 0x0C, 0x01, 0x85, 0x21, 0x00, 0x08, 0x00, 0x60, 0x00, 0x03, 0x01, 0x0B, 0x80, 0x00, 0x00, 0x00, 0x07, 0x0D, 0xF8, 0x7F, 0x00, 0x00, 0x6E, 0x6E, 0x6E, 0x11, 0x00, 0x6E, 0xF0, 0x0A, @@ -69,6 +69,52 @@ static const uint8_t raw_spd[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, }; +static constexpr uint8_t vbu_spd[] = +{ + // Byte + //0 + 0x23, 0x10, 0x0C, 0x01, 0x84, 0x21, 0x00, 0x08, 0x00, 0x00, 0x00, 0x03, 0x08, 0x0B, 0x80, 0x00, + //16 + 0x00, 0x00, 0x07, 0x0D, 0xF8, 0x7F, 0x00, 0x00, 0x6B, 0x6B, 0x6B, 0x11, 0x00, 0x6E, 0xF0, 0x0A, + //32 + 0x20, 0x08, 0x00, 0x05, 0x00, 0x68, 0x1B, 0x28, 0x28, 0x00, 0x00, 0x00, 0x14, 0x3C, 0x00, 0x00, + //48 + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x24, 0x03, 0x15, 0x2C, + //64 + 0x24, 0x03, 0x15, 0x2C, 0x24, 0x03, 0x24, 0x03, 0x15, 0x2C, 0x24, 0x03, 0x15, 0x2C, 0x00, 0x00, + //80 + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + //96 + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + //112 + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x9C, 0xB5, 0x00, 0xC9, 0xC9, 0xC9, 0xE7, 0xD6, 0xCA, 0x91, + //128 + 0x11, 0x11, 0x23, 0x05, 0x00, 0x80, 0xB3, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xC3, 0x01, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x80, 0x2C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x39, 0x41, 0x53, 0x46, 0x31, 0x47, 0x37, + 0x32, 0x50, 0x5A, 0x2D, 0x32, 0x47, 0x33, 0x41, 0x31, 0x20, 0x20, 0x20, 0x20, 0x31, 0x80, 0x2C, + 0x41, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +}; + /// /// @brief Return a blob of SPD data from a DIMM /// @param[in] i_target, a DIMM target representing the DIMM in question @@ -84,11 +130,11 @@ static const uint8_t raw_spd[] = /// fapi2::ReturnCode getSPD(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target, uint8_t* o_blob, size_t& o_size) { - o_size = sizeof( raw_spd ); + o_size = sizeof( vbu_spd ); if( o_blob != nullptr ) { - memcpy(o_blob, raw_spd, o_size); + memcpy(o_blob, vbu_spd, o_size); } return fapi2::FAPI2_RC_SUCCESS; diff --git a/src/import/chips/p9/procedures/hwp/memory/p9_mss_eff_config.C b/src/import/chips/p9/procedures/hwp/memory/p9_mss_eff_config.C index 6bbbe10ef..d384ef179 100644 --- a/src/import/chips/p9/procedures/hwp/memory/p9_mss_eff_config.C +++ b/src/import/chips/p9/procedures/hwp/memory/p9_mss_eff_config.C @@ -154,6 +154,15 @@ fapi2::ReturnCode p9_mss_eff_config( const fapi2::Target<fapi2::TARGET_TYPE_MCS> FAPI_TRY( l_eff_config.rtt_write(l_dimm) ); FAPI_TRY( l_eff_config.zqcal_interval(l_dimm) ); FAPI_TRY( l_eff_config.memcal_interval(l_dimm) ); + FAPI_TRY( l_eff_config.dram_trp(l_dimm) ); + FAPI_TRY( l_eff_config.dram_trcd(l_dimm) ); + FAPI_TRY( l_eff_config.dram_twtr_l(l_dimm) ); + FAPI_TRY( l_eff_config.dram_twtr_s(l_dimm) ); + FAPI_TRY( l_eff_config.dram_trrd_s(l_dimm) ); + FAPI_TRY( l_eff_config.dram_trrd_l(l_dimm) ); + FAPI_TRY( l_eff_config.dram_tfaw(l_dimm) ); + FAPI_TRY( l_eff_config.dram_tras(l_dimm) ); + FAPI_TRY( l_eff_config.dram_trtp(l_dimm) ); // Hard-coded RIT protect attribute set (currently not taken account in eff_config) { @@ -207,6 +216,11 @@ fapi2::ReturnCode p9_mss_eff_config( const fapi2::Target<fapi2::TARGET_TYPE_MCS> FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_MSS_CAL_STEP_ENABLE, i_target, l_cal_step) ); } + { + uint8_t l_temp_refresh_mode[mss::PORTS_PER_MCS] = {0x01, 0x01}; + FAPI_TRY( FAPI_ATTR_SET( fapi2::ATTR_EFF_TEMP_REFRESH_MODE, i_target, l_temp_refresh_mode ) ); + } + }// dimm fapi_try_exit: diff --git a/src/import/chips/p9/procedures/hwp/memory/p9_mss_freq.C b/src/import/chips/p9/procedures/hwp/memory/p9_mss_freq.C index 1c41836f9..3b0fc2eb2 100644 --- a/src/import/chips/p9/procedures/hwp/memory/p9_mss_freq.C +++ b/src/import/chips/p9/procedures/hwp/memory/p9_mss_freq.C @@ -81,10 +81,17 @@ extern "C" "Failed check for freq_override()"); #endif + // Default values for initialization as well as empty dimm list case uint64_t l_min_dimm_freq = 0; uint64_t l_desired_cas_latency = 0; - if(!l_cas_latency.iv_dimm_list_empty) + if(l_cas_latency.iv_dimm_list_empty) + { + // Cannot fail out for an empty DIMM configuration + // So default values are set + FAPI_INF("DIMM list is empty! Setting default values for CAS latency and DIMM speed."); + } + else { uint64_t l_tCKmin = 0; @@ -95,12 +102,12 @@ extern "C" // Find dimm transfer speed from selected tCK l_min_dimm_freq = mss::ps_to_freq(l_tCKmin); + FAPI_INF("DIMM speed from selected tCK: %d", l_min_dimm_freq); FAPI_TRY(mss::select_supported_freq(l_min_dimm_freq), "Failed select_supported_freq()"); - // TK - RIT PROTECT - NEED TO CHANGE - l_min_dimm_freq = 2400; + FAPI_INF("Selected DIMM speed from supported speeds: %d", l_min_dimm_freq); // Set attributes FAPI_TRY(mss::set_freq_attrs(i_target, l_min_dimm_freq), @@ -108,10 +115,10 @@ extern "C" FAPI_TRY(mss::set_CL_attr(i_target, l_desired_cas_latency ), "Failed set_CL_attr()"); - }// end if + }// end else - FAPI_DBG( "Final Chosen Frequency: %d", l_min_dimm_freq); - FAPI_DBG( "Final Chosen CL: %d", l_desired_cas_latency); + FAPI_INF( "Final Chosen Frequency: %d", l_min_dimm_freq); + FAPI_INF( "Final Chosen CL: %d", l_desired_cas_latency); } diff --git a/src/import/chips/p9/procedures/hwp/memory/p9_mss_freq.H b/src/import/chips/p9/procedures/hwp/memory/p9_mss_freq.H index fd9304dd5..dae20eda2 100644 --- a/src/import/chips/p9/procedures/hwp/memory/p9_mss_freq.H +++ b/src/import/chips/p9/procedures/hwp/memory/p9_mss_freq.H @@ -76,10 +76,6 @@ inline fapi2::ReturnCode set_CL_attr(const fapi2::Target<fapi2::TARGET_TYPE_MCS> { // Declaration of the vector correctly initializes it to the right size // in the case the enum for PORTS_PER_MCS changes - - // RIT hackey to match the attribute file (likely fakeSPD is wrong) BRS - i_cas_latency = 0x10; - std::vector<uint8_t> l_cls_vect(PORTS_PER_MCS, uint8_t(i_cas_latency) ); // set CAS latency attribute @@ -105,9 +101,9 @@ inline fapi2::ReturnCode set_freq_attrs(const fapi2::Target<fapi2::TARGET_TYPE_M { // TK - RIT, needsto be corrected uint64_t l_nest_freq = 2; - const auto l_mcbist = i_target.getParent<fapi2::TARGET_TYPE_MCBIST>(); + const auto l_mcbist = mss::find_target<fapi2::TARGET_TYPE_MCBIST>(i_target); - FAPI_DBG("setting freq attrs for %s", mss::c_str(i_target)); + FAPI_INF("Setting freq attrs for %s", mss::c_str(i_target)); // TK //Update for P9, what do we do w/setting nest freq? - AAM diff --git a/src/import/chips/p9/procedures/xml/attribute_info/memory_mcs_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/memory_mcs_attributes.xml index 297029202..665b77eff 100644 --- a/src/import/chips/p9/procedures/xml/attribute_info/memory_mcs_attributes.xml +++ b/src/import/chips/p9/procedures/xml/attribute_info/memory_mcs_attributes.xml @@ -123,24 +123,6 @@ </attribute> <attribute> - <id>ATTR_EFF_NUM_RANKS_PER_DIMM</id> - <targetType>TARGET_TYPE_MCS</targetType> - <description> - Number of ranks in each DIMM. - Used in various locations and is computed in mss_eff_cnfg. - values are 0,1,2, 4 up to 32 - creator: mss_eff_cnfg - consumer: various - firmware notes: none - </description> - <initToZero></initToZero> - <valueType>uint8</valueType> - <writeable/> - <array> 2 2</array> - <mssAccessorName>eff_num_ranks_per_dimm</mssAccessorName> - </attribute> - - <attribute> <id>ATTR_EFF_CUSTOM_DIMM</id> <targetType>TARGET_TYPE_MCS</targetType> <description> @@ -159,44 +141,6 @@ </attribute> <attribute> - <id>ATTR_EFF_DRAM_WIDTH</id> - <targetType>TARGET_TYPE_MCS</targetType> - <description> - DRAM Device Width: X4, X8, X16, X32. - Used in various locations and is computed in mss_eff_cnfg. - creator: mss_eff_cnfg - consumer: various - firmware notes: none - </description> - <initToZero></initToZero> - <valueType>uint8</valueType> - <enum>X4 = 4, X8 = 8, X16 = 16, X32 = 32</enum> - <mssUnit>bits</mssUnit> - <writeable/> - <array>2 2</array> - <mssAccessorName>eff_dram_width</mssAccessorName> - </attribute> - - <attribute> - <id>ATTR_EFF_DRAM_RANK_MIX</id> - <targetType>TARGET_TYPE_MCS</targetType> - <description> - DRAM Device Rank Mix - Used in various locations and is computed in mss_eff_cnfg. - creator: mss_eff_cnfg - consumer: various - firmware notes: none - </description> - <initToZero></initToZero> - <valueType>uint8</valueType> - <enum>SYMMETRICAL = 0, ASYMMETICAL = 1</enum> - <mssUnit>bits</mssUnit> - <writeable/> - <array>2 2</array> - <mssAccessorName>eff_dram_rank_mix</mssAccessorName> - </attribute> - - <attribute> <id>ATTR_EFF_DIMM_SPARE</id> <targetType>TARGET_TYPE_MCS</targetType> <description> diff --git a/src/import/chips/p9/procedures/xml/attribute_info/memory_spd_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/memory_spd_attributes.xml index 3b5476dfb..44d4a5531 100755 --- a/src/import/chips/p9/procedures/xml/attribute_info/memory_spd_attributes.xml +++ b/src/import/chips/p9/procedures/xml/attribute_info/memory_spd_attributes.xml @@ -521,4 +521,63 @@ <mssAccessorName>eff_dram_tmaw</mssAccessorName> </attribute> + <attribute> + <id>ATTR_EFF_DRAM_WIDTH</id> + <targetType>TARGET_TYPE_MCS</targetType> + <description> + SDRAM Device Width + Decodes SPD Byte 12 (bits 2~0). + Options: X4 (4 bits), X8 (8 bits), X16 (16 bits), X32 (32 bits). + creator: mss_eff_cnfg + consumer: various + firmware notes: none + </description> + <initToZero></initToZero> + <valueType>uint8</valueType> + <enum>X4 = 4, X8 = 8, X16 = 16, X32 = 32</enum> + <mssUnit>bits</mssUnit> + <writeable/> + <array>2 2</array> + <mssAccessorName>eff_dram_width</mssAccessorName> + </attribute> + + <attribute> + <id>ATTR_EFF_DRAM_RANK_MIX</id> + <targetType>TARGET_TYPE_MCS</targetType> + <description> + DRAM Device Rank Mix + Decodes SPD Byte 12 (bits 5~3). + creator: mss_eff_cnfg + consumer: various + firmware notes: none + </description> + <initToZero></initToZero> + <valueType>uint8</valueType> + <enum>SYMMETRICAL = 0, ASYMMETICAL = 1</enum> + <mssUnit>decode from SPD spec</mssUnit> + <writeable/> + <array>2 2</array> + <mssAccessorName>eff_dram_rank_mix</mssAccessorName> + </attribute> + + <attribute> + <id>ATTR_EFF_NUM_RANKS_PER_DIMM</id> + <targetType>TARGET_TYPE_MCS</targetType> + <description> + Total number of ranks in each DIMM. + For monolithic and multi-load stack modules (SDP/DDP) this is the same as + the number of package ranks per DIMM (SPD Byte 12 bits 5~3). + For single load stack (3DS) modules this value is conceptually + [master + slave] ranks. + creator: mss_eff_cnfg + consumer: various + firmware notes: none + </description> + <initToZero></initToZero> + <valueType>uint8</valueType> + <writeable/> + <array> 2 2</array> + <mssAccessorName>eff_num_ranks_per_dimm</mssAccessorName> + </attribute> + </attributes> |
