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authorJoe McGill <jmcgill@us.ibm.com>2017-06-30 15:41:53 -0500
committerDean Sanner <dsanner@us.ibm.com>2017-07-19 11:40:36 -0400
commita3f6792f4f1c00b6168ed66de2456caacbd96014 (patch)
tree1bef540659f59840dc533a44306e476d36019ea1
parentdef5f0589377bc6d6f21718d715a0b784c17b70d (diff)
downloadtalos-hostboot-a3f6792f4f1c00b6168ed66de2456caacbd96014.tar.gz
talos-hostboot-a3f6792f4f1c00b6168ed66de2456caacbd96014.zip
updates for thread control, ramming with STOP enabled
remove pre-stop checks in p9_thread_control_stop, just attempt stop and confirm final expected state is reached: - after special wakeup from STOP2, existing threads_stopped check will fail given that the thread does not reach maintenance mode - the threads_running check will also fail assert ram_active in ram_setup function, if the thread is found to be inactive at the time ram is requested Change-Id: Iad8fd9e8a14395102b6c1b31d6595300a2da111f Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42674 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Kevin F. Reick <reick@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42679 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Dean Sanner <dsanner@us.ibm.com>
-rw-r--r--src/import/chips/p9/procedures/hwp/core/p9_thread_control.C97
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_ram_core.C10
2 files changed, 42 insertions, 65 deletions
diff --git a/src/import/chips/p9/procedures/hwp/core/p9_thread_control.C b/src/import/chips/p9/procedures/hwp/core/p9_thread_control.C
index 48d92b6c4..7ed4b1811 100644
--- a/src/import/chips/p9/procedures/hwp/core/p9_thread_control.C
+++ b/src/import/chips/p9/procedures/hwp/core/p9_thread_control.C
@@ -585,79 +585,48 @@ fapi2::ReturnCode p9_thread_control_stop(
FAPI_DBG("p9_thread_control_stop : Initiating stop command to core PC logic for threads 0x%x",
i_threads);
- // Check if the thread is already stopped, in that condition the procedure
- // should simply say thread stop success and no error.
- bool l_isStopped = false;
- FAPI_TRY(threads_stopped(i_target, i_threads, o_rasStatusReg, l_isStopped),
- "p9_thread_control_stop: unable to determine if threads are stopped. threads: 0x%x",
- i_threads);
-
- if(false == l_isStopped)
+ // Block interrupts while stopped
{
- // Pre-condition for stopping is that the threads are running (see figure 5.3 in the workbook)
- // How to reconcile with 5.5.1 which says "invalid in maint mode?" Is that just a sub-precondition?
- {
- bool l_running = false;
- FAPI_TRY(threads_running(i_target, i_threads, o_rasStatusReg, l_running),
- "p9_thread_control_stop: unable to determine if threads are running. threads: 0x%x",
- i_threads);
-
- PTC_ASSERT_WARN(l_running == true,
- i_warncheck,
- fapi2::P9_THREAD_CONTROL_STOP_PRE_NOTRUNNING()
- .set_CORE_TARGET(i_target)
- .set_THREAD(i_threads),
- "p9_thread_control_stop: ERROR: Threads cannot be stopped because they aren't running (threads=%x).", i_threads);
- }
-
- // Block interrupts while stopped
- {
- fapi2::buffer<uint64_t> l_mode_data;
-
- // SW375288: Reads to C_RAS_MODEREG causes SPR corruption. For now, the code will assume no other
- // bits are set and only set/clear mr_fence_interrupts
- //FAPI_TRY(fapi2::getScom(i_target, C_RAS_MODEREG, l_mode_data),
- // "p9_thread_control_step: getScom error when reading ras_modreg for threads 0x%x",
- // i_threads);
-
- l_mode_data.setBit<RAS_MODE_MR_FENCE_INTERRUPTS>();
- FAPI_TRY(fapi2::putScom(i_target, C_RAS_MODEREG, l_mode_data),
- "p9_thread_control_step: putScom error when issuing ras_modreg step mode for threads 0x%x",
- i_threads);
- }
+ fapi2::buffer<uint64_t> l_mode_data;
- // Stop the threads
- {
- fapi2::buffer<uint64_t> l_scom_data(g_control_reg_map[i_threads] >> CORE_STOP);
+ // SW375288: Reads to C_RAS_MODEREG causes SPR corruption. For now, the code will assume no other
+ // bits are set and only set/clear mr_fence_interrupts
+ //FAPI_TRY(fapi2::getScom(i_target, C_RAS_MODEREG, l_mode_data),
+ // "p9_thread_control_step: getScom error when reading ras_modreg for threads 0x%x",
+ // i_threads);
- FAPI_TRY(fapi2::putScom(i_target, C_DIRECT_CONTROLS, l_scom_data),
- "p9_thread_control_stop: putScom error when issuing sp_stop for threads 0x%x",
- i_threads);
- }
+ l_mode_data.setBit<RAS_MODE_MR_FENCE_INTERRUPTS>();
+ FAPI_TRY(fapi2::putScom(i_target, C_RAS_MODEREG, l_mode_data),
+ "p9_thread_control_step: putScom error when issuing ras_modreg step mode for threads 0x%x",
+ i_threads);
+ }
- // Post-conditions check
- {
- bool l_stopped = false;
- FAPI_TRY(threads_stopped(i_target, i_threads, o_rasStatusReg, l_stopped),
- "p9_thread_control_stop: unable to determine if threads are stopped. threads: 0x%x",
- i_threads);
+ // Stop the threads
+ {
+ fapi2::buffer<uint64_t> l_scom_data(g_control_reg_map[i_threads] >> CORE_STOP);
- PTC_ASSERT_WARN(l_stopped == true,
- i_warncheck,
- fapi2::P9_THREAD_CONTROL_STOP_FAIL()
- .set_CORE_TARGET(i_target)
- .set_THREAD(i_threads),
- "p9_thread_control_stop: ERROR: Thread Stop issued, but the threads are running. "
- "Stop might have failed for threads 0x%x", i_threads);
- }
- FAPI_INF("p9_thread_control_stop : stop command issued for threads 0x%x",
+ FAPI_TRY(fapi2::putScom(i_target, C_DIRECT_CONTROLS, l_scom_data),
+ "p9_thread_control_stop: putScom error when issuing sp_stop for threads 0x%x",
i_threads);
}
- else
+
+ // Post-conditions check
{
- FAPI_INF("p9_thread_control_stop : skipped calling stop cmd, since "
- "thread [0x%x] already in stop mode", i_threads);
+ bool l_stopped = false;
+ FAPI_TRY(threads_stopped(i_target, i_threads, o_rasStatusReg, l_stopped),
+ "p9_thread_control_stop: unable to determine if threads are stopped. threads: 0x%x",
+ i_threads);
+
+ PTC_ASSERT_WARN(l_stopped == true,
+ i_warncheck,
+ fapi2::P9_THREAD_CONTROL_STOP_FAIL()
+ .set_CORE_TARGET(i_target)
+ .set_THREAD(i_threads),
+ "p9_thread_control_stop: ERROR: Thread Stop issued, but the threads are running. "
+ "Stop might have failed for threads 0x%x", i_threads);
}
+ FAPI_INF("p9_thread_control_stop : stop command issued for threads 0x%x",
+ i_threads);
fapi_try_exit:
return fapi2::current_err;
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_ram_core.C b/src/import/chips/p9/procedures/hwp/perv/p9_ram_core.C
index 75d1dae07..bca6b98a9 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_ram_core.C
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_ram_core.C
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2016 */
+/* Contributors Listed Below - COPYRIGHT 2016,2017 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -180,6 +180,14 @@ fapi2::ReturnCode RamCore::ram_setup()
FAPI_DBG("THREAD_INFO:%#lx", l_data());
FAPI_TRY(l_data.extractToRight(l_thread_active, C_THREAD_INFO_VTID0_ACTIVE + iv_thread, 1));
+ if (!l_thread_active)
+ {
+ FAPI_TRY(l_data.setBit(C_THREAD_INFO_RAM_THREAD_ACTIVE + iv_thread));
+ FAPI_TRY(fapi2::putScom(iv_target, C_THREAD_INFO, l_data));
+ FAPI_TRY(fapi2::getScom(iv_target, C_THREAD_INFO, l_data));
+ FAPI_TRY(l_data.extractToRight(l_thread_active, C_THREAD_INFO_VTID0_ACTIVE + iv_thread, 1));
+ }
+
FAPI_ASSERT(l_thread_active,
fapi2::P9_RAM_THREAD_INACTIVE_ERR()
.set_THREAD(iv_thread),
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