PRD: Enhance error log content with c_err_rpt data

Change-Id: I147cdb7ca9571fd0b9e64db9b53b647ff5bde630
CQ: SW244442
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/8532
Tested-by: Jenkins Server
Reviewed-by: Christopher T. Phan <cphan@us.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Reviewed-by: Zane Shelley <zshelle@us.ibm.com>
Squashed: I7731336ac1132752b2a42a02aa7fa3e2c6a27b42
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/8581

6 files changed, 713 insertions, 1 deletions

diff --git a/src/usr/diag/prdf/common/plat/pegasus/Ex.rule b/src/usr/diag/prdf/common/plat/pegasus/Ex.rule
index 376721625..97271dbc2 100755
--- a/src/usr/diag/prdf/common/plat/pegasus/Ex.rule
+++ b/src/usr/diag/prdf/common/plat/pegasus/Ex.rule
@@ -186,6 +186,395 @@ chip Ex
         capture     group default;
     };
 
+    ###########################################################################
+    # EX Chiplet COREFIR Error Report Registers
+    ###########################################################################
+
+    register PCNE_REG0_HOLD_OUT
+    {
+        name        "EXP.EC.PC.PC_NE.PCNE_REG0_HOLD_OUT";
+        scomaddr    0x1001300D;
+        capture     group default;
+        capture     group CerrRegs;
+    };
+
+    register PCNE_REG1_HOLD_OUT
+    {
+        name        "EXP.EC.PC.PC_NE.PCNE_REG1_HOLD_OUT";
+        scomaddr    0x1001301D;
+        capture     group default;
+        capture     group CerrRegs;
+    };
+
+    register PCNE_REG2_HOLD_OUT
+    {
+        name        "EXP.EC.PC.PC_NE.PCNE_REG2_HOLD_OUT";
+        scomaddr    0x1001302D;
+        capture     group default;
+        capture     group CerrRegs;
+    };
+
+    register PCNE_REG3_HOLD_OUT
+    {
+        name        "EXP.EC.PC.PC_NE.PCNE_REG3_HOLD_OUT";
+        scomaddr    0x1001303D;
+        capture     group default;
+        capture     group CerrRegs;
+    };
+
+    register PCNE_REG4_HOLD_OUT
+    {
+        name        "EXP.EC.PC.PC_NE.PCNE_REG4_HOLD_OUT";
+        scomaddr    0x1001304D;
+        capture     group default;
+        capture     group CerrRegs;
+    };
+
+    register PCNE_REG5_HOLD_OUT
+    {
+        name        "EXP.EC.PC.PC_NE.PCNE_REG5_HOLD_OUT";
+        scomaddr    0x1001305D;
+        capture     group default;
+        capture     group CerrRegs;
+    };
+
+    register PCNE_REG6_HOLD_OUT
+    {
+        name        "EXP.EC.PC.PC_NE.PCNE_REG6_HOLD_OUT";
+        scomaddr    0x1001306D;
+        capture     group default;
+        capture     group CerrRegs;
+    };
+
+    register PCNE_REG7_HOLD_OUT
+    {
+        name        "EXP.EC.PC.PC_NE.PCNE_REG7_HOLD_OUT";
+        scomaddr    0x1001307D;
+        capture     group default;
+        capture     group CerrRegs;
+    };
+
+    register PCNW_REG0_HOLD_OUT
+    {
+        name        "EXP.EC.PC.PC_NW.PCNW_REG0_HOLD_OUT";
+        scomaddr    0x100132A9;
+        capture     group default;
+        capture     group CerrRegs;
+    };
+
+    register PCNW_REG1_HOLD_OUT
+    {
+        name        "EXP.EC.PC.PC_NW.PCNW_REG1_HOLD_OUT";
+        scomaddr    0x100132AA;
+        capture     group default;
+        capture     group CerrRegs;
+    };
+
+    register PCS_REG0_HOLD_OUT
+    {
+        name        "EXP.EC.PC.PC_S.PCS_REG0_HOLD_OUT";
+        scomaddr    0x100132CB;
+        capture     group default;
+        capture     group CerrRegs;
+    };
+
+    register PCS_REG1_HOLD_OUT
+    {
+        name        "EXP.EC.PC.PC_S.PCS_REG1_HOLD_OUT";
+        scomaddr    0x100132D5;
+        capture     req funccall("isMuranoVeniceNotDD1");
+        capture     group default;
+        capture     group CerrRegs;
+    };
+
+    register FXU_REG0_HOLD_OUT
+    {
+        name        "EXP.EC.FX.FXU_REG0_HOLD_OUT";
+        scomaddr    0x10013300;
+        capture     group default;
+        capture     group CerrRegs;
+    };
+
+    register FXU_REG1_HOLD_OUT
+    {
+        name        "EXP.EC.FX.FXU_REG1_HOLD_OUT";
+        scomaddr    0x10013301;
+        capture     group default;
+        capture     group CerrRegs;
+    };
+
+    register FXU_REG2_HOLD_OUT
+    {
+        name        "EXP.EC.FX.FXU_REG2_HOLD_OUT";
+        scomaddr    0x10013302;
+        capture     group default;
+        capture     group CerrRegs;
+    };
+
+    register FXU_REG3_HOLD_OUT
+    {
+        name        "EXP.EC.FX.FXU_REG3_HOLD_OUT";
+        scomaddr    0x10013303;
+        capture     group default;
+        capture     group CerrRegs;
+    };
+
+    register FXU_REG4_HOLD_OUT
+    {
+        name        "EXP.EC.FX.FXU_REG4_HOLD_OUT";
+        scomaddr    0x10013304;
+        capture     group default;
+        capture     group CerrRegs;
+    };
+
+    register ISU_REG0_ISU_HOLD_OUT
+    {
+        name        "EXP.EC.SD.ISU_REG0_HOLD_OUT";
+        scomaddr    0x10013340;
+        capture     group default;
+        capture     group CerrRegs;
+    };
+
+    register ISU_REG1_ISU_HOLD_OUT
+    {
+        name        "EXP.EC.SD.ISU_REG1_HOLD_OUT";
+        scomaddr    0x10013341;
+        capture     group default;
+        capture     group CerrRegs;
+    };
+
+    register ISU_REG2_ISU_HOLD_OUT
+    {
+        name        "EXP.EC.SD.ISU_REG2_HOLD_OUT";
+        scomaddr    0x10013342;
+        capture     group default;
+        capture     group CerrRegs;
+    };
+
+    register ISU_REG3_ISU_HOLD_OUT
+    {
+        name        "EXP.EC.SD.ISU_REG3_HOLD_OUT";
+        scomaddr    0x10013343;
+        capture     group default;
+        capture     group CerrRegs;
+    };
+
+    register ISU_REG4_ISU_HOLD_OUT
+    {
+        name        "EXP.EC.SD.ISU_REG4_HOLD_OUT";
+        scomaddr    0x10013344;
+        capture     group default;
+        capture     group CerrRegs;
+    };
+
+    register ISU_REG5_ISU_HOLD_OUT
+    {
+        name        "EXP.EC.SD.ISU_REG5_HOLD_OUT";
+        scomaddr    0x10013345;
+        capture     group default;
+        capture     group CerrRegs;
+    };
+
+    register ISU_REG6_ISU_HOLD_OUT
+    {
+        name        "EXP.EC.SD.ISU_REG6_HOLD_OUT";
+        scomaddr    0x10013346;
+        capture     group default;
+        capture     group CerrRegs;
+    };
+
+    register ISU_REG7_ISU_HOLD_OUT
+    {
+        name        "EXP.EC.SD.ISU_REG7_HOLD_OUT";
+        scomaddr    0x10013347;
+        capture     group default;
+        capture     group CerrRegs;
+    };
+
+    register ISU_REG8_ISU_HOLD_OUT_ERRPT
+    {
+        name        "EXP.EC.SD.ISU_REG8_HOLD_OUT";
+        scomaddr    0x10013348;
+        capture     group default;
+        capture     group CerrRegs;
+    };
+
+    register ISU_REG9_ISU_HOLD_OUT
+    {
+        name        "EXP.EC.SD.ISU_REG9_HOLD_OUT";
+        scomaddr    0x10013349;
+        capture     group default;
+        capture     group CerrRegs;
+    };
+
+    register IFU_REG0_HOLD_OUT
+    {
+        name        "EXP.EC.IFU.IFU_REG0_HOLD_OUT";
+        scomaddr    0x10013381;
+        capture     group default;
+        capture     group CerrRegs;
+    };
+
+    register IFU_REG1_HOLD_OUT
+    {
+        name        "EXP.EC.IFU.IFU_REG1_HOLD_OUT";
+        scomaddr    0x10013382;
+        capture     group default;
+        capture     group CerrRegs;
+    };
+
+    register IFU_REG2_HOLD_OUT
+    {
+        name        "EXP.EC.IFU.IFU_REG2_HOLD_OUT";
+        scomaddr    0x10013383;
+        capture     group default;
+        capture     group CerrRegs;
+    };
+
+    register IFU_REG3_HOLD_OUT
+    {
+        name        "EXP.EC.IFU.IFU_REG3_HOLD_OUT";
+        scomaddr    0x10013384;
+        capture     group default;
+        capture     group CerrRegs;
+    };
+
+    register IFU_REG4_HOLD_OUT
+    {
+        name        "EXP.EC.IFU.IFU_REG4_HOLD_OUT";
+        scomaddr    0x10013385;
+        capture     group default;
+        capture     group CerrRegs;
+    };
+
+    register LSU_REG0_HOLD_OUT
+    {
+        name        "EXP.EC.LS.LSU_REG0_HOLD_OUT";
+        scomaddr    0x100133C0;
+        capture     group default;
+        capture     group CerrRegs;
+    };
+
+    register LSU_REG1_HOLD_OUT
+    {
+        name        "EXP.EC.LS.LSU_REG1_HOLD_OUT";
+        scomaddr    0x100133C1;
+        capture     group default;
+        capture     group CerrRegs;
+    };
+
+    register LSU_REG2_HOLD_OUT
+    {
+        name        "EXP.EC.LS.LSU_REG2_HOLD_OUT";
+        scomaddr    0x100133C2;
+        capture     group default;
+        capture     group CerrRegs;
+    };
+
+    register LSU_REG3_HOLD_OUT
+    {
+        name        "EXP.EC.LS.LSU_REG3_HOLD_OUT";
+        scomaddr    0x100133C3;
+        capture     group default;
+        capture     group CerrRegs;
+    };
+
+    register LSU_REG4_HOLD_OUT
+    {
+        name        "EXP.EC.LS.LSU_REG4_HOLD_OUT";
+        scomaddr    0x100133C4;
+        capture     group default;
+        capture     group CerrRegs;
+    };
+
+    register LSU_REG5_HOLD_OUT
+    {
+        name        "EXP.EC.LS.LSU_REG5_HOLD_OUT";
+        scomaddr    0x100133C5;
+        capture     group default;
+        capture     group CerrRegs;
+    };
+
+    register LSU_REG6_HOLD_OUT
+    {
+        name        "EXP.EC.LS.LSU_REG6_HOLD_OUT";
+        scomaddr    0x100133C6;
+        capture     group default;
+        capture     group CerrRegs;
+    };
+
+    register LSU_REG7_HOLD_OUT
+    {
+        name        "EXP.EC.LS.LSU_REG7_HOLD_OUT";
+        scomaddr    0x100133C7;
+        capture     group default;
+        capture     group CerrRegs;
+    };
+
+    register LSU_REG8_HOLD_OUT
+    {
+        name        "EXP.EC.LS.LSU_REG8_HOLD_OUT";
+        scomaddr    0x100133C8;
+        capture     group default;
+        capture     group CerrRegs;
+    };
+
+    register LSU_REG9_HOLD_OUT
+    {
+        name        "EXP.EC.LS.LSU_REG9_HOLD_OUT";
+        scomaddr    0x100133C9;
+        capture     group default;
+        capture     group CerrRegs;
+    };
+
+    register LSU_REG10_HOLD_OUT
+    {
+        name        "EXP.EC.LS.LSU_REG10_HOLD_OUT";
+        scomaddr    0x100133CA;
+        capture     group default;
+        capture     group CerrRegs;
+    };
+
+    register LSU_REG11_HOLD_OUT
+    {
+        name        "EXP.EC.LS.LSU_REG11_HOLD_OUT";
+        scomaddr    0x100133CB;
+        capture     group default;
+        capture     group CerrRegs;
+    };
+
+    register LSU_REG12_HOLD_OUT
+    {
+        name        "EXP.EC.LS.LSU_REG12_HOLD_OUT";
+        scomaddr    0x100133CC;
+        capture     group default;
+        capture     group CerrRegs;
+    };
+
+    register LSU_REG13_HOLD_OUT
+    {
+        name        "EXP.EC.LS.LSU_REG13_HOLD_OUT";
+        scomaddr    0x100133CD;
+        capture     group default;
+        capture     group CerrRegs;
+    };
+
+    register LSU_REG14_HOLD_OUT
+    {
+        name        "EXP.EC.LS.LSU_REG14_HOLD_OUT";
+        scomaddr    0x100133CE;
+        capture     group default;
+        capture     group CerrRegs;
+    };
+
+    register LSU_REG15_HOLD_OUT
+    {
+        name        "EXP.EC.LS.LSU_REG15_HOLD_OUT";
+        scomaddr    0x100133CF;
+        capture     group default;
+        capture     group CerrRegs;
+    };
+
     ############################################################################
     # EX Chiplet L2FIR
     ############################################################################
@@ -224,6 +613,22 @@ chip Ex
         capture     req nonzero("L2FIR");
     };
 
+    register L2FIR_ERROR_REPORT_0
+    {
+        name        "EXP.L2.L2MISC.L2CERRS.ERR_RPT0";
+        scomaddr    0x10012815;
+        capture     group default;
+        capture     group CerrRegs;
+    };
+
+    register L2FIR_ERROR_REPORT_1
+    {
+        name        "EXP.L2.L2MISC.L2CERRS.ERR_RPT1";
+        scomaddr    0x10012816;
+        capture     group default;
+        capture     group CerrRegs;
+    };
+
     ############################################################################
     # EX Chiplet L3FIR
     ############################################################################
@@ -262,6 +667,22 @@ chip Ex
         capture     req nonzero("L3FIR");
     };
 
+    register L3FIR_RD0_ERROR_REPORT
+    {
+        name        "EXP.L3.L3_MISC.L3CERRS.L3_CTL_CHECK_RD0_REG";
+        scomaddr    0x10010810;
+        capture     group default;
+        capture     group CerrRegs;
+    };
+
+    register L3FIR_RD1_ERROR_REPORT
+    {
+        name        "EXP.L3.L3_MISC.L3CERRS.L3_CTL_CHECK_RD1_REG";
+        scomaddr    0x10010817;
+        capture     group default;
+        capture     group CerrRegs;
+    };
+
     ############################################################################
     # EX Chiplet NCUFIR
     ############################################################################
@@ -300,6 +721,14 @@ chip Ex
         capture     req nonzero("NCUFIR");
     };
 
+    register NCUFIR_ERROR_REPORT
+    {
+        name        "EXP.NC.NCMISC.NCSCOMS.ERR_RPT_REG";
+        scomaddr    0x10010C0C;
+        capture     group default;
+        capture     group CerrRegs;
+    };
+
     ############################################################################
     # EX Chiplet SPATTNs
     ############################################################################
@@ -312,6 +741,7 @@ chip Ex
         name        "EX00.EC.PC.PC_NE.TCTL0.SPATTN";
         scomaddr    0x10013007;
         capture     group default;
+        capture     group CerrRegs;
     };
 
     register SPATTN_1
@@ -319,6 +749,7 @@ chip Ex
         name        "EX00.EC.PC.PC_NE.TCTL1.SPATTN";
         scomaddr    0x10013017;
         capture     group default;
+        capture     group CerrRegs;
     };
 
     register SPATTN_2
@@ -326,12 +757,14 @@ chip Ex
         name        "EX00.EC.PC.PC_NE.TCTL2.SPATTN";
         scomaddr    0x10013027;
         capture     group default;
+        capture     group CerrRegs;
     };
     register SPATTN_3
     {
         name        "EX00.EC.PC.PC_NE.TCTL3.SPATTN";
         scomaddr    0x10013037;
         capture     group default;
+        capture     group CerrRegs;
     };
 
     register SPATTN_4
@@ -339,6 +772,7 @@ chip Ex
         name        "EX00.EC.PC.PC_NE.TCTL4.SPATTN";
         scomaddr    0x10013047;
         capture     group default;
+        capture     group CerrRegs;
     };
 
     register SPATTN_5
@@ -346,6 +780,7 @@ chip Ex
         name        "EX00.EC.PC.PC_NE.TCTL5.SPATTN";
         scomaddr    0x10013057;
         capture     group default;
+        capture     group CerrRegs;
     };
 
     register SPATTN_6
@@ -353,6 +788,7 @@ chip Ex
         name        "EX00.EC.PC.PC_NE.TCTL6.SPATTN";
         scomaddr    0x10013067;
         capture     group default;
+        capture     group CerrRegs;
     };
 
     register SPATTN_7
@@ -360,6 +796,7 @@ chip Ex
         name        "EX00.EC.PC.PC_NE.TCTL7.SPATTN";
         scomaddr    0x10013077;
         capture     group default;
+        capture     group CerrRegs;
     };
 
     ############################################################################
diff --git a/src/usr/diag/prdf/common/plat/pegasus/Proc_regs_PB.rule b/src/usr/diag/prdf/common/plat/pegasus/Proc_regs_PB.rule
index 4b19ffeee..3108edb6e 100755
--- a/src/usr/diag/prdf/common/plat/pegasus/Proc_regs_PB.rule
+++ b/src/usr/diag/prdf/common/plat/pegasus/Proc_regs_PB.rule
@@ -136,6 +136,22 @@
         capture     req nonzero("NXDMAENGFIR");
     };
 
+    register NXDMAENG_ERROR_REPORT_0
+    {
+        name        "EN.NX.DMA.SU_DMA_ERROR_REPORT_0";
+        scomaddr    0x02013057;
+        capture     group default;
+        capture     group CerrRegs;
+    };
+
+    register NXDMAENG_ERROR_REPORT_1
+    {
+        name        "EN.NX.DMA.SU_DMA_ERROR_REPORT_1";
+        scomaddr    0x02013058;
+        capture     group default;
+        capture     group CerrRegs;
+    };
+
     ############################################################################
     # PB Chiplet NXCQFIR
     ############################################################################
@@ -174,6 +190,22 @@
         capture     req nonzero("NXCQFIR");
     };
 
+    register NXCQFIR_ERROR_REPORT_0
+    {
+        name        "EN.NX.PBI.CQ_WRAP.NXCQ_SCOM.NX_PB_ERR_RPT_0";
+        scomaddr    0x020130A2;
+        capture     group default;
+        capture     group CerrRegs;
+    };
+
+    register NXCQFIR_ERROR_REPORT_1
+    {
+        name        "EN.NX.PBI.CQ_WRAP.NXCQ_SCOM.NX_PB_ERR_RPT_1";
+        scomaddr    0x020130A3;
+        capture     group default;
+        capture     group CerrRegs;
+    };
+
     ############################################################################
     # PB Chiplet NXASFIR
     ############################################################################
@@ -195,6 +227,43 @@
     };
 
     ############################################################################
+    # NXASFIR Error Report Registers
+    ############################################################################
+
+    register NXASFIR_IN_ERROR_HOLD_REPORT
+    {
+        name        "EN.NX.AS.AS_IN_ERROR_HOLD";
+        scomaddr    0x020130EB;
+        capture     group default;
+        capture     group CerrRegs;
+    };
+
+    register NXASFIR_ERROR_HOLD_REPORT
+    {
+        name        "EN.NX.AS.AS_ERROR_HOLD";
+        scomaddr    0x020130FF;
+        capture     group default;
+        capture     group CerrRegs;
+    };
+
+    register NXASFIR_EG_ERROR_HOLD_REPORT
+    {
+        name        "EN.NX.AS.AS_EG_RLM.AS_EG_ERROR_HOLD";
+        scomaddr    0x0201314E;
+        capture     req funccall("isMuranoDD1");
+        capture     group default;
+        capture     group CerrRegs;
+    };
+
+    register NXASFIR_CE_HOLD_REPORT
+    {
+        name        "EN.NX.AS.AS_EG_RLM.AS_EG_CE_HOLD";
+        scomaddr    0x0201314F;
+        capture     group default;
+        capture     group CerrRegs;
+    };
+
+    ############################################################################
     # PB Chiplet NXCXAFIR
     ############################################################################
 
@@ -232,6 +301,38 @@
         capture     req nonzero("NXCXAFIR");
     };
 
+    register NXCXAFIR_SNP_ERROR_REPORT
+    {
+        name        "EN.NX.CXA.CXA_SNPFE.SNP_REGS.CXA_SNP_ERROR_REPORT_REG";
+        scomaddr    0x0201300A;
+        capture     group default;
+        capture     group CerrRegs;
+    };
+
+    register NXCXAFIR_APC1_ERROR_REPORT
+    {
+        name        "EN.NX.CXA.CXA_APC1.ERRRPT";
+        scomaddr    0x0201300B;
+        capture     group default;
+        capture     group CerrRegs;
+    };
+
+    register NXCXAFIR_XPT_ERROR_REPORT
+    {
+        name        "EN.NX.CXA.XPT_ERROR_REPORT";
+        scomaddr    0x0201300C;
+        capture     group default;
+        capture     group CerrRegs;
+    };
+
+    register NXCXAFIR_TLBI_ERROR_REPORT
+    {
+        name        "EN.NX.CXA.CXA_XPT.XPT_SCOMFIR.TLBI_ERROR_REPORT";
+        scomaddr    0x0201300D;
+        capture     group default;
+        capture     group CerrRegs;
+    };
+
     ############################################################################
     # PB Chiplet MCDFIR
     ############################################################################
@@ -270,6 +371,14 @@
         capture     req nonzero("MCDFIR");
     };
 
+    register MCDFIR_ERROR_REPORT
+    {
+        name        "EH.PB.MCD.MCDCTL.MCD_ERPT";
+        scomaddr    0x02013419;
+        capture     group default;
+        capture     group CerrRegs;
+    };
+
     ############################################################################
     # PB Chiplet PBWESTFIR
     ############################################################################
@@ -525,6 +634,30 @@
         capture     req nonzero("PBAFIR");
     };
 
+    register PBAFIR_ERROR_REPORT_0
+    {
+        name        "EN.TPC.PBA.PBAERRRPT0";
+        scomaddr    0x0201084C;
+        capture     group default;
+        capture     group CerrRegs;
+    };
+
+    register PBAFIR_ERROR_REPORT_1
+    {
+        name        "EN.TPC.PBA.PBAERRRPT1";
+        scomaddr    0x0201084D;
+        capture     group default;
+        capture     group CerrRegs;
+    };
+
+    register PBAFIR_ERROR_REPORT_2
+    {
+        name        "EN.TPC.PBA.PBAERRRPT2";
+        scomaddr    0x0201084E;
+        capture     group default;
+        capture     group CerrRegs;
+    };
+
     ############################################################################
     # PB Chiplet EHHCAFIR
     ############################################################################
@@ -639,6 +772,30 @@
         capture     req nonzero("PCINESTFIR_0");
     };
 
+    register PCINESTFIR0_ERROR_REPORT_0
+    {
+        name        "ES.PE_WRAP_TOP.PE0.PEPBCQ.PBCQ.CERR_RPT0_REG";
+        scomaddr    0x0201201C;
+        capture     group default;
+        capture     group CerrRegs;
+    };
+
+    register PCINESTFIR0_ERROR_REPORT_1
+    {
+        name        "ES.PE_WRAP_TOP.PE0.PEPBCQ.PBCQ.CERR_RPT1_REG";
+        scomaddr    0x0201201D;
+        capture     group default;
+        capture     group CerrRegs;
+    };
+
+    register PCINESTFIR0_ERROR_REPORT_2
+    {
+        name        "ES.PE_WRAP_TOP.PE0.PEPBCQ.PBCQ.CERR_RPT2_REG";
+        scomaddr    0x0201201E;
+        capture     group default;
+        capture     group CerrRegs;
+    };
+
     ############################################################################
     # PB Chiplet PCINESTFIR_1
     ############################################################################
@@ -677,6 +834,30 @@
         capture     req nonzero("PCINESTFIR_1");
     };
 
+    register PCINESTFIR1_ERROR_REPORT_0
+    {
+        name        "ES.PE_WRAP_TOP.PE1.PEPBCQ.PBCQ.CERR_RPT0_REG";
+        scomaddr    0x0201241C;
+        capture     group default;
+        capture     group CerrRegs;
+    };
+
+    register PCINESTFIR1_ERROR_REPORT_1
+    {
+        name        "ES.PE_WRAP_TOP.PE1.PEPBCQ.PBCQ.CERR_RPT1_REG";
+        scomaddr    0x0201241D;
+        capture     group default;
+        capture     group CerrRegs;
+    };
+
+    register PCINESTFIR1_ERROR_REPORT_2
+    {
+        name        "ES.PE_WRAP_TOP.PE1.PEPBCQ.PBCQ.CERR_RPT2_REG";
+        scomaddr    0x0201241E;
+        capture     group default;
+        capture     group CerrRegs;
+    };
+
     ############################################################################
     # PB Chiplet PCINESTFIR_2
     ############################################################################
@@ -715,6 +896,30 @@
         capture     req nonzero("PCINESTFIR_2");
     };
 
+    register PCINESTFIR2_ERROR_REPORT_0
+    {
+        name        "ES.PE_WRAP_TOP.PE2.PEPBCQ.PBCQ.CERR_RPT0_REG";
+        scomaddr    0x0201281C;
+        capture     group default;
+        capture     group CerrRegs;
+    };
+
+    register PCINESTFIR2_ERROR_REPORT_1
+    {
+        name        "ES.PE_WRAP_TOP.PE2.PEPBCQ.PBCQ.CERR_RPT1_REG";
+        scomaddr    0x0201281D;
+        capture     group default;
+        capture     group CerrRegs;
+    };
+
+    register PCINESTFIR2_ERROR_REPORT_2
+    {
+        name        "ES.PE_WRAP_TOP.PE2.PEPBCQ.PBCQ.CERR_RPT2_REG";
+        scomaddr    0x0201281E;
+        capture     group default;
+        capture     group CerrRegs;
+    };
+
     ############################################################################
     # PB Chiplet IOMCFIR_0
     ############################################################################
diff --git a/src/usr/diag/prdf/common/plat/pegasus/Proc_regs_PCIE.rule b/src/usr/diag/prdf/common/plat/pegasus/Proc_regs_PCIE.rule
index 71aa714f8..cdb321909 100755
--- a/src/usr/diag/prdf/common/plat/pegasus/Proc_regs_PCIE.rule
+++ b/src/usr/diag/prdf/common/plat/pegasus/Proc_regs_PCIE.rule
@@ -187,6 +187,22 @@
         capture     req nonzero("PBFFIR");
     };
 
+    register PBFIR_IOF0_ERROR_REPORT
+    {
+        name        "ES.PBES_WRAP_TOP.PBES_TOP.IOF0.IOF.PCI_WRAP.PCI_BB.PB_IOF_ERR_STATUS";
+        scomaddr    0x0901083A;
+        capture     group default;
+        capture     group CerrRegs;
+    };
+
+    register PBFIR_IOF1_ERROR_REPORT
+    {
+        name        "ES.PBES_WRAP_TOP.PBES_TOP.IOF1.IOF.PCI_WRAP.PCI_BB.PB_IOF_ERR_STATUS";
+        scomaddr    0x0901083B;
+        capture     group default;
+        capture     group CerrRegs;
+    };
+
     ############################################################################
     # PCIE Chiplet IOPCIFIR_0
     ############################################################################
diff --git a/src/usr/diag/prdf/common/plat/pegasus/Proc_regs_TP.rule b/src/usr/diag/prdf/common/plat/pegasus/Proc_regs_TP.rule
index 57906a3d2..40c729f49 100755
--- a/src/usr/diag/prdf/common/plat/pegasus/Proc_regs_TP.rule
+++ b/src/usr/diag/prdf/common/plat/pegasus/Proc_regs_TP.rule
@@ -5,7 +5,7 @@
 #
 # IBM CONFIDENTIAL
 #
-# COPYRIGHT International Business Machines Corp. 2012,2013
+# COPYRIGHT International Business Machines Corp. 2012,2014
 #
 # p1
 #
@@ -152,6 +152,14 @@
         capture     req nonzero("OCCFIR");
     };
 
+    register OCCFIR_ERROR_REPORT
+    {
+        name        "EH.TPCHIP.OCC.OCI.SCOM.OCC_SCOM_OCCERRRPT";
+        scomaddr    0x0101080A;
+        capture     group default;
+        capture     group CerrRegs;
+    };
+
     ############################################################################
     # TP Chiplet PBAMFIR
     ############################################################################
diff --git a/src/usr/diag/prdf/common/plat/pegasus/prdfP8Ex.C b/src/usr/diag/prdf/common/plat/pegasus/prdfP8Ex.C
index 109f63ed1..654b42512 100644
--- a/src/usr/diag/prdf/common/plat/pegasus/prdfP8Ex.C
+++ b/src/usr/diag/prdf/common/plat/pegasus/prdfP8Ex.C
@@ -34,6 +34,9 @@
 #include <prdfMfgThresholdMgr.H>
 #include <prdfMfgThresholds.H>
 #include <prdfMfgThresholdFile_common.H>
+#include <prdfPlatServices.H>
+
+using namespace TARGETING;
 
 namespace PRDF
 {
@@ -62,6 +65,32 @@ int32_t ClearServiceCallFlag( ExtensibleChip * i_chip,
 }
 PRDF_PLUGIN_DEFINE( Ex, ClearServiceCallFlag );
 
+/**
+  * @brief  Checks if parent PROC is not Venice DD1.x and not Murano DD1.x.
+  * @param  i_ex             EX chip.
+  * @param  o_isMurVenNotDD1 TRUE parent PROC is not Venice DD1.x and not Murano
+  *         DD1.x, FALSE otherwise.
+  * @return SUCCESS
+  */
+int32_t isMuranoVeniceNotDD1( ExtensibleChip * i_ex, bool & o_isMurVenNotDD1 )
+{
+    o_isMurVenNotDD1 = true;
+
+    TargetHandle_t proc = getParentChip( i_ex->GetChipHandle() );
+    if ( NULL != proc )
+    {
+        if ( ( (MODEL_VENICE == getProcModel(proc)) ||
+               (MODEL_MURANO == getProcModel(proc)) ) &&
+             ( 0x20 > getChipLevel(proc) ) )
+        {
+            o_isMurVenNotDD1 = false;
+        }
+    }
+
+    return SUCCESS;
+}
+PRDF_PLUGIN_DEFINE( Ex, isMuranoVeniceNotDD1 );
+
 } // namespace Ex ends
 
 }// namespace PRDF ends
diff --git a/src/usr/diag/prdf/common/plat/pegasus/prdfP8Proc.C b/src/usr/diag/prdf/common/plat/pegasus/prdfP8Proc.C
index 6700a9e2d..ef356fdd3 100755
--- a/src/usr/diag/prdf/common/plat/pegasus/prdfP8Proc.C
+++ b/src/usr/diag/prdf/common/plat/pegasus/prdfP8Proc.C
@@ -786,6 +786,23 @@ int32_t isVeniceProc( ExtensibleChip * i_chip, bool & o_isVenice )
 }
 PRDF_PLUGIN_DEFINE( Proc, isVeniceProc );
 
+/**
+  * @brief  checks if proc is Murano chip and is at DD1.x level.
+  * @param  i_chip P8 chip.
+  * @param  o_isMuranoDD1 TRUE if chip is murano DD1.x FALSE otherwise.
+  * @return SUCCESS
+  */
+int32_t isMuranoDD1( ExtensibleChip * i_chip, bool & o_isMuranoDD1 )
+{
+    o_isMuranoDD1 = false;
+    if( ( MODEL_MURANO == getProcModel( i_chip->GetChipHandle() ) ) &&
+        ( 0x20 > getChipLevel( i_chip->GetChipHandle() ) ) )
+        o_isMuranoDD1 = true;
+
+    return SUCCESS;
+}
+PRDF_PLUGIN_DEFINE( Proc, isMuranoDD1 );
+
 } // end namespace Proc
 
 } // end namespace PRDF