Apply BOOT_FLAGS onto slave sbe

Need to get the BOOT_FLAGS (scratch3) bits set into the slave
sbe

Also consolidated other code to use a single set of interfaces
and structures.

Change-Id: I670acb5cee1ab4fcebaa7be72aa3b986598873d3
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/28003
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Reviewed-by: Dean Sanner <dsanner@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>

5 files changed, 89 insertions, 32 deletions

diff --git a/src/include/usr/initservice/mboxRegs.H b/src/include/usr/initservice/mboxRegs.H
index 69b942757..737ab7bb4 100644
--- a/src/include/usr/initservice/mboxRegs.H
+++ b/src/include/usr/initservice/mboxRegs.H
@@ -29,14 +29,31 @@ namespace INITSERVICE
 {
 namespace SPLESS
 {
-    const   uint32_t    MBOX_SCRATCH_REG1               =   0x00050038;
-    const   uint32_t    MBOX_SCRATCH_REG2               =   0x00050039;
-    const   uint32_t    MBOX_SCRATCH_REG3               =   0x0005003a;
-    const   uint32_t    MBOX_SCRATCH_REG4               =   0x0005003b;
-    const   uint32_t    MBOX_SCRATCH_REG5               =   0x0005003c;
-    const   uint32_t    MBOX_SCRATCH_REG6               =   0x0005003d;
-    const   uint32_t    MBOX_SCRATCH_REG7               =   0x0005003e;
-    const   uint32_t    MBOX_SCRATCH_REG8               =   0x0005003f;
+    const   uint32_t    MBOX_SCRATCH_REG1 =   0x00050038; //CFAM 2838
+    const   uint32_t    MBOX_SCRATCH_REG2 =   0x00050039; //CFAM 2839
+    const   uint32_t    MBOX_SCRATCH_REG3 =   0x0005003a; //CFAM 283A
+    const   uint32_t    MBOX_SCRATCH_REG4 =   0x0005003b; //CFAM 283B
+    const   uint32_t    MBOX_SCRATCH_REG5 =   0x0005003c; //CFAM 283C
+    const   uint32_t    MBOX_SCRATCH_REG6 =   0x0005003d; //CFAM 283D
+    const   uint32_t    MBOX_SCRATCH_REG7 =   0x0005003e; //CFAM 283E
+    const   uint32_t    MBOX_SCRATCH_REG8 =   0x0005003f; //CFAM 283F
+
+
+    // Mailbox Scratch Register 3
+    union MboxScratch3_t
+    {
+        uint32_t data32;
+        struct
+        {
+            uint32_t istepMode:1;       //0
+            uint32_t goToRuntime:1;     //1
+            uint32_t isMpipl:1;         //2
+            uint32_t fspAttached:1;     //3
+            uint32_t sbeFFDC:1;         //4
+            uint32_t sbeInternalFFDC:1; //5
+            uint32_t reserved:26;       //6:31
+        } PACKED;
+    };
 };
 };
 #endif
diff --git a/src/include/usr/util/utilmbox_scratch.H b/src/include/usr/util/utilmbox_scratch.H
index b995da557..dd9584c18 100644
--- a/src/include/usr/util/utilmbox_scratch.H
+++ b/src/include/usr/util/utilmbox_scratch.H
@@ -61,10 +61,6 @@ namespace Util
         MSG_TYPE_TRACE          =       0x00,
         MSG_TYPE_ATTRDUMP       =       0x01,
 
-
-        ISTEP_CONFIG_BIT        =       0x8000000000000000,
-        MPIPL_CONFIG_BIT        =       0x2000000000000000,
-
     };
 
     /**
@@ -85,11 +81,11 @@ namespace Util
      *  These scom addresses are always accessible and any errors are commited
      *  internally
      * @param[in] i_addr        Scom address of mailbox reg to write
-     * @param[in] i_data        Data to write to mailbox (only 0:31 are valid)
+     * @param[in] i_data        Data to write to mailbox
      *
      * @return none
      */
-      void writeScratchReg(uint64_t i_addr, uint64_t i_data);
+    void writeScratchReg(uint64_t i_addr, uint32_t i_data);
 
     /**
      * @brief This function reads data to mailbox scratch reg
@@ -97,9 +93,9 @@ namespace Util
      *  internally
      * @param[in] i_addr        Scom address of mailbox reg to read
      *
-     * @return Data in mailbox scratch reg (only 0:31 are valid)
+     * @return Data in mailbox scratch reg
      */
-      uint64_t readScratchReg(uint64_t i_addr);
+    uint32_t readScratchReg(uint64_t i_addr);
 };
 
 #endif //UTILMEM_H
diff --git a/src/usr/isteps/istep08/call_host_slave_sbe_config.C b/src/usr/isteps/istep08/call_host_slave_sbe_config.C
index 4867b6b6e..cf0300ba5 100644
--- a/src/usr/isteps/istep08/call_host_slave_sbe_config.C
+++ b/src/usr/isteps/istep08/call_host_slave_sbe_config.C
@@ -61,6 +61,7 @@
 #include <errl/errludtarget.H>
 
 #include <p9_setup_sbe_config.H>
+#include <initservice/mboxRegs.H>
 
 using namespace ISTEP_ERROR;
 using namespace ERRORLOG;
@@ -78,13 +79,56 @@ void* call_host_slave_sbe_config(void *io_pArgs)
     TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
              "call_host_slave_sbe_config entry" );
 
+    TARGETING::Target* l_pMasterProcTarget = NULL;
+    TARGETING::targetService().masterProcChipTargetHandle(l_pMasterProcTarget);
+
+    TARGETING::Target* l_sys = NULL;
+    targetService().getTopLevelTarget(l_sys);
+    assert( l_sys != NULL );
+
+    // Setup the boot flags attribute for the slaves based on the data
+    //  from the master proc
+    INITSERVICE::SPLESS::MboxScratch3_t l_scratch3;
+    uint64_t l_scratch3scom = 0;
+    size_t scomsize = sizeof(l_scratch3scom);
+    l_errl = deviceRead( l_pMasterProcTarget,
+                         &l_scratch3scom,
+                         scomsize,
+                         DEVICE_SCOM_ADDRESS(
+                           INITSERVICE::SPLESS::MBOX_SCRATCH_REG3 ) );
+    if( l_errl )
+    {
+        // Create IStep error log and cross reference error that occurred
+        l_stepError.addErrorDetails( l_errl );
+
+        // Commit Error
+        errlCommit( l_errl, ISTEP_COMP_ID );
+
+        // Just make some reasonable guesses...
+        TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+                   "Failed to read MBOX Scratch3" );
+
+        l_scratch3.data32 = 0;
+        l_scratch3.fspAttached = INITSERVICE::spBaseServicesEnabled();
+        l_scratch3.sbeFFDC = 0;
+        l_scratch3.sbeInternalFFDC = 1;
+    }
+    else
+    {
+        // data is in bits 0:31
+        l_scratch3.data32 = static_cast<uint32_t>(l_scratch3scom >> 32);
+
+        // turn off the istep bit
+        l_scratch3.istepMode = 0;
+    }
+    // write the attribute
+    l_sys->setAttr<ATTR_BOOT_FLAGS>(l_scratch3.data32);
+
+
     // execute p9_setup_sbe_config.C for non-primary processor targets
     TARGETING::TargetHandleList l_cpuTargetList;
     getAllChips(l_cpuTargetList, TYPE_PROC);
 
-    TARGETING::Target* l_pMasterProcTarget = NULL;
-    TARGETING::targetService().masterProcChipTargetHandle(l_pMasterProcTarget);
-
     for (const auto & l_cpu_target: l_cpuTargetList)
     {
         // do not call HWP on master processor
@@ -111,7 +155,7 @@ void* call_host_slave_sbe_config(void *io_pArgs)
                          "PLID=0x%x", l_errl->plid() );
 
                 // Commit Error
-                errlCommit( l_errl, HWPF_COMP_ID );
+                errlCommit( l_errl, ISTEP_COMP_ID );
             }
         }
     } // end of cycling through all processor chips
@@ -126,7 +170,7 @@ void* call_host_slave_sbe_config(void *io_pArgs)
         l_stepError.addErrorDetails( err );
 
         // Commit Error
-        errlCommit( err, HWPF_COMP_ID );
+        errlCommit( err, ISTEP_COMP_ID );
     }
 #endif
     TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
diff --git a/src/usr/targeting/targetservicestart.C b/src/usr/targeting/targetservicestart.C
index 853db5ebd..c1f23a1f8 100755
--- a/src/usr/targeting/targetservicestart.C
+++ b/src/usr/targeting/targetservicestart.C
@@ -246,17 +246,18 @@ static void initializeAttributes(TargetService& i_targetService)
 
             // Check mbox scratch reg 3 for IPL boot options
             // Specifically istep mode (bit 0) and MPIPL (bit 2)
-            uint64_t l_data =
+            INITSERVICE::SPLESS::MboxScratch3_t l_scratch3;
+            l_scratch3.data32 =
               Util::readScratchReg(INITSERVICE::SPLESS::MBOX_SCRATCH_REG3);
 
             // Targeting data defaults to non istep, only turn "on" if bit
             // is set so we don't tromp default setting
-            if ((l_data & Util::ISTEP_CONFIG_BIT) == Util::ISTEP_CONFIG_BIT)
+            if (l_scratch3.istepMode)
             {
                 l_pTopLevel->setAttr<ATTR_ISTEP_MODE>(1);
             }
 
-            if ((l_data & Util::MPIPL_CONFIG_BIT) == Util::MPIPL_CONFIG_BIT)
+            if (l_scratch3.isMpipl)
             {
                 l_isMpipl = true;
             }
diff --git a/src/usr/util/utilmbox_scratch.C b/src/usr/util/utilmbox_scratch.C
index 9a38b8dff..814a9026a 100644
--- a/src/usr/util/utilmbox_scratch.C
+++ b/src/usr/util/utilmbox_scratch.C
@@ -54,14 +54,14 @@ namespace Util
     mutex_t g_mutex = MUTEX_INITIALIZER;
 
 
-    uint64_t readScratchReg(uint64_t i_addr)
+    uint32_t readScratchReg(uint64_t i_addr)
     {
         size_t l_size = sizeof(uint64_t);
-        uint64_t value = 0;
+        uint64_t l_value = 0;
 
         errlHndl_t l_errl =
           deviceRead(TARGETING::MASTER_PROCESSOR_CHIP_TARGET_SENTINEL,
-                     &value, l_size,
+                     &l_value, l_size,
                      DEVICE_SCOM_ADDRESS(i_addr));
 
         if (l_errl)
@@ -69,12 +69,14 @@ namespace Util
             errlCommit(l_errl, UTIL_COMP_ID);
         }
 
-        return value;
+        return static_cast<uint32_t>(l_value >> 32);
     }
 
-    void writeScratchReg(uint64_t i_addr, uint64_t i_data)
+    void writeScratchReg(uint64_t i_addr, uint32_t i_data)
     {
         size_t l_size = sizeof(uint64_t);
+        uint64_t l_value = static_cast<uint64_t>(i_data);
+        l_value <<= 32; //data is in top half of scom reg
 
         errlHndl_t l_errl =
           deviceWrite(TARGETING::MASTER_PROCESSOR_CHIP_TARGET_SENTINEL,
@@ -94,9 +96,6 @@ namespace Util
         uint64_t l_bufSize = (i_size & MSG_DATA_SIZE_MASK) |
                              (i_usage << MSG_USAGE_SHIFT);
 
-        l_bufAddr <<=32;
-        l_bufSize <<=32;
-
         //Lock to prevent concurrent access
         mutex_lock(&g_mutex);