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author | Zane Shelley <zshelle@us.ibm.com> | 2018-11-13 21:19:45 -0600 |
---|---|---|
committer | Zane C. Shelley <zshelle@us.ibm.com> | 2018-11-16 11:12:16 -0600 |
commit | e2e2e85b17eaf97fa47e5aee32cb3453a0243b85 (patch) | |
tree | 0896905cd2d0473e3f166e5407c61c39f231f54a | |
parent | cc7d24e732f827d8be70b6c6ea75fcd34c4a4a08 (diff) | |
download | talos-hostboot-e2e2e85b17eaf97fa47e5aee32cb3453a0243b85.tar.gz talos-hostboot-e2e2e85b17eaf97fa47e5aee32cb3453a0243b85.zip |
PRD: separated NPU registers and actions into separate rule files
Change-Id: I075a52d1255677835182f20a0137c6f2cf826299
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/68738
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Caleb N. Palmer <cnpalmer@us.ibm.com>
Reviewed-by: Brian J. Stegmiller <bjs@us.ibm.com>
Reviewed-by: Zane C. Shelley <zshelle@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/68823
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
7 files changed, 722 insertions, 663 deletions
diff --git a/src/usr/diag/prdf/common/plat/cumulus/cumulus_proc.rule b/src/usr/diag/prdf/common/plat/cumulus/cumulus_proc.rule index d2c29760b..187cd2a44 100644 --- a/src/usr/diag/prdf/common/plat/cumulus/cumulus_proc.rule +++ b/src/usr/diag/prdf/common/plat/cumulus/cumulus_proc.rule @@ -1521,6 +1521,7 @@ chip cumulus_proc # Include registers not defined by the xml .include "p9_common_proc_regs.rule"; +.include "p9_common_npu_regs.rule"; }; @@ -7979,4 +7980,5 @@ group gPCI2_CHIPLET_FIR .include "p9_common_actions.rule"; .include "p9_common_proc_actions.rule"; .include "cumulus_proc_actions.rule"; +.include "p9_common_npu_actions.rule"; diff --git a/src/usr/diag/prdf/common/plat/nimbus/nimbus_proc.rule b/src/usr/diag/prdf/common/plat/nimbus/nimbus_proc.rule index 6072d622d..6ac3bc5a1 100644 --- a/src/usr/diag/prdf/common/plat/nimbus/nimbus_proc.rule +++ b/src/usr/diag/prdf/common/plat/nimbus/nimbus_proc.rule @@ -1521,6 +1521,7 @@ chip nimbus_proc # Include registers not defined by the xml .include "p9_common_proc_regs.rule"; +.include "p9_common_npu_regs.rule"; }; @@ -7938,4 +7939,5 @@ group gPCI2_CHIPLET_FIR .include "p9_common_actions.rule"; .include "p9_common_proc_actions.rule"; .include "nimbus_proc_actions.rule"; +.include "p9_common_npu_actions.rule"; diff --git a/src/usr/diag/prdf/common/plat/p9/p9_common_eq_actions.rule b/src/usr/diag/prdf/common/plat/p9/p9_common_eq_actions.rule index 59e183933..49af68f85 100644 --- a/src/usr/diag/prdf/common/plat/p9/p9_common_eq_actions.rule +++ b/src/usr/diag/prdf/common/plat/p9/p9_common_eq_actions.rule @@ -23,15 +23,15 @@ # # IBM_PROLOG_END_TAG -############################################################################### +################################################################################ # Analyze groups -############################################################################### +################################################################################ actionclass analyzeEQ_LFIR { analyze(gEQ_LFIR); }; -############################################################################### +################################################################################ # Analyze connected -############################################################################### +################################################################################ actionclass analyzeConnectedEX0 { analyze(connected(TYPE_EX, 0)); }; actionclass analyzeConnectedEX1 { analyze(connected(TYPE_EX, 1)); }; diff --git a/src/usr/diag/prdf/common/plat/p9/p9_common_npu_actions.rule b/src/usr/diag/prdf/common/plat/p9/p9_common_npu_actions.rule new file mode 100644 index 000000000..49e7c34d7 --- /dev/null +++ b/src/usr/diag/prdf/common/plat/p9/p9_common_npu_actions.rule @@ -0,0 +1,47 @@ +# IBM_PROLOG_BEGIN_TAG +# This is an automatically generated prolog. +# +# $Source: src/usr/diag/prdf/common/plat/p9/p9_common_npu_actions.rule $ +# +# OpenPOWER HostBoot Project +# +# Contributors Listed Below - COPYRIGHT 2018 +# [+] International Business Machines Corp. +# +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or +# implied. See the License for the specific language governing +# permissions and limitations under the License. +# +# IBM_PROLOG_END_TAG + +############################################################################### +# Analyze groups +############################################################################### + +actionclass analyzeNPU0FIR +{ + capture(npu0fir_ffdc); + analyze(gNPU0FIR); +}; + +actionclass analyzeNPU1FIR +{ + capture(npu1fir_ffdc); + analyze(gNPU1FIR); +}; + +actionclass analyzeNPU2FIR +{ + capture(npu2fir_ffdc); + analyze(gNPU2FIR); +}; + diff --git a/src/usr/diag/prdf/common/plat/p9/p9_common_npu_regs.rule b/src/usr/diag/prdf/common/plat/p9/p9_common_npu_regs.rule new file mode 100644 index 000000000..f3f4499dd --- /dev/null +++ b/src/usr/diag/prdf/common/plat/p9/p9_common_npu_regs.rule @@ -0,0 +1,667 @@ +# IBM_PROLOG_BEGIN_TAG +# This is an automatically generated prolog. +# +# $Source: src/usr/diag/prdf/common/plat/p9/p9_common_npu_regs.rule $ +# +# OpenPOWER HostBoot Project +# +# Contributors Listed Below - COPYRIGHT 2018 +# [+] International Business Machines Corp. +# +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or +# implied. See the License for the specific language governing +# permissions and limitations under the License. +# +# IBM_PROLOG_END_TAG + + ############################################################################ + # NPU CERR and debug registers for NVLINK and openCAPI + ############################################################################ + + register NPU_S0_CS_SM0_CERR_MSG0 + { + name "NPU.STCK0.CS.SM0.MISC.CERR_MESSAGE0"; + scomaddr 0x05011011; + capture group npu0fir_ffdc; + }; + + register NPU_S0_CS_SM0_CERR_0 + { + name "NPU.STCK0.CS.SM0.MISC.CERR_FIRST0"; + scomaddr 0x05011017; + capture group npu0fir_ffdc; + }; + + register NPU_S0_CS_SM0_CERR_1 + { + name "NPU.STCK0.CS.SM0.MISC.CERR_FIRST1"; + scomaddr 0x05011018; + capture group npu0fir_ffdc; + }; + + register NPU_S0_CS_SM0_CERR_2 + { + name "NPU.STCK0.CS.SM0.MISC.CERR_FIRST2"; + scomaddr 0x05011019; + capture group npu0fir_ffdc; + }; + + register NPU_S0_CS_SM1_CERR_MSG0 + { + name "NPU.STCK0.CS.SM1.MISC.CERR_MESSAGE0"; + scomaddr 0x05011041; + capture group npu0fir_ffdc; + }; + + register NPU_S0_CS_SM1_CERR_0 + { + name "NPU.STCK0.CS.SM1.MISC.CERR_FIRST0"; + scomaddr 0x05011047; + capture group npu0fir_ffdc; + }; + + register NPU_S0_CS_SM1_CERR_1 + { + name "NPU.STCK0.CS.SM1.MISC.CERR_FIRST1"; + scomaddr 0x05011048; + capture group npu0fir_ffdc; + }; + + register NPU_S0_CS_SM1_CERR_2 + { + name "NPU.STCK0.CS.SM1.MISC.CERR_FIRST2"; + scomaddr 0x05011049; + capture group npu0fir_ffdc; + }; + + register NPU_S0_CS_SM2_CERR_MSG0 + { + name "NPU.STCK0.CS.SM2.MISC.CERR_MESSAGE0"; + scomaddr 0x05011071; + capture group npu0fir_ffdc; + }; + + register NPU_S0_CS_SM2_CERR_0 + { + name "NPU.STCK0.CS.SM2.MISC.CERR_FIRST0"; + scomaddr 0x05011077; + capture group npu0fir_ffdc; + }; + + register NPU_S0_CS_SM2_CERR_1 + { + name "NPU.STCK0.CS.SM2.MISC.CERR_FIRST1"; + scomaddr 0x05011078; + capture group npu0fir_ffdc; + }; + + register NPU_S0_CS_SM2_CERR_2 + { + name "NPU.STCK0.CS.SM2.MISC.CERR_FIRST2"; + scomaddr 0x05011079; + capture group npu0fir_ffdc; + }; + + register NPU_S0_CS_SM3_CERR_MSG0 + { + name "NPU.STCK0.CS.SM3.MISC.CERR_MESSAGE0"; + scomaddr 0x050110A1; + capture group npu0fir_ffdc; + }; + + register NPU_S0_CS_SM3_CERR_0 + { + name "NPU.STCK0.CS.SM3.MISC.CERR_FIRST0"; + scomaddr 0x050110A7; + capture group npu0fir_ffdc; + }; + + register NPU_S0_CS_SM3_CERR_1 + { + name "NPU.STCK0.CS.SM3.MISC.CERR_FIRST1"; + scomaddr 0x050110A8; + capture group npu0fir_ffdc; + }; + + register NPU_S0_CS_SM3_CERR_2 + { + name "NPU.STCK0.CS.SM3.MISC.CERR_FIRST2"; + scomaddr 0x050110A9; + capture group npu0fir_ffdc; + }; + + register NPU_S0_CS_CTL_CERR_MSG0 + { + name "NPU.STCK0.CS.CTL.MISC.CERR_MESSAGE0"; + scomaddr 0x050110D8; + capture group npu0fir_ffdc; + }; + + register NPU_S0_CS_CTL_CERR_MSG1 + { + name "NPU.STCK0.CS.CTL.MISC.CERR_MESSAGE1"; + scomaddr 0x050110D9; + capture group npu0fir_ffdc; + }; + + register NPU_S0_CS_CTL_CERR_0 + { + name "NPU.STCK0.CS.CTL.MISC.CERR_FIRST0"; + scomaddr 0x050110DA; + capture group npu0fir_ffdc; + }; + + register NPU_S0_CS_CTL_CERR_1 + { + name "NPU.STCK0.CS.CTL.MISC.CERR_FIRST1"; + scomaddr 0x050110DB; + capture group npu0fir_ffdc; + }; + + register NPU_S0_DAT_CERR_ECC_HOLD + { + name "NPU.STCK0.DAT.MISC.CERR_ECC_HOLD"; + scomaddr 0x050110F4; + capture group npu0fir_ffdc; + }; + + register NPU_S0_DAT_CERR_ECC_MASK + { + name "NPU.STCK0.DAT.MISC.CERR_ECC_MASK"; + scomaddr 0x050110F5; + capture group npu0fir_ffdc; + }; + + register NPU_S0_DAT_CERR_ECC_ + { + name "NPU.STCK0.DAT.MISC.CERR_ECC_FIRST"; + scomaddr 0x050110F6; + capture group npu0fir_ffdc; + }; + + register NPU_S0_DAT_CERR_LOG_HOLD + { + name "NPU.STCK0.DAT.MISC.CERR_LOG_HOLD"; + scomaddr 0x050110FA; + capture group npu0fir_ffdc; + }; + + register NPU_S0_DAT_REM0 + { + name "NPU.STCK0.DAT.MISC.REM0"; + scomaddr 0x050110FD; + capture group npu0fir_ffdc; + }; + + register NPU_S0_DAT_REM1 + { + name "NPU.STCK0.DAT.MISC.REM1"; + scomaddr 0x050110FE; + capture group npu0fir_ffdc; + }; + + register NPU_S0_NTL0_CERR_1 + { + name "NPU.STCK0.NTL0.REGS.CERR_FIRST1"; + scomaddr 0x05011114; + capture group npu0fir_ffdc; + }; + + register NPU_S0_NTL0_CERR_2 + { + name "NPU.STCK0.NTL0.REGS.CERR_FIRST2"; + scomaddr 0x05011118; + capture group npu0fir_ffdc; + }; + + register NPU_S0_NTL1_CERR_1 + { + name "NPU.STCK0.NTL1.REGS.CERR_FIRST1"; + scomaddr 0x05011134; + capture group npu0fir_ffdc; + }; + + register NPU_S0_NTL1_CERR_2 + { + name "NPU.STCK0.NTL1.REGS.CERR_FIRST2"; + scomaddr 0x05011138; + capture group npu0fir_ffdc; + }; + + register NPU_S1_CS_SM0_CERR_MSG0 + { + name "NPU.STCK1.CS.SM0.MISC.CERR_MESSAGE0"; + scomaddr 0x05011211; + capture group npu0fir_ffdc; + }; + + register NPU_S1_CS_SM0_CERR_0 + { + name "NPU.STCK1.CS.SM0.MISC.CERR_FIRST0"; + scomaddr 0x05011217; + capture group npu0fir_ffdc; + }; + + register NPU_S1_CS_SM0_CERR_1 + { + name "NPU.STCK1.CS.SM0.MISC.CERR_FIRST1"; + scomaddr 0x05011218; + capture group npu0fir_ffdc; + }; + + register NPU_S1_CS_SM0_CERR_2 + { + name "NPU.STCK1.CS.SM0.MISC.CERR_FIRST2"; + scomaddr 0x05011219; + capture group npu0fir_ffdc; + }; + + register NPU_S1_CS_SM1_CERR_MSG0 + { + name "NPU.STCK1.CS.SM1.MISC.CERR_MESSAGE0"; + scomaddr 0x05011241; + capture group npu0fir_ffdc; + }; + + register NPU_S1_CS_SM1_CERR_0 + { + name "NPU.STCK1.CS.SM1.MISC.CERR_FIRST0"; + scomaddr 0x05011247; + capture group npu0fir_ffdc; + }; + + register NPU_S1_CS_SM1_CERR_1 + { + name "NPU.STCK1.CS.SM1.MISC.CERR_FIRST1"; + scomaddr 0x05011248; + capture group npu0fir_ffdc; + }; + + register NPU_S1_CS_SM1_CERR_2 + { + name "NPU.STCK1.CS.SM1.MISC.CERR_FIRST2"; + scomaddr 0x05011249; + capture group npu0fir_ffdc; + }; + + register NPU_S1_CS_SM2_CERR_MSG0 + { + name "NPU.STCK1.CS.SM2.MISC.CERR_MESSAGE0"; + scomaddr 0x05011271; + capture group npu0fir_ffdc; + }; + + register NPU_S1_CS_SM2_CERR_0 + { + name "NPU.STCK1.CS.SM2.MISC.CERR_FIRST0"; + scomaddr 0x05011277; + capture group npu0fir_ffdc; + }; + + register NPU_S1_CS_SM2_CERR_1 + { + name "NPU.STCK1.CS.SM2.MISC.CERR_FIRST1"; + scomaddr 0x05011278; + capture group npu0fir_ffdc; + }; + + register NPU_S1_CS_SM2_CERR_2 + { + name "NPU.STCK1.CS.SM2.MISC.CERR_FIRST2"; + scomaddr 0x05011279; + capture group npu0fir_ffdc; + }; + + register NPU_S1_CS_SM3_CERR_MSG0 + { + name "NPU.STCK1.CS.SM3.MISC.CERR_MESSAGE0"; + scomaddr 0x050112A1; + capture group npu0fir_ffdc; + }; + + register NPU_S1_CS_SM3_CERR_0 + { + name "NPU.STCK1.CS.SM3.MISC.CERR_FIRST0"; + scomaddr 0x050112A7; + capture group npu0fir_ffdc; + }; + + register NPU_S1_CS_SM3_CERR_1 + { + name "NPU.STCK1.CS.SM3.MISC.CERR_FIRST1"; + scomaddr 0x050112A8; + capture group npu0fir_ffdc; + }; + + register NPU_S1_CS_SM3_CERR_2 + { + name "NPU.STCK1.CS.SM3.MISC.CERR_FIRST2"; + scomaddr 0x050112A9; + capture group npu0fir_ffdc; + }; + + register NPU_S1_CS_CTL_CERR_MSG0 + { + name "NPU.STCK1.CS.CTL.MISC.CERR_MESSAGE0"; + scomaddr 0x050112D8; + capture group npu0fir_ffdc; + }; + + register NPU_S1_CS_CTL_CERR_MSG1 + { + name "NPU.STCK1.CS.CTL.MISC.CERR_MESSAGE1"; + scomaddr 0x050112D9; + capture group npu0fir_ffdc; + }; + + register NPU_S1_CS_CTL_CERR_0 + { + name "NPU.STCK1.CS.CTL.MISC.CERR_FIRST0"; + scomaddr 0x050112DA; + capture group npu0fir_ffdc; + }; + + register NPU_S1_CS_CTL_CERR_1 + { + name "NPU.STCK1.CS.CTL.MISC.CERR_FIRST1"; + scomaddr 0x050112DB; + capture group npu0fir_ffdc; + }; + + register NPU_S1_DAT_CERR_ECC_HOLD + { + name "NPU.STCK1.DAT.MISC.CERR_ECC_HOLD"; + scomaddr 0x050112F4; + capture group npu0fir_ffdc; + }; + + register NPU_S1_DAT_CERR_ECC_MASK + { + name "NPU.STCK1.DAT.MISC.CERR_ECC_MASK"; + scomaddr 0x050112F5; + capture group npu0fir_ffdc; + }; + + register NPU_S1_DAT_CERR_ECC_ + { + name "NPU.STCK1.DAT.MISC.CERR_ECC_FIRST"; + scomaddr 0x050112F6; + capture group npu0fir_ffdc; + }; + + register NPU_S1_DAT_CERR_LOG_HOLD + { + name "NPU.STCK1.DAT.MISC.CERR_LOG_HOLD"; + scomaddr 0x050112FA; + capture group npu0fir_ffdc; + }; + + register NPU_S1_DAT_REM0 + { + name "NPU.STCK1.DAT.MISC.REM0"; + scomaddr 0x050112FD; + capture group npu0fir_ffdc; + }; + + register NPU_S1_DAT_REM1 + { + name "NPU.STCK1.DAT.MISC.REM1"; + scomaddr 0x050112FE; + capture group npu0fir_ffdc; + }; + + register NPU_S1_NTL0_CERR_1 + { + name "NPU.STCK1.NTL0.REGS.CERR_FIRST1"; + scomaddr 0x05011314; + capture group npu0fir_ffdc; + }; + + register NPU_S1_NTL0_CERR_2 + { + name "NPU.STCK1.NTL0.REGS.CERR_FIRST2"; + scomaddr 0x05011318; + capture group npu0fir_ffdc; + }; + + register NPU_S1_NTL1_CERR_1 + { + name "NPU.STCK1.NTL1.REGS.CERR_FIRST1"; + scomaddr 0x05011334; + capture group npu0fir_ffdc; + }; + + register NPU_S1_NTL1_CERR_2 + { + name "NPU.STCK1.NTL1.REGS.CERR_FIRST2"; + scomaddr 0x05011338; + capture group npu0fir_ffdc; + }; + + register NPU_S2_CS_SM0_CERR_MSG0 + { + name "NPU.STCK2.CS.SM0.MISC.CERR_MESSAGE0"; + scomaddr 0x05011411; + capture group npu0fir_ffdc; + }; + + register NPU_S2_CS_SM0_CERR_0 + { + name "NPU.STCK2.CS.SM0.MISC.CERR_FIRST0"; + scomaddr 0x05011417; + capture group npu0fir_ffdc; + }; + + register NPU_S2_CS_SM0_CERR_1 + { + name "NPU.STCK2.CS.SM0.MISC.CERR_FIRST1"; + scomaddr 0x05011418; + capture group npu0fir_ffdc; + }; + + register NPU_S2_CS_SM0_CERR_2 + { + name "NPU.STCK2.CS.SM0.MISC.CERR_FIRST2"; + scomaddr 0x05011419; + capture group npu0fir_ffdc; + }; + + register NPU_S2_CS_SM1_CERR_MSG0 + { + name "NPU.STCK2.CS.SM1.MISC.CERR_MESSAGE0"; + scomaddr 0x05011441; + capture group npu0fir_ffdc; + }; + + register NPU_S2_CS_SM1_CERR_0 + { + name "NPU.STCK2.CS.SM1.MISC.CERR_FIRST0"; + scomaddr 0x05011447; + capture group npu0fir_ffdc; + }; + + register NPU_S2_CS_SM1_CERR_1 + { + name "NPU.STCK2.CS.SM1.MISC.CERR_FIRST1"; + scomaddr 0x05011448; + capture group npu0fir_ffdc; + }; + + register NPU_S2_CS_SM1_CERR_2 + { + name "NPU.STCK2.CS.SM1.MISC.CERR_FIRST2"; + scomaddr 0x05011449; + capture group npu0fir_ffdc; + }; + + register NPU_S2_CS_SM2_CERR_MSG0 + { + name "NPU.STCK2.CS.SM2.MISC.CERR_MESSAGE0"; + scomaddr 0x05011471; + capture group npu0fir_ffdc; + }; + + register NPU_S2_CS_SM2_CERR_0 + { + name "NPU.STCK2.CS.SM2.MISC.CERR_FIRST0"; + scomaddr 0x05011477; + capture group npu0fir_ffdc; + }; + + register NPU_S2_CS_SM2_CERR_1 + { + name "NPU.STCK2.CS.SM2.MISC.CERR_FIRST1"; + scomaddr 0x05011478; + capture group npu0fir_ffdc; + }; + + register NPU_S2_CS_SM2_CERR_2 + { + name "NPU.STCK2.CS.SM2.MISC.CERR_FIRST2"; + scomaddr 0x05011479; + capture group npu0fir_ffdc; + }; + + register NPU_S2_CS_SM3_CERR_MSG0 + { + name "NPU.STCK2.CS.SM3.MISC.CERR_MESSAGE0"; + scomaddr 0x050114A1; + capture group npu0fir_ffdc; + }; + + register NPU_S2_CS_SM3_CERR_0 + { + name "NPU.STCK2.CS.SM3.MISC.CERR_FIRST0"; + scomaddr 0x050114A7; + capture group npu0fir_ffdc; + }; + + register NPU_S2_CS_SM3_CERR_1 + { + name "NPU.STCK2.CS.SM3.MISC.CERR_FIRST1"; + scomaddr 0x050114A8; + capture group npu0fir_ffdc; + }; + + register NPU_S2_CS_SM3_CERR_2 + { + name "NPU.STCK2.CS.SM3.MISC.CERR_FIRST2"; + scomaddr 0x050114A9; + capture group npu0fir_ffdc; + }; + + register NPU_S2_CS_CTL_CERR_MSG0 + { + name "NPU.STCK2.CS.CTL.MISC.CERR_MESSAGE0"; + scomaddr 0x050114D8; + capture group npu0fir_ffdc; + }; + + register NPU_S2_CS_CTL_CERR_MSG1 + { + name "NPU.STCK2.CS.CTL.MISC.CERR_MESSAGE1"; + scomaddr 0x050114D9; + capture group npu0fir_ffdc; + }; + + register NPU_S2_CS_CTL_CERR_0 + { + name "NPU.STCK2.CS.CTL.MISC.CERR_FIRST0"; + scomaddr 0x050114DA; + capture group npu0fir_ffdc; + }; + + register NPU_S2_CS_CTL_CERR_1 + { + name "NPU.STCK2.CS.CTL.MISC.CERR_FIRST1"; + scomaddr 0x050114DB; + capture group npu0fir_ffdc; + }; + + register NPU_S2_DAT_CERR_ECC_HOLD + { + name "NPU.STCK2.DAT.MISC.CERR_ECC_HOLD"; + scomaddr 0x050114F4; + capture group npu0fir_ffdc; + }; + + register NPU_S2_DAT_CERR_ECC_MASK + { + name "NPU.STCK2.DAT.MISC.CERR_ECC_MASK"; + scomaddr 0x050114F5; + capture group npu0fir_ffdc; + }; + + register NPU_S2_DAT_CERR_ECC_ + { + name "NPU.STCK2.DAT.MISC.CERR_ECC_FIRST"; + scomaddr 0x050114F6; + capture group npu0fir_ffdc; + }; + + register NPU_S2_DAT_CERR_LOG_HOLD + { + name "NPU.STCK2.DAT.MISC.CERR_LOG_HOLD"; + scomaddr 0x050114FA; + capture group npu0fir_ffdc; + }; + + register NPU_S2_DAT_REM0 + { + name "NPU.STCK2.DAT.MISC.REM0"; + scomaddr 0x050114FD; + capture group npu0fir_ffdc; + }; + + register NPU_S2_DAT_REM1 + { + name "NPU.STCK2.DAT.MISC.REM1"; + scomaddr 0x050114FE; + capture group npu0fir_ffdc; + }; + + register NPU_S2_NTL0_CERR_1 + { + name "NPU.STCK2.NTL0.REGS.CERR_FIRST1"; + scomaddr 0x05011514; + capture group npu0fir_ffdc; + }; + + register NPU_S2_NTL0_CERR_2 + { + name "NPU.STCK2.NTL0.REGS.CERR_FIRST2"; + scomaddr 0x05011518; + capture group npu0fir_ffdc; + }; + + register NPU_S2_NTL1_CERR_1 + { + name "NPU.STCK2.NTL1.REGS.CERR_FIRST1"; + scomaddr 0x05011534; + capture group npu0fir_ffdc; + }; + + register NPU_S2_NTL1_CERR_2 + { + name "NPU.STCK2.NTL1.REGS.CERR_FIRST2"; + scomaddr 0x05011538; + capture group npu0fir_ffdc; + }; + + register NPU_XTS_REG_ERR_HOLD + { + name "NPU.XTS.REG.ERR_HOLD"; + scomaddr 0x05011640; + capture group npu0fir_ffdc; + }; + + diff --git a/src/usr/diag/prdf/common/plat/p9/p9_common_proc_actions.rule b/src/usr/diag/prdf/common/plat/p9/p9_common_proc_actions.rule index 3aea1d282..aacf978bd 100644 --- a/src/usr/diag/prdf/common/plat/p9/p9_common_proc_actions.rule +++ b/src/usr/diag/prdf/common/plat/p9/p9_common_proc_actions.rule @@ -680,24 +680,6 @@ actionclass analyzeINTCQFIR analyze(gINTCQFIR); }; -actionclass analyzeNPU0FIR -{ - capture(npu0fir_ffdc); - analyze(gNPU0FIR); -}; - -actionclass analyzeNPU1FIR -{ - capture(npu1fir_ffdc); - analyze(gNPU1FIR); -}; - -actionclass analyzeNPU2FIR -{ - capture(npu2fir_ffdc); - analyze(gNPU2FIR); -}; - ############################################################################### # Analyze connected ############################################################################### diff --git a/src/usr/diag/prdf/common/plat/p9/p9_common_proc_regs.rule b/src/usr/diag/prdf/common/plat/p9/p9_common_proc_regs.rule index c58f30615..a4a9b7ab9 100644 --- a/src/usr/diag/prdf/common/plat/p9/p9_common_proc_regs.rule +++ b/src/usr/diag/prdf/common/plat/p9/p9_common_proc_regs.rule @@ -407,647 +407,6 @@ }; ############################################################################ - # NPU CERR and debug registers for NVLINK and openCAPI - ############################################################################ - - register NPU_S0_CS_SM0_CERR_MSG0 - { - name "NPU.STCK0.CS.SM0.MISC.CERR_MESSAGE0"; - scomaddr 0x05011011; - capture group npu0fir_ffdc; - }; - - register NPU_S0_CS_SM0_CERR_0 - { - name "NPU.STCK0.CS.SM0.MISC.CERR_FIRST0"; - scomaddr 0x05011017; - capture group npu0fir_ffdc; - }; - - register NPU_S0_CS_SM0_CERR_1 - { - name "NPU.STCK0.CS.SM0.MISC.CERR_FIRST1"; - scomaddr 0x05011018; - capture group npu0fir_ffdc; - }; - - register NPU_S0_CS_SM0_CERR_2 - { - name "NPU.STCK0.CS.SM0.MISC.CERR_FIRST2"; - scomaddr 0x05011019; - capture group npu0fir_ffdc; - }; - - register NPU_S0_CS_SM1_CERR_MSG0 - { - name "NPU.STCK0.CS.SM1.MISC.CERR_MESSAGE0"; - scomaddr 0x05011041; - capture group npu0fir_ffdc; - }; - - register NPU_S0_CS_SM1_CERR_0 - { - name "NPU.STCK0.CS.SM1.MISC.CERR_FIRST0"; - scomaddr 0x05011047; - capture group npu0fir_ffdc; - }; - - register NPU_S0_CS_SM1_CERR_1 - { - name "NPU.STCK0.CS.SM1.MISC.CERR_FIRST1"; - scomaddr 0x05011048; - capture group npu0fir_ffdc; - }; - - register NPU_S0_CS_SM1_CERR_2 - { - name "NPU.STCK0.CS.SM1.MISC.CERR_FIRST2"; - scomaddr 0x05011049; - capture group npu0fir_ffdc; - }; - - register NPU_S0_CS_SM2_CERR_MSG0 - { - name "NPU.STCK0.CS.SM2.MISC.CERR_MESSAGE0"; - scomaddr 0x05011071; - capture group npu0fir_ffdc; - }; - - register NPU_S0_CS_SM2_CERR_0 - { - name "NPU.STCK0.CS.SM2.MISC.CERR_FIRST0"; - scomaddr 0x05011077; - capture group npu0fir_ffdc; - }; - - register NPU_S0_CS_SM2_CERR_1 - { - name "NPU.STCK0.CS.SM2.MISC.CERR_FIRST1"; - scomaddr 0x05011078; - capture group npu0fir_ffdc; - }; - - register NPU_S0_CS_SM2_CERR_2 - { - name "NPU.STCK0.CS.SM2.MISC.CERR_FIRST2"; - scomaddr 0x05011079; - capture group npu0fir_ffdc; - }; - - register NPU_S0_CS_SM3_CERR_MSG0 - { - name "NPU.STCK0.CS.SM3.MISC.CERR_MESSAGE0"; - scomaddr 0x050110A1; - capture group npu0fir_ffdc; - }; - - register NPU_S0_CS_SM3_CERR_0 - { - name "NPU.STCK0.CS.SM3.MISC.CERR_FIRST0"; - scomaddr 0x050110A7; - capture group npu0fir_ffdc; - }; - - register NPU_S0_CS_SM3_CERR_1 - { - name "NPU.STCK0.CS.SM3.MISC.CERR_FIRST1"; - scomaddr 0x050110A8; - capture group npu0fir_ffdc; - }; - - register NPU_S0_CS_SM3_CERR_2 - { - name "NPU.STCK0.CS.SM3.MISC.CERR_FIRST2"; - scomaddr 0x050110A9; - capture group npu0fir_ffdc; - }; - - register NPU_S0_CS_CTL_CERR_MSG0 - { - name "NPU.STCK0.CS.CTL.MISC.CERR_MESSAGE0"; - scomaddr 0x050110D8; - capture group npu0fir_ffdc; - }; - - register NPU_S0_CS_CTL_CERR_MSG1 - { - name "NPU.STCK0.CS.CTL.MISC.CERR_MESSAGE1"; - scomaddr 0x050110D9; - capture group npu0fir_ffdc; - }; - - register NPU_S0_CS_CTL_CERR_0 - { - name "NPU.STCK0.CS.CTL.MISC.CERR_FIRST0"; - scomaddr 0x050110DA; - capture group npu0fir_ffdc; - }; - - register NPU_S0_CS_CTL_CERR_1 - { - name "NPU.STCK0.CS.CTL.MISC.CERR_FIRST1"; - scomaddr 0x050110DB; - capture group npu0fir_ffdc; - }; - - register NPU_S0_DAT_CERR_ECC_HOLD - { - name "NPU.STCK0.DAT.MISC.CERR_ECC_HOLD"; - scomaddr 0x050110F4; - capture group npu0fir_ffdc; - }; - - register NPU_S0_DAT_CERR_ECC_MASK - { - name "NPU.STCK0.DAT.MISC.CERR_ECC_MASK"; - scomaddr 0x050110F5; - capture group npu0fir_ffdc; - }; - - register NPU_S0_DAT_CERR_ECC_ - { - name "NPU.STCK0.DAT.MISC.CERR_ECC_FIRST"; - scomaddr 0x050110F6; - capture group npu0fir_ffdc; - }; - - register NPU_S0_DAT_CERR_LOG_HOLD - { - name "NPU.STCK0.DAT.MISC.CERR_LOG_HOLD"; - scomaddr 0x050110FA; - capture group npu0fir_ffdc; - }; - - register NPU_S0_DAT_REM0 - { - name "NPU.STCK0.DAT.MISC.REM0"; - scomaddr 0x050110FD; - capture group npu0fir_ffdc; - }; - - register NPU_S0_DAT_REM1 - { - name "NPU.STCK0.DAT.MISC.REM1"; - scomaddr 0x050110FE; - capture group npu0fir_ffdc; - }; - - register NPU_S0_NTL0_CERR_1 - { - name "NPU.STCK0.NTL0.REGS.CERR_FIRST1"; - scomaddr 0x05011114; - capture group npu0fir_ffdc; - }; - - register NPU_S0_NTL0_CERR_2 - { - name "NPU.STCK0.NTL0.REGS.CERR_FIRST2"; - scomaddr 0x05011118; - capture group npu0fir_ffdc; - }; - - register NPU_S0_NTL1_CERR_1 - { - name "NPU.STCK0.NTL1.REGS.CERR_FIRST1"; - scomaddr 0x05011134; - capture group npu0fir_ffdc; - }; - - register NPU_S0_NTL1_CERR_2 - { - name "NPU.STCK0.NTL1.REGS.CERR_FIRST2"; - scomaddr 0x05011138; - capture group npu0fir_ffdc; - }; - - register NPU_S1_CS_SM0_CERR_MSG0 - { - name "NPU.STCK1.CS.SM0.MISC.CERR_MESSAGE0"; - scomaddr 0x05011211; - capture group npu0fir_ffdc; - }; - - register NPU_S1_CS_SM0_CERR_0 - { - name "NPU.STCK1.CS.SM0.MISC.CERR_FIRST0"; - scomaddr 0x05011217; - capture group npu0fir_ffdc; - }; - - register NPU_S1_CS_SM0_CERR_1 - { - name "NPU.STCK1.CS.SM0.MISC.CERR_FIRST1"; - scomaddr 0x05011218; - capture group npu0fir_ffdc; - }; - - register NPU_S1_CS_SM0_CERR_2 - { - name "NPU.STCK1.CS.SM0.MISC.CERR_FIRST2"; - scomaddr 0x05011219; - capture group npu0fir_ffdc; - }; - - register NPU_S1_CS_SM1_CERR_MSG0 - { - name "NPU.STCK1.CS.SM1.MISC.CERR_MESSAGE0"; - scomaddr 0x05011241; - capture group npu0fir_ffdc; - }; - - register NPU_S1_CS_SM1_CERR_0 - { - name "NPU.STCK1.CS.SM1.MISC.CERR_FIRST0"; - scomaddr 0x05011247; - capture group npu0fir_ffdc; - }; - - register NPU_S1_CS_SM1_CERR_1 - { - name "NPU.STCK1.CS.SM1.MISC.CERR_FIRST1"; - scomaddr 0x05011248; - capture group npu0fir_ffdc; - }; - - register NPU_S1_CS_SM1_CERR_2 - { - name "NPU.STCK1.CS.SM1.MISC.CERR_FIRST2"; - scomaddr 0x05011249; - capture group npu0fir_ffdc; - }; - - register NPU_S1_CS_SM2_CERR_MSG0 - { - name "NPU.STCK1.CS.SM2.MISC.CERR_MESSAGE0"; - scomaddr 0x05011271; - capture group npu0fir_ffdc; - }; - - register NPU_S1_CS_SM2_CERR_0 - { - name "NPU.STCK1.CS.SM2.MISC.CERR_FIRST0"; - scomaddr 0x05011277; - capture group npu0fir_ffdc; - }; - - register NPU_S1_CS_SM2_CERR_1 - { - name "NPU.STCK1.CS.SM2.MISC.CERR_FIRST1"; - scomaddr 0x05011278; - capture group npu0fir_ffdc; - }; - - register NPU_S1_CS_SM2_CERR_2 - { - name "NPU.STCK1.CS.SM2.MISC.CERR_FIRST2"; - scomaddr 0x05011279; - capture group npu0fir_ffdc; - }; - - register NPU_S1_CS_SM3_CERR_MSG0 - { - name "NPU.STCK1.CS.SM3.MISC.CERR_MESSAGE0"; - scomaddr 0x050112A1; - capture group npu0fir_ffdc; - }; - - register NPU_S1_CS_SM3_CERR_0 - { - name "NPU.STCK1.CS.SM3.MISC.CERR_FIRST0"; - scomaddr 0x050112A7; - capture group npu0fir_ffdc; - }; - - register NPU_S1_CS_SM3_CERR_1 - { - name "NPU.STCK1.CS.SM3.MISC.CERR_FIRST1"; - scomaddr 0x050112A8; - capture group npu0fir_ffdc; - }; - - register NPU_S1_CS_SM3_CERR_2 - { - name "NPU.STCK1.CS.SM3.MISC.CERR_FIRST2"; - scomaddr 0x050112A9; - capture group npu0fir_ffdc; - }; - - register NPU_S1_CS_CTL_CERR_MSG0 - { - name "NPU.STCK1.CS.CTL.MISC.CERR_MESSAGE0"; - scomaddr 0x050112D8; - capture group npu0fir_ffdc; - }; - - register NPU_S1_CS_CTL_CERR_MSG1 - { - name "NPU.STCK1.CS.CTL.MISC.CERR_MESSAGE1"; - scomaddr 0x050112D9; - capture group npu0fir_ffdc; - }; - - register NPU_S1_CS_CTL_CERR_0 - { - name "NPU.STCK1.CS.CTL.MISC.CERR_FIRST0"; - scomaddr 0x050112DA; - capture group npu0fir_ffdc; - }; - - register NPU_S1_CS_CTL_CERR_1 - { - name "NPU.STCK1.CS.CTL.MISC.CERR_FIRST1"; - scomaddr 0x050112DB; - capture group npu0fir_ffdc; - }; - - register NPU_S1_DAT_CERR_ECC_HOLD - { - name "NPU.STCK1.DAT.MISC.CERR_ECC_HOLD"; - scomaddr 0x050112F4; - capture group npu0fir_ffdc; - }; - - register NPU_S1_DAT_CERR_ECC_MASK - { - name "NPU.STCK1.DAT.MISC.CERR_ECC_MASK"; - scomaddr 0x050112F5; - capture group npu0fir_ffdc; - }; - - register NPU_S1_DAT_CERR_ECC_ - { - name "NPU.STCK1.DAT.MISC.CERR_ECC_FIRST"; - scomaddr 0x050112F6; - capture group npu0fir_ffdc; - }; - - register NPU_S1_DAT_CERR_LOG_HOLD - { - name "NPU.STCK1.DAT.MISC.CERR_LOG_HOLD"; - scomaddr 0x050112FA; - capture group npu0fir_ffdc; - }; - - register NPU_S1_DAT_REM0 - { - name "NPU.STCK1.DAT.MISC.REM0"; - scomaddr 0x050112FD; - capture group npu0fir_ffdc; - }; - - register NPU_S1_DAT_REM1 - { - name "NPU.STCK1.DAT.MISC.REM1"; - scomaddr 0x050112FE; - capture group npu0fir_ffdc; - }; - - register NPU_S1_NTL0_CERR_1 - { - name "NPU.STCK1.NTL0.REGS.CERR_FIRST1"; - scomaddr 0x05011314; - capture group npu0fir_ffdc; - }; - - register NPU_S1_NTL0_CERR_2 - { - name "NPU.STCK1.NTL0.REGS.CERR_FIRST2"; - scomaddr 0x05011318; - capture group npu0fir_ffdc; - }; - - register NPU_S1_NTL1_CERR_1 - { - name "NPU.STCK1.NTL1.REGS.CERR_FIRST1"; - scomaddr 0x05011334; - capture group npu0fir_ffdc; - }; - - register NPU_S1_NTL1_CERR_2 - { - name "NPU.STCK1.NTL1.REGS.CERR_FIRST2"; - scomaddr 0x05011338; - capture group npu0fir_ffdc; - }; - - register NPU_S2_CS_SM0_CERR_MSG0 - { - name "NPU.STCK2.CS.SM0.MISC.CERR_MESSAGE0"; - scomaddr 0x05011411; - capture group npu0fir_ffdc; - }; - - register NPU_S2_CS_SM0_CERR_0 - { - name "NPU.STCK2.CS.SM0.MISC.CERR_FIRST0"; - scomaddr 0x05011417; - capture group npu0fir_ffdc; - }; - - register NPU_S2_CS_SM0_CERR_1 - { - name "NPU.STCK2.CS.SM0.MISC.CERR_FIRST1"; - scomaddr 0x05011418; - capture group npu0fir_ffdc; - }; - - register NPU_S2_CS_SM0_CERR_2 - { - name "NPU.STCK2.CS.SM0.MISC.CERR_FIRST2"; - scomaddr 0x05011419; - capture group npu0fir_ffdc; - }; - - register NPU_S2_CS_SM1_CERR_MSG0 - { - name "NPU.STCK2.CS.SM1.MISC.CERR_MESSAGE0"; - scomaddr 0x05011441; - capture group npu0fir_ffdc; - }; - - register NPU_S2_CS_SM1_CERR_0 - { - name "NPU.STCK2.CS.SM1.MISC.CERR_FIRST0"; - scomaddr 0x05011447; - capture group npu0fir_ffdc; - }; - - register NPU_S2_CS_SM1_CERR_1 - { - name "NPU.STCK2.CS.SM1.MISC.CERR_FIRST1"; - scomaddr 0x05011448; - capture group npu0fir_ffdc; - }; - - register NPU_S2_CS_SM1_CERR_2 - { - name "NPU.STCK2.CS.SM1.MISC.CERR_FIRST2"; - scomaddr 0x05011449; - capture group npu0fir_ffdc; - }; - - register NPU_S2_CS_SM2_CERR_MSG0 - { - name "NPU.STCK2.CS.SM2.MISC.CERR_MESSAGE0"; - scomaddr 0x05011471; - capture group npu0fir_ffdc; - }; - - register NPU_S2_CS_SM2_CERR_0 - { - name "NPU.STCK2.CS.SM2.MISC.CERR_FIRST0"; - scomaddr 0x05011477; - capture group npu0fir_ffdc; - }; - - register NPU_S2_CS_SM2_CERR_1 - { - name "NPU.STCK2.CS.SM2.MISC.CERR_FIRST1"; - scomaddr 0x05011478; - capture group npu0fir_ffdc; - }; - - register NPU_S2_CS_SM2_CERR_2 - { - name "NPU.STCK2.CS.SM2.MISC.CERR_FIRST2"; - scomaddr 0x05011479; - capture group npu0fir_ffdc; - }; - - register NPU_S2_CS_SM3_CERR_MSG0 - { - name "NPU.STCK2.CS.SM3.MISC.CERR_MESSAGE0"; - scomaddr 0x050114A1; - capture group npu0fir_ffdc; - }; - - register NPU_S2_CS_SM3_CERR_0 - { - name "NPU.STCK2.CS.SM3.MISC.CERR_FIRST0"; - scomaddr 0x050114A7; - capture group npu0fir_ffdc; - }; - - register NPU_S2_CS_SM3_CERR_1 - { - name "NPU.STCK2.CS.SM3.MISC.CERR_FIRST1"; - scomaddr 0x050114A8; - capture group npu0fir_ffdc; - }; - - register NPU_S2_CS_SM3_CERR_2 - { - name "NPU.STCK2.CS.SM3.MISC.CERR_FIRST2"; - scomaddr 0x050114A9; - capture group npu0fir_ffdc; - }; - - register NPU_S2_CS_CTL_CERR_MSG0 - { - name "NPU.STCK2.CS.CTL.MISC.CERR_MESSAGE0"; - scomaddr 0x050114D8; - capture group npu0fir_ffdc; - }; - - register NPU_S2_CS_CTL_CERR_MSG1 - { - name "NPU.STCK2.CS.CTL.MISC.CERR_MESSAGE1"; - scomaddr 0x050114D9; - capture group npu0fir_ffdc; - }; - - register NPU_S2_CS_CTL_CERR_0 - { - name "NPU.STCK2.CS.CTL.MISC.CERR_FIRST0"; - scomaddr 0x050114DA; - capture group npu0fir_ffdc; - }; - - register NPU_S2_CS_CTL_CERR_1 - { - name "NPU.STCK2.CS.CTL.MISC.CERR_FIRST1"; - scomaddr 0x050114DB; - capture group npu0fir_ffdc; - }; - - register NPU_S2_DAT_CERR_ECC_HOLD - { - name "NPU.STCK2.DAT.MISC.CERR_ECC_HOLD"; - scomaddr 0x050114F4; - capture group npu0fir_ffdc; - }; - - register NPU_S2_DAT_CERR_ECC_MASK - { - name "NPU.STCK2.DAT.MISC.CERR_ECC_MASK"; - scomaddr 0x050114F5; - capture group npu0fir_ffdc; - }; - - register NPU_S2_DAT_CERR_ECC_ - { - name "NPU.STCK2.DAT.MISC.CERR_ECC_FIRST"; - scomaddr 0x050114F6; - capture group npu0fir_ffdc; - }; - - register NPU_S2_DAT_CERR_LOG_HOLD - { - name "NPU.STCK2.DAT.MISC.CERR_LOG_HOLD"; - scomaddr 0x050114FA; - capture group npu0fir_ffdc; - }; - - register NPU_S2_DAT_REM0 - { - name "NPU.STCK2.DAT.MISC.REM0"; - scomaddr 0x050114FD; - capture group npu0fir_ffdc; - }; - - register NPU_S2_DAT_REM1 - { - name "NPU.STCK2.DAT.MISC.REM1"; - scomaddr 0x050114FE; - capture group npu0fir_ffdc; - }; - - register NPU_S2_NTL0_CERR_1 - { - name "NPU.STCK2.NTL0.REGS.CERR_FIRST1"; - scomaddr 0x05011514; - capture group npu0fir_ffdc; - }; - - register NPU_S2_NTL0_CERR_2 - { - name "NPU.STCK2.NTL0.REGS.CERR_FIRST2"; - scomaddr 0x05011518; - capture group npu0fir_ffdc; - }; - - register NPU_S2_NTL1_CERR_1 - { - name "NPU.STCK2.NTL1.REGS.CERR_FIRST1"; - scomaddr 0x05011534; - capture group npu0fir_ffdc; - }; - - register NPU_S2_NTL1_CERR_2 - { - name "NPU.STCK2.NTL1.REGS.CERR_FIRST2"; - scomaddr 0x05011538; - capture group npu0fir_ffdc; - }; - - register NPU_XTS_REG_ERR_HOLD - { - name "NPU.XTS.REG.ERR_HOLD"; - scomaddr 0x05011640; - capture group npu0fir_ffdc; - }; - - ############################################################################ # NPU CERR and debug registers for INTCQFIR ############################################################################ |