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authorTsung Yeung <tyeung@us.ibm.com>2019-03-10 18:09:10 -0400
committerDaniel M. Crowell <dcrowell@us.ibm.com>2019-03-25 15:52:02 -0500
commitda2c809979091a0ac936940d60757684f49562b4 (patch)
treefe05cc1ee910f0444c6b760e15018b23466246ab
parent7c067d46c2f7033c20099e21b559130ee9b63a00 (diff)
downloadtalos-hostboot-da2c809979091a0ac936940d60757684f49562b4.tar.gz
talos-hostboot-da2c809979091a0ac936940d60757684f49562b4.zip
Suppresses maintenance error messages due to STR exit
-Modify self_refresh_exit_helper() to be less intrusive -Disable ECC checking and mask complete bits Change-Id: I1f4e2ee18c2f3b47abfddbb0ceeb6dd2776caab3 CQ:SW458493 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/73109 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Louis Stermole <stermole@us.ibm.com> Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/73113 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
-rw-r--r--src/import/chips/p9/procedures/hwp/memory/lib/dimm/ddr4/nvdimm_utils.C102
-rw-r--r--src/import/chips/p9/procedures/hwp/memory/lib/dimm/ddr4/nvdimm_utils.H18
-rw-r--r--src/import/chips/p9/procedures/hwp/memory/lib/mc/port.H13
-rw-r--r--src/import/chips/p9/procedures/hwp/memory/lib/mcbist/mcbist.H151
-rw-r--r--src/import/chips/p9/procedures/xml/error_info/p9_memory_mss_nvdimm.xml49
5 files changed, 314 insertions, 19 deletions
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/ddr4/nvdimm_utils.C b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/ddr4/nvdimm_utils.C
index b9ded1c6c..735c5dab3 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/ddr4/nvdimm_utils.C
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/ddr4/nvdimm_utils.C
@@ -43,6 +43,7 @@
#include <lib/mss_attribute_accessors.H>
#include <generic/memory/lib/utils/poll.H>
#include <generic/memory/lib/utils/count_dimm.H>
+#include <generic/memory/lib/utils/mc/gen_mss_port.H>
#include <lib/mcbist/address.H>
#include <lib/mcbist/memdiags.H>
#include <lib/mcbist/mcbist.H>
@@ -116,8 +117,51 @@ fapi_try_exit:
}
///
-/// @brief Helper for self_refresh_exit(). Uses memdiag to read the port to force
-/// CKE back to high. Stolen from mss_lab_memdiags.C
+/// @brief change ECC check and correct mode
+/// Specialization for TARGET_TYPE_MCA
+/// @param[in] i_target the target associated with this subroutine
+/// @param[in] i_state the state to change to
+/// @return FAPI2_RC_SUCCESS iff setup was successful
+///
+template< >
+fapi2::ReturnCode change_ecc_check_correct_disable( const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target,
+ const mss::states i_state )
+{
+ fapi2::buffer<uint64_t> l_data;
+
+ FAPI_TRY(mss::read_recr_register(i_target, l_data));
+ mss::set_ecc_check_disable(l_data, i_state);
+ FAPI_TRY(mss::write_recr_register(i_target, l_data));
+
+fapi_try_exit:
+ return fapi2::current_err;
+}
+
+///
+/// @brief cleanup after targeted scrub
+/// @param[in] i_target the target associated with this subroutine
+/// @return FAPI2_RC_SUCCESS iff setup was successful
+///
+fapi2::ReturnCode targeted_scrub_cleanup( const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target )
+{
+ const auto& l_mcbist = mss::find_target<fapi2::TARGET_TYPE_MCBIST>(i_target);
+ fapi2::buffer<uint64_t> l_data;
+
+ // Clear the command complete to make sure PRD doesn't pick this up later
+ FAPI_TRY(mss::read_mcbfirq(l_mcbist, l_data));
+ mss::clear_mcbist_program_complete(l_data);
+ FAPI_TRY(mss::write_mcbfirq(l_mcbist, l_data));
+
+ // Re-enable ECC check on the given port
+ FAPI_TRY(change_ecc_check_correct_disable(i_target, mss::states::ON_N));
+
+fapi_try_exit:
+ return fapi2::current_err;
+}
+
+///
+/// @brief Helper for self_refresh_exit(). Uses scrub to make 1 address read to force
+/// CKE back to high.
/// Specialization for TARGET_TYPE_MCA
/// @param[in] i_target the target associated with this subroutine
/// @return FAPI2_RC_SUCCESS iff setup was successful
@@ -127,7 +171,8 @@ fapi2::ReturnCode self_refresh_exit_helper( const fapi2::Target<fapi2::TARGET_TY
{
const auto& l_mcbist = mss::find_target<fapi2::TARGET_TYPE_MCBIST>(i_target);
- fapi2::buffer<uint64_t> l_status;
+ fapi2::buffer<uint64_t> l_status, l_recr_buf, l_mcbfirq_buf, l_mcbfirmask_buf;
+ mss::states l_complete_mask = mss::states::LOW, l_wat_debug_attn_mask = mss::states::LOW;
// A small vector of addresses to poll during the polling loop
const std::vector<mss::poll_probe<fapi2::TARGET_TYPE_MCBIST>> l_probes =
@@ -138,27 +183,37 @@ fapi2::ReturnCode self_refresh_exit_helper( const fapi2::Target<fapi2::TARGET_TY
// We'll fill in the initial delay below
// Heuristically defined and copied from the f/w version of memdiags
mss::poll_parameters l_poll_parameters(0, 200, 100 * mss::DELAY_1MS, 200, 500);
- uint64_t l_memory_size = 0;
- FAPI_TRY( mss::eff_memory_size<mss::mc_type::NIMBUS>(l_mcbist, l_memory_size) );
- l_poll_parameters.iv_initial_delay = mss::calculate_initial_delay(l_mcbist, (l_memory_size * mss::BYTES_PER_GB));
+ // Setting initial delay for 1 read (64 bytes)
+ l_poll_parameters.iv_initial_delay = mss::calculate_initial_delay(l_mcbist, 64);
+
+ // Need to disable ECC check because we are reading without the proper settings on the DRAMs
+ FAPI_TRY(change_ecc_check_correct_disable(i_target, mss::states::OFF_N));
+
+ // Save the current value to restore later
+ FAPI_TRY(mss::read_mcbfirmask(l_mcbist, l_mcbfirmask_buf));
+ mss::get_mcbist_program_complete_mask(l_mcbfirmask_buf, l_complete_mask);
+ mss::get_mcbist_wat_debug_attn_mask(l_mcbfirmask_buf, l_wat_debug_attn_mask);
+
+ // Mask the command complete so they don't show up in error log
+ mss::set_mcbist_program_complete_mask(l_mcbfirmask_buf, mss::states::ON);
+ mss::set_mcbist_wat_debug_attn_mask(l_mcbfirmask_buf, mss::states::ON);
+ FAPI_TRY(mss::write_mcbfirmask(l_mcbist, l_mcbfirmask_buf));
{
// Force this to run on the targeted port only
const auto& l_port = mss::relative_pos<fapi2::TARGET_TYPE_MCBIST>(i_target);
- mss::mcbist::address l_start;
+ mss::mcbist::address l_start = 0, l_end = 0;
mss::mcbist::end_boundary l_end_boundary = mss::mcbist::end_boundary::STOP_AFTER_SLAVE_RANK;
l_start.set_port(l_port);
mss::mcbist::stop_conditions l_stop_conditions;
- // Read with super fast read
- // Set up with mcbist target, stop conditions above
- // Using defaults for starting at first valid address and stop at end of slave rank
- FAPI_TRY ( mss::memdiags::sf_read(l_mcbist,
- l_stop_conditions,
- l_start,
- l_end_boundary,
- l_start) );
+ // Read with targeted scrub
+ FAPI_TRY ( mss::memdiags::targeted_scrub(l_mcbist,
+ l_stop_conditions,
+ l_start,
+ l_end,
+ l_end_boundary) );
bool l_poll_results = mss::poll(l_mcbist, MCBIST_MCBISTFIRQ, l_poll_parameters,
[&l_status](const size_t poll_remaining,
@@ -170,10 +225,23 @@ fapi2::ReturnCode self_refresh_exit_helper( const fapi2::Target<fapi2::TARGET_TY
},
l_probes);
- FAPI_DBG("memdiags_read poll result: %d", l_poll_results);
+ FAPI_DBG("targeted_scrub poll result: %d", l_poll_results);
+
+ FAPI_ASSERT(l_poll_results,
+ fapi2::MSS_NVDIMM_TARGETED_SCRUB_STR_EXIT_FAILED_TO_COMPLETE().
+ set_MCA_TARGET(i_target).
+ set_MCBIST_TARGET(l_mcbist),
+ "targeted scrub failed to complete on %s", mss::c_str(i_target));
}
- return fapi2::FAPI2_RC_SUCCESS;
+ // Clean up the commmand complete and re-enable ECC check and correct
+ FAPI_TRY(targeted_scrub_cleanup(i_target));
+
+ // Restore the mask to the original value
+ FAPI_TRY(mss::read_mcbfirmask(l_mcbist, l_mcbfirmask_buf));
+ mss::set_mcbist_program_complete_mask(l_mcbfirmask_buf, l_complete_mask);
+ mss::set_mcbist_wat_debug_attn_mask(l_mcbfirmask_buf, l_wat_debug_attn_mask);
+ FAPI_TRY(mss::write_mcbfirmask(l_mcbist, l_mcbfirmask_buf));
fapi_try_exit:
return fapi2::current_err;
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/ddr4/nvdimm_utils.H b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/ddr4/nvdimm_utils.H
index 2a37e9aaa..3c4f081d3 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/ddr4/nvdimm_utils.H
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/ddr4/nvdimm_utils.H
@@ -66,6 +66,24 @@ fapi2::ReturnCode change_maint_addr_mode_en( const fapi2::Target<T>& i_target,
const mss::states i_state );
///
+/// @brief change ECC check and correct mode
+/// Specialization for TARGET_TYPE_MCA
+/// @param[in] i_target the target associated with this subroutine
+/// @param[in] i_state the state to change to
+/// @return FAPI2_RC_SUCCESS iff setup was successful
+///
+template< fapi2::TargetType T >
+fapi2::ReturnCode change_ecc_check_correct_disable( const fapi2::Target<T>& i_target,
+ const mss::states i_state );
+
+///
+/// @brief cleanup after targeted scrub
+/// @param[in] i_target the target associated with this subroutine
+/// @return FAPI2_RC_SUCCESS iff setup was successful
+///
+fapi2::ReturnCode targeted_scrub_cleanup( const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target );
+
+///
/// @brief Helper for self_refresh_exit().
/// @tparam T the target type associated with this subroutine
/// @param[in] i_target the target associated with this subroutine
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/mc/port.H b/src/import/chips/p9/procedures/hwp/memory/lib/mc/port.H
index 1f5f06f43..252ebc5a9 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/mc/port.H
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/mc/port.H
@@ -284,7 +284,20 @@ class portTraits<mss::mc_type::NIMBUS>
};
+///
+/// @brief Sets ecc_check_disable in buffer
+/// @tparam T the fapi2 target type of the target
+/// @tparam TT the class traits for the port
+/// @param[in,out] io_data the target data buffer
+/// @param[in] i_value ECC_CHECK_DISABLE value (on or off) to set
+///
+template< fapi2::TargetType T = fapi2::TARGET_TYPE_MCA, typename TT = portTraits<mss::mc_type::NIMBUS> >
+void set_ecc_check_disable( fapi2::buffer<uint64_t>& io_data, const mss::states i_value )
+{
+ FAPI_INF( "Set ECC_CHECK_DISABLE to %lu", i_value);
+ io_data.template writeBit<TT::ECC_CHECK_DISABLE>(i_value);
+}
///
/// @brief Get the read pointer delay value from RECR
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/mcbist/mcbist.H b/src/import/chips/p9/procedures/hwp/memory/lib/mcbist/mcbist.H
index e42dcce00..bba494154 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/mcbist/mcbist.H
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/mcbist/mcbist.H
@@ -102,6 +102,10 @@ class mcbistTraits<fapi2::TARGET_TYPE_MCBIST>
static constexpr uint64_t MCBAMR2A0Q_REG = MCBIST_MCBAMR2A0Q;
static constexpr uint64_t MCBAMR3A0Q_REG = MCBIST_MCBAMR3A0Q;
+ // MCBIST FIR registers
+ static constexpr uint64_t MCBFIRMASK_REG = MCBIST_MCBISTFIRMASK;
+ static constexpr uint64_t MCBFIRQ_REG = MCBIST_MCBISTFIRQ;
+
// All of the pattern registers are calculated off of this base
static constexpr uint64_t PATTERN0_REG = MCBIST_MCBFD0Q;
@@ -349,6 +353,12 @@ class mcbistTraits<fapi2::TARGET_TYPE_MCBIST>
ERROR_LOG_BEAT_LEN = 2,
ERROR_LOG_TYPE = 46,
ERROR_LOG_TYPE_LEN = 2,
+
+ //MCBIST FIR mask
+ MCB_PROGRAM_COMPLETE = MCBIST_MCBISTFIRQ_MCBIST_PROGRAM_COMPLETE,
+ MCB_WAT_DEBUG_ATTN = MCBIST_MCBISTFIRQ_WAT_DEBUG_ATTN,
+ MCB_PROGRAM_COMPLETE_MASK = MCB_PROGRAM_COMPLETE,
+ MCB_WAT_DEBUG_ATTN_MASK = MCB_WAT_DEBUG_ATTN,
};
};
@@ -3263,8 +3273,145 @@ fapi2::ReturnCode configure_broadcast_mode(const fapi2::Target<T>& i_target, mcb
return enable_broadcast_mode(i_target, io_program);
}
-} // namespace
+} // mcbist namespace
+
+///
+/// @brief Reads the contents of the MCBISTFIRMASK
+/// @tparam T fapi2 Target Type - derived
+/// @tparam TT traits type defaults to mcbistTraits<T>
+/// @param[in] i_target the target on which to operate
+/// @param[out] o_data the register data
+/// @return fapi2::fapi2_rc_success if ok
+///
+template< fapi2::TargetType T, typename TT = mcbistTraits<T> >
+inline fapi2::ReturnCode read_mcbfirmask( const fapi2::Target<T>& i_target, fapi2::buffer<uint64_t>& o_data )
+{
+ o_data = 0;
+
+ FAPI_TRY( mss::getScom(i_target, TT::MCBFIRMASK_REG, o_data ), "%s failed to read MCBISTFIRMASK regiser",
+ mss::c_str(i_target));
+ FAPI_DBG("%s MCBISTFIRMASK has data 0x%016lx", mss::c_str(i_target), o_data);
+
+fapi_try_exit:
+ return fapi2::current_err;
+}
+
+///
+/// @brief Writes the contents of the MCBISTFIRMASK
+/// @tparam T fapi2 Target Type - derived
+/// @tparam TT traits type defaults to mcbistTraits<T>
+/// @param[in] i_target the target on which to operate
+/// @param[in] i_data the register data
+/// @return fapi2::fapi2_rc_success if ok
+///
+template< fapi2::TargetType T, typename TT = mcbistTraits<T> >
+inline fapi2::ReturnCode write_mcbfirmask( const fapi2::Target<T>& i_target, const fapi2::buffer<uint64_t>& i_data )
+{
+ FAPI_TRY( mss::putScom(i_target, TT::MCBFIRMASK_REG, i_data ), "%s failed to write MCBISTFIRMASK regiser",
+ mss::c_str(i_target));
+ FAPI_DBG("%s MCBISTFIRMASK has data 0x%016lx", mss::c_str(i_target), i_data);
+
+fapi_try_exit:
+ return fapi2::current_err;
+}
+
+///
+/// @brief Reads the contents of the MCBISTFIRQ
+/// @tparam T fapi2 Target Type - derived
+/// @tparam TT traits type defaults to mcbistTraits<T>
+/// @param[in] i_target the target on which to operate
+/// @param[out] o_data the register data
+/// @return fapi2::fapi2_rc_success if ok
+///
+template< fapi2::TargetType T, typename TT = mcbistTraits<T> >
+inline fapi2::ReturnCode read_mcbfirq( const fapi2::Target<T>& i_target, fapi2::buffer<uint64_t>& o_data )
+{
+ o_data = 0;
+
+ FAPI_TRY( mss::getScom(i_target, TT::MCBFIRQ_REG, o_data ), "%s failed to read MCBISTFIRQ regiser",
+ mss::c_str(i_target));
+ FAPI_DBG("%s MCBISTFIRQ has data 0x%016lx", mss::c_str(i_target), o_data);
+
+fapi_try_exit:
+ return fapi2::current_err;
+}
+
+///
+/// @brief Writes the contents of the MCBISTFIRQ
+/// @tparam T fapi2 Target Type - derived
+/// @tparam TT traits type defaults to mcbistTraits<T>
+/// @param[in] i_target the target on which to operate
+/// @param[in] i_data the register data
+/// @return fapi2::fapi2_rc_success if ok
+///
+template< fapi2::TargetType T, typename TT = mcbistTraits<T> >
+inline fapi2::ReturnCode write_mcbfirq( const fapi2::Target<T>& i_target, const fapi2::buffer<uint64_t>& i_data )
+{
+ FAPI_TRY( mss::putScom(i_target, TT::MCBFIRQ_REG, i_data ), "%s failed to write MCBISTFIRQ regiser",
+ mss::c_str(i_target));
+ FAPI_DBG("%s MCBISTFIRQ has data 0x%016lx", mss::c_str(i_target), i_data);
+
+fapi_try_exit:
+ return fapi2::current_err;
+}
+
+///
+/// @brief Sets the mask for program complete
+/// @tparam T fapi2 Target Type - defaults to TARGET_TYPE_MCBIST
+/// @tparam TT traits type defaults to mcbistTraits<T>
+/// @param[in,out] io_data the value of the register
+/// @param[in] i_state the state to write into the enable
+///
+template< fapi2::TargetType T = fapi2::TARGET_TYPE_MCBIST, typename TT = mcbistTraits<T> >
+inline void set_mcbist_program_complete_mask( fapi2::buffer<uint64_t>& io_data, const mss::states i_state )
+{
+ io_data.writeBit<TT::MCB_PROGRAM_COMPLETE_MASK>(i_state == mss::states::ON);
+ FAPI_DBG("set_mcbist_program_complete_mask to %d 0x%016lx", i_state, io_data);
+}
+
+///
+/// @brief Sets the mask for WAT debug ATTN
+/// @tparam T fapi2 Target Type - defaults to TARGET_TYPE_MCBIST
+/// @tparam TT traits type defaults to mcbistTraits<T>
+/// @param[in,out] io_data the value of the register
+/// @param[in] i_state the state to write into the enable
+///
+template< fapi2::TargetType T = fapi2::TARGET_TYPE_MCBIST, typename TT = mcbistTraits<T> >
+inline void set_mcbist_wat_debug_attn_mask( fapi2::buffer<uint64_t>& io_data, const mss::states i_state )
+{
+ io_data.writeBit<TT::MCB_WAT_DEBUG_ATTN_MASK>(i_state == mss::states::ON);
+ FAPI_DBG("set_mcbist_wat_debug_attn_mask to %d 0x%016lx", i_state, io_data);
+}
+
+///
+/// @brief Clears the program complete and WAT debug ATTN
+/// @tparam T fapi2 Target Type - defaults to TARGET_TYPE_MCBIST
+/// @tparam TT traits type defaults to mcbistTraits<T>
+/// @param[in,out] io_data the value of the register
+/// @param[in] i_state the state to write into the enable
+///
+template< fapi2::TargetType T = fapi2::TARGET_TYPE_MCBIST, typename TT = mcbistTraits<T> >
+inline void clear_mcbist_program_complete( fapi2::buffer<uint64_t>& io_data )
+{
+ io_data.writeBit<TT::MCB_PROGRAM_COMPLETE>(mss::states::OFF);
+ io_data.writeBit<TT::MCB_WAT_DEBUG_ATTN>(mss::states::OFF);
+ FAPI_DBG("clear_mcbist_program_complete to %d 0x%016lx", mss::states::OFF, io_data);
+}
+
+template< fapi2::TargetType T = fapi2::TARGET_TYPE_MCBIST, typename TT = mcbistTraits<T> >
+inline void get_mcbist_program_complete_mask( const fapi2::buffer<uint64_t> i_data, mss::states& o_state )
+{
+ o_state = i_data.getBit<TT::MCB_PROGRAM_COMPLETE>() ? mss::states::HIGH : mss::states::LOW;
+ FAPI_DBG("get_mcbist_program_complete_mask %d", o_state);
+}
+
+template< fapi2::TargetType T = fapi2::TARGET_TYPE_MCBIST, typename TT = mcbistTraits<T> >
+inline void get_mcbist_wat_debug_attn_mask( const fapi2::buffer<uint64_t> i_data, mss::states& o_state )
+{
+ o_state = i_data.getBit<TT::MCB_WAT_DEBUG_ATTN>() ? mss::states::HIGH : mss::states::LOW;
+ FAPI_DBG("mcbist_wat_debug_attn_mask %d", o_state);
+}
-} // namespace
+} // mss namespace
#endif
diff --git a/src/import/chips/p9/procedures/xml/error_info/p9_memory_mss_nvdimm.xml b/src/import/chips/p9/procedures/xml/error_info/p9_memory_mss_nvdimm.xml
new file mode 100644
index 000000000..80d3044c1
--- /dev/null
+++ b/src/import/chips/p9/procedures/xml/error_info/p9_memory_mss_nvdimm.xml
@@ -0,0 +1,49 @@
+<!-- IBM_PROLOG_BEGIN_TAG -->
+<!-- This is an automatically generated prolog. -->
+<!-- -->
+<!-- $Source: src/import/chips/p9/procedures/xml/error_info/p9_memory_mss_nvdimm.xml $ -->
+<!-- -->
+<!-- OpenPOWER HostBoot Project -->
+<!-- -->
+<!-- Contributors Listed Below - COPYRIGHT 2019 -->
+<!-- [+] International Business Machines Corp. -->
+<!-- -->
+<!-- -->
+<!-- Licensed under the Apache License, Version 2.0 (the "License"); -->
+<!-- you may not use this file except in compliance with the License. -->
+<!-- You may obtain a copy of the License at -->
+<!-- -->
+<!-- http://www.apache.org/licenses/LICENSE-2.0 -->
+<!-- -->
+<!-- Unless required by applicable law or agreed to in writing, software -->
+<!-- distributed under the License is distributed on an "AS IS" BASIS, -->
+<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or -->
+<!-- implied. See the License for the specific language governing -->
+<!-- permissions and limitations under the License. -->
+<!-- -->
+<!-- IBM_PROLOG_END_TAG -->
+
+<!-- -->
+<!-- @file p9_memory_mss_nvdimm.xml -->
+<!-- @brief Error xml for -->
+<!-- -->
+<!-- *HWP HWP Owner: Tsung Yeung <tyeung@us.ibm.com> -->
+<!-- *HWP HWP Backup: Stephen Glancy <sglancy@us.ibm.com> -->
+<!-- *HWP Team: Memory -->
+<!-- *HWP Level: 3 -->
+<!-- *HWP Consumed by: HB:FSP -->
+<!-- -->
+
+<hwpErrors>
+
+ <hwpError>
+ <rc>RC_MSS_NVDIMM_TARGETED_SCRUB_STR_EXIT_FAILED_TO_COMPLETE</rc>
+ <description>Targeted scrub failed to complete in self refresh exit helper</description>
+ <ffdc>MCA_TARGET</ffdc>
+ <callout>
+ <target>MCBIST_TARGET</target>
+ <priority>HIGH</priority>
+ </callout>
+ </hwpError>
+
+</hwpErrors>
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