PM: Generation of summarized version of STOP Recovery FFDC.

A summary of STOP recovery FFDC is created after generation of
complete FFDC. It is stored at the end of FFDC section. It is
intended for copying to an error log created during second
phase of STOP Recovery. Commit also incorporates some changes
to support creation of PM Display from STOP Recovery FFDC.

Key_Cronus_Test=PM_REGRESS

CQ: SW416531
Change-Id: Ieb0bceeb141cc80b18f63b01e881e5ad3b50263d
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/50414
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Reviewed-by: AMIT J. TENDOLKAR <amit.tendolkar@in.ibm.com>
Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/50422
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>

22 files changed, 1140 insertions, 185 deletions

diff --git a/src/import/chips/p9/common/include/p9_misc_scom_addresses.H b/src/import/chips/p9/common/include/p9_misc_scom_addresses.H
index 8fb09feee..75569dc7a 100644
--- a/src/import/chips/p9/common/include/p9_misc_scom_addresses.H
+++ b/src/import/chips/p9/common/include/p9_misc_scom_addresses.H
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* OpenPOWER HostBoot Project                                             */
 /*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2015,2017                        */
+/* Contributors Listed Below - COPYRIGHT 2015,2018                        */
 /* [+] International Business Machines Corp.                              */
 /*                                                                        */
 /*                                                                        */
diff --git a/src/import/chips/p9/common/include/p9_misc_scom_addresses_fixes.H b/src/import/chips/p9/common/include/p9_misc_scom_addresses_fixes.H
index 6602db062..377f28a96 100644
--- a/src/import/chips/p9/common/include/p9_misc_scom_addresses_fixes.H
+++ b/src/import/chips/p9/common/include/p9_misc_scom_addresses_fixes.H
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* OpenPOWER HostBoot Project                                             */
 /*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2015,2017                        */
+/* Contributors Listed Below - COPYRIGHT 2015,2018                        */
 /* [+] International Business Machines Corp.                              */
 /*                                                                        */
 /*                                                                        */
@@ -413,6 +413,8 @@ REG64( PU_BCDE_OCIBAR_SCOM, RULL(0x00068014), SH_UNT, SH_ACS_SCOM_RW);
 REG64( PU_BCDE_STAT_SCOM, RULL(0x00068012), SH_UNT, SH_ACS_SCOM_RO);
 //WARNING: This register is not defined anymore in the figtree.
 REG64( PU_PBAXCFG_SCOM, RULL(0x00068021), SH_UNT, SH_ACS_SCOM);
+REG64( PU_OCB_OCI_OINKR0_SCOM, RULL(0x0006C010), SH_UNT, SH_ACS_SCOM_RO);
+REG64( PU_OCB_OCI_OINKR1_SCOM, RULL(0x0006C030), SH_UNT, SH_ACS_SCOM_RO);
 
 REG64( PEC_PCS_RX_CONFIG_MODE_REG                              , RULL(0x800004800D010C3F), SH_UNT_PEC      ,
        SH_ACS_SCOM      );
diff --git a/src/import/chips/p9/procedures/hwp/lib/p9_hcd_memmap_base.H b/src/import/chips/p9/procedures/hwp/lib/p9_hcd_memmap_base.H
index d269d2656..0ca35369c 100644
--- a/src/import/chips/p9/procedures/hwp/lib/p9_hcd_memmap_base.H
+++ b/src/import/chips/p9/procedures/hwp/lib/p9_hcd_memmap_base.H
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* OpenPOWER HostBoot Project                                             */
 /*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2015,2017                        */
+/* Contributors Listed Below - COPYRIGHT 2015,2018                        */
 /* [+] International Business Machines Corp.                              */
 /*                                                                        */
 /*                                                                        */
@@ -572,6 +572,8 @@ HCD_CONST(FFDC_CPPM_MAGIC_NUM,        (0x4350504d)) //"CPPM"
 HCD_CONST(FFDC_QPPM_MAGIC_NUM,        (0x5150504d)) //"QPPM"
 HCD_CONST(FFDC_QUAD_MAGIC_NUM,        (0x51554144)) //"QUAD"
 HCD_CONST(FFDC_FIR_MAGIC_NUM,         (0x46495200)) //"FIR"
+HCD_CONST(FFDC_SUMM_MAGIC_NUM,        (0x53554d4d)) //"SUMM"
+HCD_CONST(FFDC_REG_NOT_FOUND,         (0x212d2d21)) //"!--!"
 
 // PM FFDC Region Layout Sizes
 HCD_CONST(FFDC_SCOM_REG_ID_VAL_SIZE,    12)
@@ -579,8 +581,8 @@ HCD_CONST(FFDC_SCOM_REG_ID_VAL_SIZE,    12)
 // PPE FFDC Section
 // section common to SGPE and PGPE FFDC
 
-// 27 CME internal regs, 10 CME regs, 1 buffer/pad
-HCD_CONST(FFDC_PPE_INTL_REGISTERS_MAX,  38)
+//31 CME internal regs, 10 CME regs, 1 buffer/pad
+HCD_CONST(FFDC_PPE_INTL_REGISTERS_MAX,  42)
 
 HCD_CONST(FFDC_PPE_HDR_SIZE ,           0x18)
 HCD_CONST(FFDC_PPE_SCORE_BOARD_SIZE,    0x200)
@@ -601,8 +603,9 @@ HCD_CONST(FFDC_PPE_BLOCK_SIZE,          (FFDC_PPE_HDR_SIZE +
           FFDC_PPE_TRACES_SIZE ))
 
 // FIR FFDC Section
-HCD_CONST(FFDC_PM_CME_FIR_REGISTERS_MAX, 1)
-HCD_CONST(FFDC_PM_FIR_REGISTERS_MAX,     2)
+// Includes FIR, its Mask and action registers
+HCD_CONST(FFDC_PM_CME_FIR_REGISTERS_MAX, 4)
+HCD_CONST(FFDC_PM_FIR_REGISTERS_MAX,     5)
 
 HCD_CONST(FFDC_FIR_HDR_SIZE ,           0x10)
 HCD_CONST(FFDC_CME_FIR_REGISTERS_SIZE,  (FFDC_PM_CME_FIR_REGISTERS_MAX*
@@ -617,14 +620,14 @@ HCD_CONST(FFDC_FIR_REGION_SIZE,         (FFDC_FIR_HDR_SIZE +
 HCD_CONST(FFDC_PPM_HDR_SIZE,            0x10)
 
 // Core PPM
-HCD_CONST(FFDC_CPPM_REGISTERS_MAX,      28)
+HCD_CONST(FFDC_CPPM_REGISTERS_MAX,      29)
 HCD_CONST(FFDC_CPPM_REGISTERS_SIZE,     (FFDC_CPPM_REGISTERS_MAX*
           FFDC_SCOM_REG_ID_VAL_SIZE))
 HCD_CONST(FFDC_CPPM_REGION_SIZE,        (FFDC_PPM_HDR_SIZE +
           FFDC_CPPM_REGISTERS_SIZE))
 
 // Quad PPM
-HCD_CONST(FFDC_QPPM_REGISTERS_MAX,      28) // 1 extra for pad
+HCD_CONST(FFDC_QPPM_REGISTERS_MAX,      62) // 1 extra for pad
 HCD_CONST(FFDC_QPPM_REGISTERS_SIZE,     (FFDC_QPPM_REGISTERS_MAX*
           FFDC_SCOM_REG_ID_VAL_SIZE))
 HCD_CONST(FFDC_QPPM_REGION_SIZE,        (FFDC_PPM_HDR_SIZE +
@@ -643,7 +646,7 @@ HCD_CONST(FFDC_SGPE_REGION_SIZE,        (FFDC_PPE_BLOCK_SIZE))
 HCD_CONST(FFDC_PGPE_REGION_SIZE,        (FFDC_PPE_BLOCK_SIZE))
 
 // OCC FFDC Section
-HCD_CONST(FFDC_OCC_REGISTERS_MAX,       202) // 1 extra for pad
+HCD_CONST(FFDC_OCC_REGISTERS_MAX,       230) // 1 extra for pad
 
 HCD_CONST(FFDC_OCC_REGION_HDR_SIZE,     0x20)
 HCD_CONST(FFDC_TRACE_ERR_SIZE,          (8 * ONE_KB))
@@ -665,21 +668,80 @@ HCD_CONST(FFDC_OCC_REGION_SIZE,         (FFDC_OCC_REGION_HDR_SIZE +
           FFDC_SHARED_SRAM_SIZE +
           FFDC_OCC_REGS_SIZE))
 
+
+//FFDC Summary Section
+
+HCD_CONST(FFDC_SUMMARY_SUB_SEC_VALID,   1 )  // FFDC sub-sec valid mark
+HCD_CONST(FFDC_SUMMARY_SUB_SEC_INVALID, 0 )  // FFDC sub-sec in-valid mark
+HCD_CONST(FFDC_SUMMARY_PPE_REG,         6 )  // 5 + 1 extra for pad
+HCD_CONST(FFDC_SUMMARY_CPPM_REG,        3 )  // 2  + 1 extra for pad
+HCD_CONST(FFDC_SUMMARY_QPPM_REG,        4 )  // 3  + 1 extra for pad
+HCD_CONST(FFDC_SUMMARY_PPE_REG_SIZE,    4 )
+HCD_CONST(FFDC_SUMMARY_SCOM_REG_SIZE,   8 )
+HCD_CONST(FFDC_SUMMARY_MAGIC_WORD_SIZE,   4 )
+HCD_CONST(FFDC_SUMMARY_SEC_HDR_SIZE,      4 )
+HCD_CONST(FFDC_SUMMARY_SYS_CNGF_REG,      5 ) // CCSR, QSSR, OCCFLAG1 OCCFLAG2 + 1 pad
+HCD_CONST(FFDC_SUMMARY_SYS_STATE_REG,     19 ) // 12 CME LFIR + OCC LFIR, PBAFIR + 4 OCC Reg + 1 Pad
+HCD_CONST(FFDC_SUMMARY_DASH_BOARD_BLOCK,  12 )
+HCD_CONST(FFDC_SUMMARY_DASH_BOARD_SUMM_SIZE,  (14 * FFDC_SUMMARY_DASH_BOARD_BLOCK ) ) // 12 CMEs + 1 SGPE + 1 PGPE
+HCD_CONST(FFDC_SUMMARY_SIZE_SYS_CONFIG,
+          (FFDC_SUMMARY_SYS_CNGF_REG* FFDC_SUMMARY_SCOM_REG_SIZE) )
+
+HCD_CONST(FFDC_SUMMARY_SIZE_SYS_STATE,
+          (FFDC_SUMMARY_SYS_STATE_REG* FFDC_SUMMARY_SCOM_REG_SIZE)  +
+          ( FFDC_SUMMARY_SEC_HDR_SIZE ) )
+
+HCD_CONST(FFDC_SUMMARY_OCC_PBA_FIR_SIZE, (2 * FFDC_SUMMARY_SCOM_REG_SIZE) )
+HCD_CONST(FFDC_SUMMARY_XIR_OFFSET,
+          (FFDC_SUMMARY_SEC_HDR_SIZE + FFDC_SUMMARY_SCOM_REG_SIZE) )
+
+HCD_CONST(FFDC_SUMMARY_SIZE_SGPE,
+          ( FFDC_SUMMARY_PPE_REG* FFDC_SUMMARY_PPE_REG_SIZE ) +
+          FFDC_SUMMARY_SEC_HDR_SIZE )
+
+HCD_CONST(FFDC_SUMMARY_SIZE_PGPE,
+          ( FFDC_SUMMARY_PPE_REG* FFDC_SUMMARY_PPE_REG_SIZE ) +
+          FFDC_SUMMARY_SEC_HDR_SIZE )
+
+HCD_CONST(FFDC_SUMMARY_SIZE_CME,
+          ( FFDC_SUMMARY_PPE_REG* FFDC_SUMMARY_PPE_REG_SIZE ) +
+          FFDC_SUMMARY_SEC_HDR_SIZE )    //PPE XIRS, and Pad
+
+HCD_CONST(FFDC_SUMMARY_SIZE_CPPM_REG,
+          ( FFDC_SUMMARY_CPPM_REG* FFDC_SUMMARY_SCOM_REG_SIZE ) +
+          FFDC_SUMMARY_SEC_HDR_SIZE )
+
+HCD_CONST(FFDC_SUMMARY_SIZE_QPPM_REG,
+          ( FFDC_SUMMARY_QPPM_REG* FFDC_SUMMARY_SCOM_REG_SIZE ) +
+          FFDC_SUMMARY_SEC_HDR_SIZE )
+
+HCD_CONST(FFDC_SUMMARY_MAJ_NUM,     1 )
+HCD_CONST(FFDC_SUMMARY_MIN_NUM,     0 )
+
+HCD_CONST(FFDC_SUMMARY_SIZE,      ( FFDC_SUMMARY_MAGIC_WORD_SIZE + FFDC_SUMMARY_SIZE_SYS_STATE +
+                                    FFDC_SUMMARY_SIZE_SGPE +
+                                    FFDC_SUMMARY_SIZE_PGPE +
+                                    (FFDC_SUMMARY_SIZE_CME* MAX_CMES_PER_CHIP ) +
+                                    (FFDC_SUMMARY_SIZE_CPPM_REG* MAX_CORES_PER_CHIP ) +
+                                    (FFDC_SUMMARY_SIZE_QPPM_REG* MAX_QUADS_PER_CHIP) +
+                                    FFDC_SUMMARY_DASH_BOARD_SUMM_SIZE ) )
+
 // Overall PM FFDC Section
 HCD_CONST(FFDC_PM_HEADER_SIZE,          0x38)
-HCD_CONST(FFDC_PM_REGION_SIZE,          (FFDC_PM_HEADER_SIZE +
+HCD_CONST(FFDC_REGION_HOMER_BASE_OFFSET,
+          (FFDC_REGION_QPMR_BASE_OFFSET + QPMR_HOMER_OFFSET))
+
+HCD_CONST(FFDC_PM_REGION_SIZE,          ( FFDC_PM_HEADER_SIZE +
           FFDC_FIR_REGION_SIZE +
-          (FFDC_QUAD_REGION_SIZE * 6) +
+          (FFDC_QUAD_REGION_SIZE* MAX_QUADS_PER_CHIP) +
           FFDC_SGPE_REGION_SIZE +
           FFDC_PGPE_REGION_SIZE +
-          FFDC_OCC_REGION_SIZE))
+          FFDC_OCC_REGION_SIZE ) + FFDC_SUMMARY_SIZE )
 
 HCD_CONST(DOPTRACE_OFFSET,
           (PPMR_HOMER_OFFSET + 64 * ONE_KB))
 HCD_CONST(DOPTRACE_LEN, 64 * ONE_KB)
 
 HCD_CONST(HOMER_OPTRACE_FFDC_OFFSET, (FFDC_REGION_QPMR_BASE_OFFSET + ONE_MB + FFDC_PM_REGION_SIZE))
-HCD_CONST(FFDC_REGION_HOMER_BASE_OFFSET,
-          (FFDC_REGION_QPMR_BASE_OFFSET + QPMR_HOMER_OFFSET))
 
 #endif /* __HCD_MEMMAP_BASE_H__ */
diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_pm_recovery_ffdc_base.C b/src/import/chips/p9/procedures/hwp/pm/p9_pm_recovery_ffdc_base.C
index dc866929a..bd6d30061 100644
--- a/src/import/chips/p9/procedures/hwp/pm/p9_pm_recovery_ffdc_base.C
+++ b/src/import/chips/p9/procedures/hwp/pm/p9_pm_recovery_ffdc_base.C
@@ -38,12 +38,16 @@
 #include <p9_pm_ocb_indir_access.H>
 #include <p9_cme_sram_access.H>
 #include <p9_pm_ocb_indir_setup_linear.H>
+#include <p9_ppe_utils.H>
 
 #include <endian.h>
 #include <stddef.h>
 
 namespace p9_stop_recov_ffdc
 {
+
+    //---------------------------------------------------------------------------------------------
+
     PlatPmComplex::PlatPmComplex( const fapi2::Target< fapi2::TARGET_TYPE_PROC_CHIP > i_procChipTgt,
                                   PmComplexPlatId i_plat, uint32_t i_imageHdrBaseAddr,
                                   uint32_t i_traceBufBaseAddr, uint32_t i_globalBaseAddr )
@@ -63,10 +67,10 @@ namespace p9_stop_recov_ffdc
         HomerFfdcRegion* l_pHomerFfdc = ( HomerFfdcRegion* )
              ((uint8_t*) i_pHomerBuf + FFDC_REGION_HOMER_BASE_OFFSET );
 
-        uint8_t* l_pFfdcLoc = (uint8_t*) (&l_pHomerFfdc->iv_pmFfdcHdrRegion);
-        PmFfdcHeader* l_pPmFfdcHdr = (PmFfdcHeader*)
-                                     ((PmFfdcHdrRegion*) l_pFfdcLoc);
-        uint32_t l_procPosition = 0xDEADC0DE;
+        uint8_t* l_pFfdcLoc         =  (uint8_t*) (&l_pHomerFfdc->iv_pmFfdcHdrRegion);
+        PmFfdcHeader* l_pPmFfdcHdr  =  (PmFfdcHeader*)
+                                       ((PmFfdcHdrRegion*) l_pFfdcLoc);
+        uint32_t l_procPosition     =  0xDEADC0DE;
 
         if (FAPI_ATTR_GET (fapi2::ATTR_FAPI_POS, iv_procChip, l_procPosition) !=
             fapi2::FAPI2_RC_SUCCESS)
@@ -74,18 +78,18 @@ namespace p9_stop_recov_ffdc
             FAPI_ERR ("Could not read ATTR_FAPI_POS for the chip!");
         }
 
-        l_pPmFfdcHdr->iv_magicNumber = htobe32 (FFDC_MAGIC_NUM);
-        l_pPmFfdcHdr->iv_versionMajor = 0x01;
-        l_pPmFfdcHdr->iv_versionMinor = 0x00;
-        l_pPmFfdcHdr->iv_headerSize = htobe16 (sizeof (PmFfdcHeader));
-        l_pPmFfdcHdr->iv_sectionSize = htobe32 (sizeof (HomerFfdcRegion));
-        l_pPmFfdcHdr->iv_procPosition = htobe32 (l_procPosition);
-        l_pPmFfdcHdr->iv_ffdcValid = 0x01;
-        l_pPmFfdcHdr->iv_phase = PM_RESET_FFDC_SEC_INIT;
-        l_pPmFfdcHdr->iv_errorMarker = htobe16 (0x0000);
-        l_pPmFfdcHdr->iv_sectionsValid = htobe16 (PM_FFDC_INVALID);
-
-        uint16_t l_sectionOffset = sizeof (PmFfdcHeader);
+        l_pPmFfdcHdr->iv_magicNumber    =   htobe32 (FFDC_MAGIC_NUM);
+        l_pPmFfdcHdr->iv_versionMajor   =   0x01;
+        l_pPmFfdcHdr->iv_versionMinor   =   0x00;
+        l_pPmFfdcHdr->iv_headerSize     =   htobe16 (sizeof (PmFfdcHeader));
+        l_pPmFfdcHdr->iv_sectionSize    =   htobe32 (sizeof (HomerFfdcRegion));
+        l_pPmFfdcHdr->iv_procPosition   =   htobe32 (l_procPosition);
+        l_pPmFfdcHdr->iv_ffdcValid      =   0x01;
+        l_pPmFfdcHdr->iv_phase          =   PM_RESET_FFDC_SEC_INIT;
+        l_pPmFfdcHdr->iv_errorMarker    =   htobe16 (0x0000);
+        l_pPmFfdcHdr->iv_sectionsValid  =   htobe16 (PM_FFDC_INVALID);
+
+        uint16_t l_sectionOffset        =   sizeof (PmFfdcHeader);
         l_pPmFfdcHdr->iv_firOffset = htobe16 (l_sectionOffset);
         l_sectionOffset+= sizeof (FirFfdcRegion);
 
@@ -95,13 +99,16 @@ namespace p9_stop_recov_ffdc
             l_sectionOffset += sizeof (HomerQuadFfdcRegion);
         }
 
-        l_pPmFfdcHdr->iv_sgpeOffset = htobe16 (l_sectionOffset);
-        l_sectionOffset += sizeof (PpeFfdcLayout);
-        l_pPmFfdcHdr->iv_pgpeOffset = htobe16 (l_sectionOffset);
-        l_sectionOffset += sizeof (PpeFfdcLayout);
-        l_pPmFfdcHdr->iv_occOffset = htobe16 (l_sectionOffset);
-        l_pPmFfdcHdr->iv_ccsr = 0; // @TODO via RTC 153978
-        l_pPmFfdcHdr->iv_qcsr = 0; // @TODO via RTC 153978
+        l_pPmFfdcHdr->iv_sgpeOffset =   htobe16 (l_sectionOffset);
+        l_sectionOffset             +=  sizeof (PpeFfdcLayout);
+        l_pPmFfdcHdr->iv_pgpeOffset =   htobe16 (l_sectionOffset);
+        l_sectionOffset             +=  sizeof (PpeFfdcLayout);
+        l_pPmFfdcHdr->iv_occOffset  =   htobe16 (l_sectionOffset);
+        l_pPmFfdcHdr->iv_ccsr       =   0; // @TODO via RTC 153978
+        l_pPmFfdcHdr->iv_qcsr       =   0; // @TODO via RTC 153978
+
+        //Eye catcher for Summary section
+        l_pHomerFfdc->iv_ffdcSummaryRegion.iv_summaryMagicWord  =   htobe32(FFDC_SUMM_MAGIC_NUM);
 
         FAPI_DBG( "================== PM FFDC Header ==========================" );
         FAPI_DBG( "Magic Number                 :   0x%08X", l_pPmFfdcHdr->iv_magicNumber );
@@ -129,6 +136,19 @@ namespace p9_stop_recov_ffdc
         FAPI_DBG ("<< PlatPmComplex::init");
         return fapi2::FAPI2_RC_SUCCESS;
     }
+    //---------------------------------------------------------------------------------------------
+
+    void PlatPmComplex::initRegList()
+    {
+        FAPI_DBG( ">> PlatPmComplex::initRegList" );
+        iv_summaryReg.clear();
+        iv_summaryReg.push_back( XSR );
+        iv_summaryReg.push_back( IAR );
+        iv_summaryReg.push_back( IR );
+        iv_summaryReg.push_back( EDR );
+        iv_summaryReg.push_back( SPRG0 );
+        FAPI_DBG( "<< PlatPmComplex::initRegList" );
+    }
 
     //---------------------------------------------------------------------------------------------
 
@@ -144,22 +164,113 @@ namespace p9_stop_recov_ffdc
     }
 
     //---------------------------------------------------------------------------------------------
+
+    uint32_t PlatPmComplex::extractPpeSummaryReg( uint8_t * i_pHomerBuf, const uint32_t i_regionLimit,
+                                                  uint8_t * o_ffdcSummary )
+    {
+        do
+        {
+            uint32_t l_regValue  =   htobe32(FFDC_REG_NOT_FOUND);
+
+            if( 0 == iv_summaryReg.size() )
+            {
+                FAPI_ERR("Error : Bad Initialization. Skipping Summary Generation" );
+                break;
+            }
+
+            uint32_t l_lookUpLimit      =    i_regionLimit / sizeof( PPERegValue_t );
+
+            for( auto &l_reg : iv_summaryReg )
+            {
+                PPERegValue_t * l_pXir  =    ( PPERegValue_t *) i_pHomerBuf;
+                uint32_t * l_tempWord   =    ( uint32_t * )o_ffdcSummary;
+                l_regValue              =    htobe32(FFDC_REG_NOT_FOUND);
+
+                for( uint32_t l_sizeIndex = 0; l_sizeIndex < l_lookUpLimit;
+                     l_sizeIndex++ )
+                {
+                    if( htobe16( l_pXir->number ) == l_reg )
+                    {
+                        l_regValue  =   l_pXir->value;
+                        break;
+                    }
+
+                    l_pXir++;
+                }
+
+                *l_tempWord     =   l_regValue;
+                o_ffdcSummary  +=   sizeof(uint32_t);
+            }
+
+        }while(0);
+
+        return 0; // return SUCCESS for now
+    }
+
+    //---------------------------------------------------------------------------------------------
+
+    uint32_t PlatPmComplex::extractScomSummaryReg( uint8_t * i_pHomerBuf, const uint32_t i_regionLimit,
+                                                   uint8_t * o_ffdcSummary )
+    {
+        do
+        {
+            uint64_t l_regValue     =   0;
+            uint32_t l_lookUpLimit  =   i_regionLimit / sizeof(FfdcScomEntry);
+
+            if( 0 == iv_summaryReg.size() )
+            {
+                FAPI_ERR("Error : Bad Initialization. Skipping Summary Generation" );
+                break;
+            }
+
+            for( auto &l_reg : iv_summaryReg )
+            {
+                FfdcScomEntry * l_pScomRegEntry     =   ( FfdcScomEntry * )i_pHomerBuf;
+                uint64_t * l_tempDbWord             =   ( uint64_t * )o_ffdcSummary;
+                l_regValue                          =   FFDC_REG_NOT_FOUND;
+                l_regValue                          =   l_regValue << 32;
+                l_regValue                         |=   FFDC_REG_NOT_FOUND;
+                l_regValue                          =   htobe64( l_regValue );
+
+                for( uint32_t l_sizeIndex = 0; l_sizeIndex < l_lookUpLimit;
+                     l_sizeIndex++ )
+                {
+
+                    if( l_reg == htobe32(l_pScomRegEntry->iv_scomAddress) )
+                    {
+                        FAPI_DBG( "SCOM Address 0x%08lx", htobe32( l_pScomRegEntry->iv_scomAddress ) );
+
+                        l_regValue      =   l_pScomRegEntry->iv_scomData;
+                        break;
+                    }
+
+                    l_pScomRegEntry++;
+                }
+
+                *l_tempDbWord   =   l_regValue;
+                o_ffdcSummary   +=  sizeof(uint64_t);
+            }
+
+        }while(0);
+
+        return 0; // return SUCCESS for now
+    }
+    //---------------------------------------------------------------------------------------------
     #ifndef __HOSTBOOT_MODULE   // for manual examination of info on cronus
 
     fapi2::ReturnCode PlatPmComplex::debugSramInfo( uint8_t * i_pSramLoc, uint32_t i_dataLen )
     {
         FAPI_DBG(">>PlatPmComplex::debugSramInfo");
-        uint32_t l_data = 0;
+        uint32_t l_data              =   0;
         uint32_t l_doubleWordLength  =   i_dataLen >> 3;
         uint64_t * l_pDoubleWord     =   (uint64_t *)i_pSramLoc;
-        uint64_t tempWord = 0;
+        uint64_t tempWord            =   0;
 
         for ( l_data = 0; l_data < l_doubleWordLength; l_data++ )
         {
-             tempWord    =   htobe64(*l_pDoubleWord);
-             *l_pDoubleWord    =   tempWord;
-              l_pDoubleWord++;
-
+             tempWord           =   htobe64(*l_pDoubleWord);
+             *l_pDoubleWord     =   tempWord;
+             l_pDoubleWord++;
         }
 
         return fapi2::FAPI2_RC_SUCCESS;
@@ -177,7 +288,7 @@ namespace p9_stop_recov_ffdc
         i_pFfdcHdr->iv_versionMinor      = 0;
         i_pFfdcHdr->iv_headerSize        = htobe16 (sizeof(PpeFfdcHeader));
         i_pFfdcHdr->iv_sectionSize       = htobe16 (sizeof(PpeFfdcLayout ));
-        i_pFfdcHdr->iv_sectionsValid         = htobe16 (i_sectionsValid);
+        i_pFfdcHdr->iv_sectionsValid     = htobe16 (i_sectionsValid);
         i_pFfdcHdr->iv_dashBoardOffset   = htobe16( offsetof( struct PpeFfdcLayout, iv_ppeGlobals[0]));
         i_pFfdcHdr->iv_sramHeaderOffset  = htobe16( offsetof( struct PpeFfdcLayout, iv_ppeImageHeader[0]));
         i_pFfdcHdr->iv_sprOffset         = htobe16( offsetof( struct PpeFfdcLayout, iv_ppeXirReg[0]));
@@ -291,24 +402,25 @@ namespace p9_stop_recov_ffdc
         l_pPpeRegVal = (PPERegValue_t*) &l_pPpeFfdc->iv_ppeXirReg[0];
         for ( auto& it : l_vXirs )
         {
-            l_pPpeRegVal->number = it.number;
-            l_pPpeRegVal->value = it.value;
+            l_pPpeRegVal->number    =   htobe16(it.number);
+            l_pPpeRegVal->value     =   htobe32(it.value);
+            FAPI_DBG("XIR Num 0x%04x Value 0x%08x",  l_pPpeRegVal->number, l_pPpeRegVal->value );
             ++l_pPpeRegVal;
         }
 
         l_pPpeRegVal = (PPERegValue_t*) &l_pPpeFfdc->iv_ppeSpr[0];
         for ( auto& it : l_vSprs )
         {
-            l_pPpeRegVal->number = it.number;
-            l_pPpeRegVal->value = it.value;
+            l_pPpeRegVal->number    =   htobe16(it.number);
+            l_pPpeRegVal->value     =   htobe32(it.value);
             ++l_pPpeRegVal;
         }
 
         l_pPpeRegVal = (PPERegValue_t*) &l_pPpeFfdc->iv_ppeGprs[0];
         for ( auto& it : l_vGprs )
         {
-            l_pPpeRegVal->number = it.number;
-            l_pPpeRegVal->value = it.value;
+            l_pPpeRegVal->number    =   htobe16(it.number);
+            l_pPpeRegVal->value     =   htobe32(it.value);
             ++l_pPpeRegVal;
         }
 
@@ -328,44 +440,36 @@ namespace p9_stop_recov_ffdc
     {
        FAPI_DBG(">> PlatPmComplex::collectSramInfo" );
 
-       uint32_t l_rows          =   i_sramLength / sizeof(uint64_t);
-       uint64_t * l_pSramBuf    =   (uint64_t *)(i_pSramData);
-       uint32_t l_actualDoubleWord = 0;
-       uint32_t l_sramAddress = 0;
+       uint32_t l_actualDoubleWord  =   0;
+       uint32_t l_sramAddress       =   0;
 
        switch( i_dataType )
        {
             case IMAGE_HEADER:
-                l_sramAddress = iv_imageHeaderBaseAddress;
+                l_sramAddress   =   iv_imageHeaderBaseAddress;
                 break;
             case DASH_BOARD_VAR:
-                l_sramAddress = iv_globalBaseAddress;
+                l_sramAddress   =   iv_globalBaseAddress;
                 break;
+
             case TRACES:
-                 l_sramAddress = iv_traceBufBaseAddress;
+                 l_sramAddress  =   iv_traceBufBaseAddress;
                 break;
+
             default:
                 FAPI_ERR("Bad FFDC Data type. Skipping 0x%d", (uint32_t)i_dataType );
                 goto fapi_try_exit;
                 break;
        }
 
-       FAPI_INF( "CME Start Add 0x%08x Length 0x%08x", l_sramAddress, i_sramLength );
+       FAPI_TRY( readSramInfo( i_exTgt,
+                               l_sramAddress,
+                               i_pSramData,
+                               i_sramLength,
+                               l_actualDoubleWord ) );
 
-       //handle SRAM
-
-       FAPI_TRY( p9_cme_sram_access( i_exTgt,
-                                     l_sramAddress,
-                                     l_rows,
-                                     l_pSramBuf,
-                                     l_actualDoubleWord ),
-                  "HWP to access CME SRAM Failed" );
-
-       #ifndef __HOSTBOOT_MODULE
-
-       debugSramInfo( i_pSramData, i_sramLength );
-
-       #endif
+       FAPI_INF( "CME Start Add 0x%08x Read Words %d ",
+                  l_sramAddress, l_actualDoubleWord );
 
        fapi_try_exit:
        FAPI_DBG("<< PlatPmComplex::collectSramInfo" );
@@ -381,54 +485,37 @@ namespace p9_stop_recov_ffdc
     {
        FAPI_DBG(">> PlatPmComplex::collectSramInfo" );
 
-       uint32_t l_rows          =   i_sramLength / sizeof(uint64_t);
-       uint64_t * l_pSramBuf    =   (uint64_t *)(i_pSramData);
-       uint32_t l_actualDoubleWord = 0;
-       uint32_t l_sramAddress = 0;
+       uint32_t l_actualDoubleWord  =   0;
+       uint32_t l_sramAddress       =   0;
 
        switch( i_dataType )
        {
             case IMAGE_HEADER:
                 l_sramAddress = iv_imageHeaderBaseAddress;
                 break;
+
             case DASH_BOARD_VAR:
                 l_sramAddress = iv_globalBaseAddress;
                 break;
+
             case TRACES:
                  l_sramAddress = iv_traceBufBaseAddress;
                 break;
+
             default:
                 FAPI_ERR("Bad FFDC Data type. Skipping 0x%d", (uint32_t)i_dataType );
                 goto fapi_try_exit;
                 break;
        }
 
-       //handle OCC SRAM
+       FAPI_TRY( readSramInfo( i_procTgt,
+                               l_sramAddress,
+                               i_pSramData,
+                               i_sramLength,
+                               l_actualDoubleWord ) );
 
-       FAPI_DBG("OCC SRAM Collection" );
-       FAPI_TRY( p9_pm_ocb_indir_setup_linear( iv_procChip,     // Compiler error  work around
-                                               p9ocb::OCB_CHAN0,
-                                               p9ocb::OCB_TYPE_LINSTR,
-                                               l_sramAddress ),
-                 "HWP To Setup OCB Indirect Access Failed" );
-
-       FAPI_TRY( p9_pm_ocb_indir_access ( iv_procChip,  //Compiler error workaround
-                                          p9ocb::OCB_CHAN0,
-                                          p9ocb::OCB_GET,
-                                          l_rows,
-                                          true,
-                                          l_sramAddress,
-                                          l_actualDoubleWord,
-                                          l_pSramBuf ),
-                 "HWP To Access OCC SRAM Failed" );
-
-        FAPI_DBG("Actual Length Read from OCC  SRAM is 0x%016lx", ( l_actualDoubleWord * sizeof(uint64_t)) );
-
-       #ifndef __HOSTBOOT_MODULE
-
-       debugSramInfo( i_pSramData, i_sramLength );
-
-       #endif
+       FAPI_DBG( "Start Add 0x%08x Read Words %d ",
+                  l_sramAddress, l_actualDoubleWord );
 
        fapi_try_exit:
        FAPI_DBG("<< PlatPmComplex::collectSramInfo" );
@@ -444,12 +531,12 @@ namespace p9_stop_recov_ffdc
     {
         FAPI_DBG(">> PlatPmComplex::updateFirFfdcHeader: Pos %d", i_pos );
 
-        FirFfdcHeader* l_FirFfdcHdr =  (FirFfdcHeader*) i_pFfdcHdr;
-        l_FirFfdcHdr->iv_magicWord =  htobe32 (FFDC_FIR_MAGIC_NUM);
-        l_FirFfdcHdr->iv_versionMajor = 1;
-        l_FirFfdcHdr->iv_versionMinor = 0;
-        l_FirFfdcHdr->iv_headerSize = htobe16 (sizeof(FirFfdcHeader));
-        l_FirFfdcHdr->iv_sectionSize =  htobe16 (sizeof(FirFfdcRegion));
+        FirFfdcHeader* l_FirFfdcHdr     =  (FirFfdcHeader*) i_pFfdcHdr;
+        l_FirFfdcHdr->iv_magicWord      =   htobe32 (FFDC_FIR_MAGIC_NUM);
+        l_FirFfdcHdr->iv_versionMajor   =   1;
+        l_FirFfdcHdr->iv_versionMinor   =   0;
+        l_FirFfdcHdr->iv_headerSize     =   htobe16 (sizeof(FirFfdcHeader));
+        l_FirFfdcHdr->iv_sectionSize    =   htobe16 (sizeof(FirFfdcRegion));
 
         if (i_pos < PM_FFDC_FIR_VALID_POS_MAX)
         {
@@ -476,8 +563,8 @@ namespace p9_stop_recov_ffdc
     //---------------------------------------------------------------------------------------------
 
     fapi2::ReturnCode PlatPmComplex::collectPartialFfdc( void * i_pBuf, FfdcDataType i_dataType,
-                                          fapi2::Target<fapi2::TARGET_TYPE_EX >& i_exTgt,
-                                          uint32_t & o_ffdcLength )
+                                                         fapi2::Target<fapi2::TARGET_TYPE_EX >& i_exTgt,
+                                                         uint32_t & o_ffdcLength )
     {
         return fapi2::FAPI2_RC_SUCCESS;
     }
@@ -485,13 +572,91 @@ namespace p9_stop_recov_ffdc
     //---------------------------------------------------------------------------------------------
 
     fapi2::ReturnCode PlatPmComplex::collectPartialFfdc( void * i_pBuf, FfdcDataType i_dataType,
-                                          uint32_t & o_ffdcLength )
+                                                         uint32_t & o_ffdcLength )
     {
         return fapi2::FAPI2_RC_SUCCESS;
     }
 
     //---------------------------------------------------------------------------------------------
 
+    fapi2::ReturnCode PlatPmComplex::generateSummary( void * i_pHomer )
+    {
+        return fapi2::FAPI2_RC_SUCCESS;
+    }
+
+    //---------------------------------------------------------------------------------------------
+
+    fapi2::ReturnCode PlatPmComplex::readSramInfo(  const fapi2::Target< fapi2::TARGET_TYPE_EX >& i_exTgt,
+                                                     uint32_t i_sramAddress,
+                                                     uint8_t * i_pSramData,
+                                                     uint32_t i_length,
+                                                     uint32_t & o_doubleWordsRead )
+    {
+
+       FAPI_DBG(" >> readSramInfo" );
+       uint64_t * l_pSramData   =   (uint64_t *) i_pSramData;
+       uint32_t l_rows          =   i_length / sizeof(uint64_t);
+
+       FAPI_TRY( p9_cme_sram_access( i_exTgt,
+                                     i_sramAddress,
+                                     l_rows,
+                                     l_pSramData,
+                                     o_doubleWordsRead ),
+                  "HWP to access CME SRAM Failed" );
+
+       #ifndef __HOSTBOOT_MODULE
+
+       debugSramInfo( i_pSramData, i_length );
+
+       #endif
+       fapi_try_exit:
+       FAPI_DBG(" << readSramInfo" );
+       return fapi2::current_err;
+    }
+
+    //---------------------------------------------------------------------------------------------
+
+    fapi2::ReturnCode PlatPmComplex::readSramInfo(  const fapi2::Target< fapi2::TARGET_TYPE_PROC_CHIP >& i_procChip,
+                                                     uint32_t i_sramAddress,
+                                                     uint8_t  * i_pSramData,
+                                                     uint32_t i_length,
+                                                     uint32_t & o_doubleWordRead )
+    {
+       FAPI_DBG(" >> readSramInfo" );
+       uint64_t * l_pSramData   =   (uint64_t *) i_pSramData;
+       uint32_t l_rows          =   i_length / sizeof(uint64_t);
+       o_doubleWordRead         =   0;
+
+       //Finding out trace buffer address
+       FAPI_TRY( p9_pm_ocb_indir_setup_linear( i_procChip,
+                                               p9ocb::OCB_CHAN0,
+                                               p9ocb::OCB_TYPE_LINSTR,
+                                               i_sramAddress ),
+                 "HWP To Setup OCB Indirect Access Failed" );
+
+       FAPI_TRY( p9_pm_ocb_indir_access ( i_procChip,
+                                          p9ocb::OCB_CHAN0,
+                                          p9ocb::OCB_GET,
+                                          l_rows,
+                                          true,
+                                          i_sramAddress,
+                                          o_doubleWordRead,
+                                          l_pSramData ),
+                 "HWP To Access OCC SRAM Failed" );
+
+       #ifndef __HOSTBOOT_MODULE
+
+       debugSramInfo( i_pSramData, i_length );
+
+       #endif
+
+       fapi_try_exit:
+       FAPI_DBG(" << readSramInfo" );
+       return fapi2::current_err;
+    }
+
+    //---------------------------------------------------------------------------------------------
+
 extern "C"
 {
     fapi2::ReturnCode p9_pm_recovery_ffdc_base (
diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_pm_recovery_ffdc_base.H b/src/import/chips/p9/procedures/hwp/pm/p9_pm_recovery_ffdc_base.H
index 4e9ca5f06..4f1769728 100644
--- a/src/import/chips/p9/procedures/hwp/pm/p9_pm_recovery_ffdc_base.H
+++ b/src/import/chips/p9/procedures/hwp/pm/p9_pm_recovery_ffdc_base.H
@@ -52,16 +52,16 @@ namespace p9_stop_recov_ffdc
     {
         public:
             /// @brief  constructor
-            /// @param[in]  i_procChipTgt       fapi2 target for P9 chip
-            /// @param[in]  i_plat              platform id
-            /// @param[in]  i_imageHdrBaseAddr  sram address of start of image header
-            /// @param[in]  i_traceBufBaseAddr  sram address of start of trace buffer
-            /// @param[in]  i_globalBaseAddr    sram address of start of global variables
+            /// @param[in]  i_procChipTgt           fapi2 target for P9 chip
+            /// @param[in]  i_plat                  platform id
+            /// @param[in]  i_imageHdrBaseAddr      sram address of start of image header
+            /// @param[in]  i_traceBufBaseAddress   address of pointer to trace buffer and size
+            /// @param[in]  i_globalBaseAddr        sram address of start of global variables
             PlatPmComplex( const fapi2::Target< fapi2::TARGET_TYPE_PROC_CHIP >
                                     i_procChipTgt,
                            PmComplexPlatId i_plat = PLAT_NONE,
                            uint32_t i_imageHdrBaseAddr = 0,
-                           uint32_t i_traceBufBaseAddr = 0,
+                           uint32_t i_traceBufBaseAddress = 0,
                            uint32_t i_globalBaseAddr = 0 );
 
             /// @brief  destructor
@@ -108,11 +108,38 @@ namespace p9_stop_recov_ffdc
             void setTraceBufAddr (uint32_t i_addr)
             { iv_traceBufBaseAddress = i_addr; }
 
+            ///@brief returns trace buffer/ptr  address
+            uint32_t getTraceBufAddr() { return iv_traceBufBaseAddress; };
+
             ///@brief returns instance id.
             PmComplexPlatId getPlatId() { return iv_plat ; }
 
+            /// @brief      generates summary of FFDC pertaining to a given platform.
+            /// @param[in]  i_pHomer    points to Homer base.
+            /// @return     fapi2 return code
+            virtual fapi2::ReturnCode generateSummary( void * i_pHomer );
+
+            ///@brief initializes a list of register for generation of FFDC summary.
+            void initRegList();
+
         protected:
 
+            /// @brief  parses a region of HOMER to extract PPE registers
+            /// @param[in]  i_pHomerBuf     points to HOMER base
+            /// @param[in]  i_regionLimit   size of memory region in which register is to be looked up.
+            /// @param[in]  o_ffdcSummary   location in the FFDC summary region
+            /// @return     SUCCESS on success else an error code
+            uint32_t extractPpeSummaryReg( uint8_t * i_pHomerBuf, const uint32_t i_regionLimit,
+                                           uint8_t * o_ffdcSummary );
+
+            /// @brief  parses a region of HOMER to extract SCOM registers
+            /// @param[in]  i_pHomerBuf     points to HOMER base
+            /// @param[in]  i_regionLimit   size of memory region in which register is to be looked up.
+            /// @param[in]  o_ffdcSummary   location in the FFDC summary region
+            /// @return     SUCCESS on success else an error code
+            uint32_t extractScomSummaryReg( uint8_t * i_pHomerBuf, const uint32_t i_regionLimit,
+                                            uint8_t * o_ffdcSummary );
+
            ///@brief sets the validity of a section in the PmFfdcHeader
            ///@param[in]    i_pHomerBuf Base address of PM FFDC in HOMER
            ///@param[in]    i_pmFfdcSectionState See PmFfdcSectionState
@@ -185,6 +212,37 @@ namespace p9_stop_recov_ffdc
             fapi2::ReturnCode collectRegisterData( const fapi2::Target<T>& i_chipletTarget,
                                                    uint8_t* o_pHomerBuf,
                                                    fapi2::HwpFfdcId i_ffdcId);
+
+            ///@brief   reads info from OCC SRAM.
+            ///@param[in]   i_procChip          fapi2 target for proc chip
+            ///@param[in]   i_pSramAddress      start address for reading SRAM
+            ///@param[in]   i_pSramData         pointer to data to be read from SRAM
+            ///@param[in]   i_sramLen           length of data read from SRAM.
+            ///@param[in]   o_doubleWordRead    number of double word actually read from SRAM.
+            ///@return      fapi2 return code
+            fapi2::ReturnCode readSramInfo(  const fapi2::Target< fapi2::TARGET_TYPE_PROC_CHIP >& i_procChip,
+                                             uint32_t  i_sramAddress,
+                                             uint8_t * i_pSramData,
+                                             uint32_t  i_sramLen,
+                                             uint32_t &o_doubleWordRead );
+
+            ///@brief   reads info from CME SRAM.
+            ///@param[in]   i_exTgt             fapi2 target for ex Chiplet
+            ///@param[in]   i_pSramAddress      start address for reading SRAM
+            ///@param[in]   i_pSramData         pointer to data read from SRAM
+            ///@param[in]   i_sramLen           length of data to be read from SRAM.
+            ///@param[in]   o_doubleWordRead    number of double word actually read from SRAM.
+            ///@return      fapi2 return code
+            fapi2::ReturnCode readSramInfo(  const fapi2::Target< fapi2::TARGET_TYPE_EX >& i_exTgt,
+                                             uint32_t  i_sramAddress,
+                                             uint8_t * i_pSramData,
+                                             uint32_t  i_sramLen,
+                                             uint32_t  &o_doubleWordRead );
+
+            ///@brief overrides the list of register addresses used for summary generation.
+            ///@brief   i_regAddrList[in]   new list of register addresses for summary.
+            void updateSummaryList( const std::vector<uint32_t> & i_regAddrList ) { iv_summaryReg = i_regAddrList; }
+
             #ifndef __HOSTBOOT_MODULE
             ///@brief to debug FFDC contents collected from SRAM.
             ///param[in]    i_pSram     points to location of SRAM info in HOMER.
@@ -199,6 +257,7 @@ namespace p9_stop_recov_ffdc
             uint32_t iv_traceBufBaseAddress;        // base address of platforms's trace buffer
             uint32_t iv_globalBaseAddress;          // base address of platform's global variables
             PmComplexPlatId iv_plat;
+            std::vector<uint32_t> iv_summaryReg;
     };
 
     //---------------------------------------------------------------------------------------------
diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_pm_recovery_ffdc_cme.C b/src/import/chips/p9/procedures/hwp/pm/p9_pm_recovery_ffdc_cme.C
index 2b6f5cc0f..cd9fea11a 100644
--- a/src/import/chips/p9/procedures/hwp/pm/p9_pm_recovery_ffdc_cme.C
+++ b/src/import/chips/p9/procedures/hwp/pm/p9_pm_recovery_ffdc_cme.C
@@ -42,13 +42,16 @@
 
 #include <p9_pm_recovery_ffdc_cme.H>
 #include <p9_hcd_memmap_cme_sram.H>
+#include <p9_quad_scom_addresses.H>
 #include <collect_reg_ffdc.H>
 #include <p9_ppe_defs.H>
+#include <p9_ppe_utils.H>
 #include <stddef.h>
 #include <endian.h>
 
  namespace p9_stop_recov_ffdc
  {
+
     PlatCme::PlatCme( const fapi2::Target< fapi2::TARGET_TYPE_PROC_CHIP > i_procChipTgt )
       : PlatPmComplex( i_procChipTgt,
                        PLAT_CME,
@@ -87,6 +90,7 @@
         HomerFfdcRegion * l_pHomerFfdc =
                 ( HomerFfdcRegion *)( (uint8_t *)i_pHomerBuf + FFDC_REGION_HOMER_BASE_OFFSET );
 
+
         for( auto ex : l_exList )
         {
             FAPI_TRY( FAPI_ATTR_GET( fapi2::ATTR_CHIP_UNIT_POS, ex, l_cmePos ),
@@ -220,6 +224,11 @@
 
         }
 
+        if( !(i_ffdcType & INIT ) )
+        {
+            generateSummary( i_pHomerBuf );
+        }
+
     fapi_try_exit:
         FAPI_DBG("<< PlatCme::collectFfdc");
         return fapi2::current_err;
@@ -281,16 +290,30 @@
                                              const fapi2::Target<fapi2::TARGET_TYPE_EX >& i_exTgt  )
     {
         FAPI_DBG(">> PlatCme::collectTrace" );
-        PpeFfdcLayout * l_pCmeFfdc = ( PpeFfdcLayout *) ( i_pTraceBuf );
-
-        uint8_t * l_pTraceLoc = &l_pCmeFfdc->iv_ppeTraces[0];
-
-        FAPI_TRY( PlatPmComplex::collectSramInfo
-                    ( i_exTgt,
-                      l_pTraceLoc,
-                      TRACES,
-                      FFDC_PPE_TRACES_SIZE ),
-                  "Trace Collection Failed" );
+        PpeFfdcLayout * l_pCmeFfdc  =   ( PpeFfdcLayout *) ( i_pTraceBuf );
+        uint8_t * l_pTraceLoc       =   &l_pCmeFfdc->iv_ppeTraces[0];
+        uint64_t l_traceBufHdr      =   0;
+        uint32_t l_traceBufAddress  =   0;
+        uint32_t l_doubleWordsRead  =   0;
+
+        FAPI_TRY( PlatPmComplex::readSramInfo(  i_exTgt,
+                                                getTraceBufAddr(),
+                                                (uint8_t *)&l_traceBufHdr,
+                                                8,
+                                                l_doubleWordsRead ),
+                  "Trace Buf Ptr Collection Failed" );
+
+        l_traceBufHdr       =   htobe64(l_traceBufHdr);
+        l_traceBufAddress   =   (uint32_t) l_traceBufHdr;
+
+        FAPI_DBG( "Trace Buf Address 0x%08x Double Word 0x%016lx", l_traceBufAddress, l_traceBufHdr );
+
+        FAPI_TRY( PlatPmComplex::readSramInfo(  i_exTgt,
+                                                l_traceBufAddress,
+                                                l_pTraceLoc,
+                                                FFDC_PPE_TRACES_SIZE,
+                                                l_doubleWordsRead ),
+                  "Trace Bin Collection Failed" );
 
     fapi_try_exit:
         FAPI_DBG("<< PlatCme::collectTrace" );
@@ -378,6 +401,60 @@
         FAPI_DBG("<< updateCmeFfdcHeader" );
         return fapi2::FAPI2_RC_SUCCESS;
     }
+
+    //-----------------------------------------------------------------------
+
+    fapi2::ReturnCode PlatCme::generateSummary( void * i_pHomerBuf )
+    {
+        FAPI_DBG(">> PlatCme::generateSummary" );
+
+        HomerFfdcRegion * l_pHomerFfdc =
+                ( HomerFfdcRegion *)( (uint8_t *)i_pHomerBuf + FFDC_REGION_HOMER_BASE_OFFSET );
+
+        PlatPmComplex::initRegList();
+
+        for( uint32_t l_exPos = 0; l_exPos < MAX_CMES_PER_CHIP; l_exPos++ )
+        {
+            uint8_t l_quadPos       =   l_exPos >> 1;
+            uint8_t l_relativeExPos =   l_exPos & 0x01;
+            PpeFfdcLayout * l_pCmeLayout  =
+                    ( PpeFfdcLayout *)&l_pHomerFfdc->iv_quadFfdc[l_quadPos].iv_quadCmeBlock[l_relativeExPos][0];
+            uint8_t *l_pCmeXir      =   &l_pCmeLayout->iv_ppeXirReg[0];
+            uint8_t *l_pCmeSummary  =   &l_pHomerFfdc->iv_ffdcSummaryRegion.iv_cmeSummary[l_exPos][FFDC_SUMMARY_SEC_HDR_SIZE];
+            FfdcScomEntry * l_pCmeLfirEntry  =
+                        ( FfdcScomEntry* )&l_pHomerFfdc->iv_firFfdcRegion.iv_firCmeBlock[l_exPos][0];
+            SysState * l_pSysState = &l_pHomerFfdc->iv_ffdcSummaryRegion.iv_sysState;
+
+            FfdcSummSubSectHdr * l_pCmeSummaryHdr   =
+                                       ( FfdcSummSubSectHdr *) &l_pHomerFfdc->iv_ffdcSummaryRegion.iv_cmeSummary[l_exPos][0];
+            l_pHomerFfdc->iv_ffdcSummaryRegion.iv_cmeScoreBoard[l_exPos].iv_dataPtr     =   &l_pCmeLayout->iv_ppeGlobals[0];
+            l_pHomerFfdc->iv_ffdcSummaryRegion.iv_cmeScoreBoard[l_exPos].iv_dataSize    =   FFDC_PPE_SCORE_BOARD_SIZE;
+
+            l_pCmeSummaryHdr->iv_subSectnId     =   PLAT_CME;
+            l_pCmeSummaryHdr->iv_majorNum       =   1;
+            l_pCmeSummaryHdr->iv_minorNum       =   0;
+            l_pCmeSummaryHdr->iv_secValid       =   l_pCmeLayout->iv_ppeFfdcHdr.iv_ppeFfdcHdr.iv_sectionsValid;
+
+            if( !l_pCmeSummaryHdr->iv_secValid )
+            {
+                FAPI_DBG("Skipping CME %d For Summary", l_exPos );
+                continue;
+            }
+
+            memcpy( &l_pSysState->iv_cmeFirs[l_exPos][0],
+                    &l_pCmeLfirEntry->iv_scomData,
+                    FFDC_SUMMARY_SCOM_REG_SIZE );
+
+            PlatPmComplex::extractPpeSummaryReg( l_pCmeXir,
+                                                 FFDC_PPE_XIR_SIZE,
+                                                 l_pCmeSummary );
+        }
+
+        FAPI_DBG("<< PlatCme::generateSummary" );
+
+        return fapi2::FAPI2_RC_SUCCESS;
+    }
+
     //-----------------------------------------------------------------------
 
 extern "C"
diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_pm_recovery_ffdc_cme.H b/src/import/chips/p9/procedures/hwp/pm/p9_pm_recovery_ffdc_cme.H
index 0538bebaa..1f3c45dc9 100644
--- a/src/import/chips/p9/procedures/hwp/pm/p9_pm_recovery_ffdc_cme.H
+++ b/src/import/chips/p9/procedures/hwp/pm/p9_pm_recovery_ffdc_cme.H
@@ -78,6 +78,10 @@ namespace p9_stop_recov_ffdc
             fapi2::ReturnCode collectPartialFfdc( void * i_pBuf, FfdcDataType i_dataType,
                                                   fapi2::Target<fapi2::TARGET_TYPE_EX >& i_exTgt,
                                                   uint32_t & o_ffdcLength );
+            /// @brief      generates summary of FFDC pertaining to a given platform.
+            /// @param[in]  i_pHomer    points to Homer base.
+            /// @return     fapi2 return code
+            fapi2::ReturnCode generateSummary( void * i_pHomer );
 
         private:
             /// @brief      collects trace info from a given CME SRAM buffer.
@@ -113,13 +117,31 @@ namespace p9_stop_recov_ffdc
             ///@return      fapi2 return code.
             fapi2::ReturnCode updateCmeFfdcHeader( uint8_t* i_pHomerBuf, uint8_t i_cmePos,
                                                    uint16_t i_sectionsValid );
+
     };
 
-extern "C"
-{
+    //---------------------------------------------------------------------------------------------
+    // function pointer typedef definition for HWP call support
     typedef fapi2::ReturnCode( *p9_pm_recovery_ffdc_cme_FP_t )
             ( const fapi2::Target< fapi2::TARGET_TYPE_PROC_CHIP > & i_procChipTgt,
               void * i_cmeFfdcBuf );
+extern "C"
+{
+
+    // -----------------------------------------------------------------------------
+    // Function prototypes
+    // -----------------------------------------------------------------------------
+    ///
+    /// @brief Populates the PM FFDC section with FFDC collected from CME.
+    ///
+    /// @param[in] i_procChipTarget Proc Chip target
+    /// @param[in] i_pHomerImage    Pointer to the base of the chip HOMER region
+    ///
+    /// @return FAPI2_RC_SUCCESS on success or error return code
+    ///
+        fapi2::ReturnCode p9_pm_recovery_ffdc_cme
+        ( const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_procChipTarget,
+          void* i_pHomerImage );
 }
 
 } //namespace p9_stop_recov_ffdc ends
diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_pm_recovery_ffdc_cme.mk b/src/import/chips/p9/procedures/hwp/pm/p9_pm_recovery_ffdc_cme.mk
index d2de53b3f..061919f09 100644
--- a/src/import/chips/p9/procedures/hwp/pm/p9_pm_recovery_ffdc_cme.mk
+++ b/src/import/chips/p9/procedures/hwp/pm/p9_pm_recovery_ffdc_cme.mk
@@ -5,7 +5,7 @@
 #
 # OpenPOWER HostBoot Project
 #
-# Contributors Listed Below - COPYRIGHT 2017
+# Contributors Listed Below - COPYRIGHT 2017,2018
 # [+] International Business Machines Corp.
 #
 #
@@ -25,6 +25,7 @@
 PROCEDURE=p9_pm_recovery_ffdc_cme
 CME_FFDC_INC=$(ROOTPATH)/chips/p9/procedures/hwp/pm/
 CME_FFDC_INC+=$(ROOTPATH)/chips/p9/procedures/hwp/lib
+CME_FFDC_INC+=$(ROOTPATH)/chips/p9/common/pmlib/include/registers
 lib$(PROCEDURE)_DEPLIBS+=p9_pm_recovery_ffdc_base
 lib$(PROCEDURE)_DEPLIBS+=p9_pm_ocb_indir_setup_linear
 lib$(PROCEDURE)_DEPLIBS+=p9_cme_sram_access
diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_pm_recovery_ffdc_cppm.C b/src/import/chips/p9/procedures/hwp/pm/p9_pm_recovery_ffdc_cppm.C
index ba0d3727c..d63366c36 100644
--- a/src/import/chips/p9/procedures/hwp/pm/p9_pm_recovery_ffdc_cppm.C
+++ b/src/import/chips/p9/procedures/hwp/pm/p9_pm_recovery_ffdc_cppm.C
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* OpenPOWER HostBoot Project                                             */
 /*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2017                             */
+/* Contributors Listed Below - COPYRIGHT 2017,2018                        */
 /* [+] International Business Machines Corp.                              */
 /*                                                                        */
 /*                                                                        */
@@ -40,6 +40,7 @@
 // Includes
 //--------------------------------------------------------------------------
 
+#include <p9_quad_scom_addresses.H>
 #include <p9_pm_recovery_ffdc_cppm.H>
 #include <collect_reg_ffdc.H>
 #include <stddef.h>
@@ -53,6 +54,16 @@
 
     //----------------------------------------------------------------------
 
+    void CppmRegs::initRegList()
+    {
+        std::vector < uint32_t> l_scomRegList;
+        l_scomRegList.push_back( C_PPM_SSHSRC );
+        l_scomRegList.push_back( C_PPM_VDMCR );
+        PlatPmComplex::updateSummaryList( l_scomRegList );
+    }
+
+    //----------------------------------------------------------------------
+
     fapi2::ReturnCode CppmRegs::init ( void* i_pHomerBuf )
     {
         FAPI_DBG (">> CppmRegs::init" );
@@ -134,6 +145,12 @@
                                "Failed To Update Quad FFDC Header for EQ 0x%0d", l_quadPos );
 
             setPmFfdcSectionValid ( i_pHomerBuf, (PM_FFDC_QUAD0_VALID << l_quadPos), l_quadFfdcValid);
+
+        }
+
+        if( !(i_ffdcType & INIT) )
+        {
+            generateSummary( i_pHomerBuf );
         }
 
     fapi_try_exit:
@@ -143,7 +160,7 @@
 
     //-----------------------------------------------------------------------
 
-    fapi2::ReturnCode CppmRegs::updateCppmFfdcHeader( uint8_t* i_pHomerBuf,
+    fapi2::ReturnCode CppmRegs::updateCppmFfdcHeader( uint8_t * i_pHomerBuf,
                                                       const uint8_t i_corePos,
                                                       const uint16_t i_ffdcValid)
     {
@@ -151,8 +168,8 @@
 
         PpmFfdcHeader * l_CppmFfdcHdr       =   (PpmFfdcHeader *) i_pHomerBuf ;
         l_CppmFfdcHdr->iv_ppmMagicWord      =  htobe32(FFDC_CPPM_MAGIC_NUM);
-        l_CppmFfdcHdr->iv_versionMajor = 1;
-        l_CppmFfdcHdr->iv_versionMinor = 0;
+        l_CppmFfdcHdr->iv_versionMajor      =  1;
+        l_CppmFfdcHdr->iv_versionMinor      =  0;
         l_CppmFfdcHdr->iv_Instance          =  i_corePos; // CHIP_UNIT_POS
         l_CppmFfdcHdr->iv_ppmHeaderSize     =  htobe16 (sizeof(PpmFfdcHeader));
         l_CppmFfdcHdr->iv_sectionSize       =  htobe16 (FFDC_CPPM_REGION_SIZE);
@@ -197,6 +214,49 @@
         return fapi2::FAPI2_RC_SUCCESS;
     }
 
+    //-----------------------------------------------------------------------
+
+    fapi2::ReturnCode CppmRegs::generateSummary( void * i_pHomer )
+    {
+        HomerFfdcRegion * l_pHomerFfdc =
+                ( HomerFfdcRegion *)( (uint8_t *)i_pHomer + FFDC_REGION_HOMER_BASE_OFFSET );
+        uint8_t* l_pCppmFfdcLoc    = NULL;
+        PpmFfdcHeader * l_pCppmHdr = NULL;
+        uint8_t * l_pCppmSummary   = NULL;
+        uint8_t l_quadPos          = 0;
+        uint8_t l_relCorePos       = 0;
+
+        initRegList();
+        uint32_t l_sizeLimit = FFDC_CPPM_REGION_SIZE - sizeof( PpmFfdcHeader );
+
+        for( uint8_t l_ppmPos = 0; l_ppmPos < MAX_CORES_PER_CHIP; l_ppmPos++ )
+        {
+            l_relCorePos    =   l_ppmPos % MAX_CORES_PER_QUAD;
+            l_quadPos       =   l_ppmPos >> 2;
+            l_pCppmFfdcLoc  =
+                &l_pHomerFfdc->iv_quadFfdc[l_quadPos].iv_quadCppmRegion[l_relCorePos][0];
+            l_pCppmSummary  =   &l_pHomerFfdc->iv_ffdcSummaryRegion.iv_cpmmRegSummary[l_ppmPos][FFDC_SUMMARY_SEC_HDR_SIZE];
+            l_pCppmHdr      =   ( PpmFfdcHeader *) &l_pHomerFfdc->iv_quadFfdc[l_quadPos].iv_quadCppmRegion[l_relCorePos][0];
+            FfdcSummSubSectHdr * l_pCppmSummaryHdr   =
+                        (FfdcSummSubSectHdr *)&l_pHomerFfdc->iv_ffdcSummaryRegion.iv_cpmmRegSummary[l_ppmPos][0];
+            l_pCppmSummaryHdr->iv_subSectnId    =   PLAT_CPPM;
+            l_pCppmSummaryHdr->iv_majorNum      =   1;
+            l_pCppmSummaryHdr->iv_minorNum      =   0;
+            l_pCppmSummaryHdr->iv_secValid      =   htobe16( l_pCppmHdr->iv_ffdcValid );
+
+            if( !l_pCppmSummaryHdr->iv_secValid )
+            {
+                continue;
+            }
+
+            PlatPmComplex::extractScomSummaryReg( l_pCppmFfdcLoc + sizeof(PpmFfdcHeader),
+                                                  l_sizeLimit, l_pCppmSummary );
+        }
+
+        return fapi2::FAPI2_RC_SUCCESS;
+    }
+
+    //-----------------------------------------------------------------------
 
 extern "C"
 {
diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_pm_recovery_ffdc_cppm.H b/src/import/chips/p9/procedures/hwp/pm/p9_pm_recovery_ffdc_cppm.H
index ec8db9455..268385573 100644
--- a/src/import/chips/p9/procedures/hwp/pm/p9_pm_recovery_ffdc_cppm.H
+++ b/src/import/chips/p9/procedures/hwp/pm/p9_pm_recovery_ffdc_cppm.H
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* OpenPOWER HostBoot Project                                             */
 /*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2017                             */
+/* Contributors Listed Below - COPYRIGHT 2017,2018                        */
 /* [+] International Business Machines Corp.                              */
 /*                                                                        */
 /*                                                                        */
@@ -67,14 +67,22 @@ namespace p9_stop_recov_ffdc
             fapi2::ReturnCode collectFfdc ( void*    i_pHomerBuf,
                                             uint8_t  i_ffdcType = ALL );
 
+            /// @brief      generates summary of FFDC pertaining to a given platform.
+            /// @param[in]  i_pHomer    points to Homer base.
+            /// @return     fapi2 return code
+            fapi2::ReturnCode generateSummary( void * i_pHomer );
         private:
+
+            ///@brief initializes a list of register for generation of FFDC summary.
+            void initRegList();
+
             /// @brief updates the CPPM FFDC Header
             ///@param[in]   i_pHomerBuf     points to a location in HOMER meant for CPPM Header
             ///@param[in]   i_CppmInstance  CPPM instance
             ///@param[in]   i_ffdcValid     non-zero indicates the CPPM FFDC is valid
             ///@return      fapi2 return code.
 
-            fapi2::ReturnCode updateCppmFfdcHeader( uint8_t * i_pHomerBuf, 
+            fapi2::ReturnCode updateCppmFfdcHeader( uint8_t * i_pHomerBuf,
                                                     const uint8_t i_cppmInstance,
                                                     const uint16_t i_ffdcValid);
             /// @brief updates the QUAD FFDC Header
@@ -83,16 +91,34 @@ namespace p9_stop_recov_ffdc
             ///@param[in]   i_ffdcValid     non-zero indicates the Quad FFDC is valid
             ///@return      fapi2 return code.
 
-            fapi2::ReturnCode updateQuadFfdcHeader( uint8_t * i_pHomerBuf, 
+            fapi2::ReturnCode updateQuadFfdcHeader( uint8_t * i_pHomerBuf,
                                                     const uint8_t i_quadInstance,
                                                     const uint16_t i_ffdcValid);
+        private:
+            std::vector<uint32_t> iv_cppmSummaryReg;
     };
 
-extern "C"
-{
+    //---------------------------------------------------------------------------------------------
+    // function pointer typedef definition for HWP call support
     typedef fapi2::ReturnCode( *p9_pm_recovery_ffdc_cppm_FP_t )
             ( const fapi2::Target< fapi2::TARGET_TYPE_PROC_CHIP > & i_procChipTgt,
               void * i_cppmFfdcBuf );
+extern "C"
+{
+    // -----------------------------------------------------------------------------
+    // Function prototypes
+    // -----------------------------------------------------------------------------
+    ///
+    /// @brief Populates the PM FFDC section with FFDC collected from CPPM
+    ///
+    /// @param[in] i_procChipTarget Proc Chip target
+    /// @param[in] i_pHomerImage    Pointer to the base of the chip HOMER region
+    ///
+    /// @return FAPI2_RC_SUCCESS on success or error return code
+    ///
+        fapi2::ReturnCode p9_pm_recovery_ffdc_cppm
+        ( const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_procChipTarget,
+          void* i_pHomerImage );
 }
 
 } //namespace p9_stop_recov_ffdc ends
diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_pm_recovery_ffdc_defines.H b/src/import/chips/p9/procedures/hwp/pm/p9_pm_recovery_ffdc_defines.H
index 502dbbac7..bd62e0605 100644
--- a/src/import/chips/p9/procedures/hwp/pm/p9_pm_recovery_ffdc_defines.H
+++ b/src/import/chips/p9/procedures/hwp/pm/p9_pm_recovery_ffdc_defines.H
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* OpenPOWER HostBoot Project                                             */
 /*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2015,2017                        */
+/* Contributors Listed Below - COPYRIGHT 2015,2018                        */
 /* [+] International Business Machines Corp.                              */
 /*                                                                        */
 /*                                                                        */
@@ -163,6 +163,14 @@ enum PpeHaltCondition
     PPE_HALT_COND_UNKNOWN = 0xFF  // Could not read or interpret XSR
 };
 
+/**
+ * @brief enumberates FFDC validity status.
+ */
+enum
+{
+    FFDC_SUMMARY_SUB_SEC_VALID      =   1,
+    FFDC_SUMMARY_SUB_SEC_INVALID    =   0,
+};
 
 /**
  * @brief   Top level header of the PM Complex FFDC in HOMER
@@ -268,6 +276,15 @@ const uint16_t PM_FFDC_FIR_VALID_POS_0 = 0x8000;
 const uint8_t PM_FFDC_FIR_VALID_POS_MAX = 13;
 const uint8_t PM_FFDC_FIR_VALID_POS_OCC = 12;
 
+/**
+ * @brief Models a SCOM register entry in FFDC
+ */
+struct __attribute__((packed)) FfdcScomEntry
+{
+    uint32_t iv_scomAddress;
+    uint64_t iv_scomData;
+};
+
 struct __attribute__((packed)) FirFfdcHeader
 {
     uint32_t iv_magicWord;
@@ -396,6 +413,54 @@ struct __attribute__((packed)) FirFfdcRegion
 };
 
 /**
+ * @brief   models the header for FFDC summary sub-section .
+ */
+struct __attribute__((packed)) FfdcSummSubSectHdr
+{
+    uint8_t  iv_subSectnId;
+    uint8_t  iv_majorNum;
+    uint8_t  iv_minorNum;
+    uint8_t  iv_secValid;
+};
+
+/**
+ * @brief   models the FFDC Summary sub-region containing system config and error info.
+ */
+struct __attribute__((packed)) SysState
+{
+    FfdcSummSubSectHdr iv_subSecHdr;
+    uint8_t  iv_cmeFirs[MAX_CMES_PER_CHIP][FFDC_SUMMARY_SCOM_REG_SIZE];
+    uint8_t  iv_occPbaFir[FFDC_SUMMARY_OCC_PBA_FIR_SIZE];
+    uint8_t  iv_configReg[FFDC_SUMMARY_SIZE_SYS_CONFIG];
+};
+
+/**
+ * @brief points to a block of FFDC sub-region.
+ */
+struct __attribute__((packed)) FfdcBlock
+{
+    uint8_t*  iv_dataPtr;
+    uint32_t  iv_dataSize;
+};
+
+/**
+ * models FFDC summary section in HOMER.
+ */
+struct  __attribute__((packed)) FfdcSummary
+{
+    uint32_t    iv_summaryMagicWord;
+    SysState    iv_sysState;
+    uint8_t     iv_sgpeSummary[FFDC_SUMMARY_SIZE_SGPE];
+    uint8_t     iv_pgpeSummary[FFDC_SUMMARY_SIZE_PGPE];
+    uint8_t     iv_cmeSummary[MAX_CMES_PER_CHIP][FFDC_SUMMARY_SIZE_CME];
+    uint8_t     iv_qpmmRegSummary[MAX_QUADS_PER_CHIP][FFDC_SUMMARY_SIZE_QPPM_REG];
+    uint8_t     iv_cpmmRegSummary[MAX_CORES_PER_CHIP][FFDC_SUMMARY_SIZE_CPPM_REG];
+    FfdcBlock   iv_sgpeScoreBoard;
+    FfdcBlock   iv_pgpeScoreBoard;
+    FfdcBlock   iv_cmeScoreBoard[MAX_CMES_PER_CHIP];
+};
+
+/**
  * @brief   models full FFDC region of HOMER.
  */
 struct  __attribute__((packed)) HomerFfdcRegion
@@ -406,6 +471,7 @@ struct  __attribute__((packed)) HomerFfdcRegion
     PpeFfdcLayout       iv_sgpeFfdcRegion;
     PpeFfdcLayout       iv_pgpeFfdcRegion;
     OccFfdcRegion       iv_occFfdcRegion;
+    FfdcSummary         iv_ffdcSummaryRegion;
 };
 
 }   //namespace p9_stop_recov_ffdc ends
diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_pm_recovery_ffdc_occ.C b/src/import/chips/p9/procedures/hwp/pm/p9_pm_recovery_ffdc_occ.C
index a2dd3ab58..fb7f17b51 100644
--- a/src/import/chips/p9/procedures/hwp/pm/p9_pm_recovery_ffdc_occ.C
+++ b/src/import/chips/p9/procedures/hwp/pm/p9_pm_recovery_ffdc_occ.C
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* OpenPOWER HostBoot Project                                             */
 /*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2015,2017                        */
+/* Contributors Listed Below - COPYRIGHT 2015,2018                        */
 /* [+] International Business Machines Corp.                              */
 /*                                                                        */
 /*                                                                        */
@@ -42,6 +42,10 @@
 
 #include <p9_pm_recovery_ffdc_occ.H>
 #include <p9_hcd_memmap_occ_sram.H>
+#include <p9_perv_scom_addresses.H>
+#include <p9_misc_scom_addresses.H>
+#include <p9n2_misc_scom_addresses.H>
+#include <p9_misc_scom_addresses_fixes.H>
 #include <p9_ppe_defs.H>
 #include <stddef.h>
 #include <endian.h>
@@ -68,6 +72,20 @@ namespace p9_stop_recov_ffdc
 
     //----------------------------------------------------------------------
 
+    void PlatOcc::initRegList()
+    {
+        FAPI_DBG (">> PlatOcc::initRegList" );
+        std::vector < uint32_t> l_scomRegList;
+        iv_occSummaryReg.push_back( PU_OCB_OCI_CCSR_SCOM );
+        iv_occSummaryReg.push_back( PU_OCB_OCI_QSSR_SCOM );
+        iv_occSummaryReg.push_back( P9N2_PU_OCB_OCI_OCCFLG_SCOM );
+        iv_occSummaryReg.push_back( P9N2_PU_OCB_OCI_OCCFLG2_SCOM );
+        PlatPmComplex::updateSummaryList( l_scomRegList );
+        FAPI_DBG ("<< PlatOcc::initRegList" );
+    }
+
+    //----------------------------------------------------------------------
+
     fapi2::ReturnCode PlatOcc::collectFfdc( void*   i_pHomerBuf,
                                             uint8_t i_ffdcType )
     {
@@ -197,6 +215,11 @@ namespace p9_stop_recov_ffdc
         FAPI_TRY( updateOccFfdcHeader( l_pFfdcLoc, l_ffdcValid ),
                           "Failed To Update OCC FFDC Header for OCC" );
 
+        if( !(i_ffdcType & INIT ) )
+        {
+            generateSummary( i_pHomerBuf );
+        }
+
     fapi_try_exit:
         FAPI_DBG("<< PlatOcc::collectFfdc");
         return fapi2::current_err;
@@ -439,8 +462,51 @@ namespace p9_stop_recov_ffdc
         FAPI_DBG("<< updateOccFfdcHeader" );
         return fapi2::FAPI2_RC_SUCCESS;
     }
+
     //--------------------------------------------------------------------------
 
+    fapi2::ReturnCode PlatOcc::generateSummary( void * i_pHomer )
+    {
+       HomerFfdcRegion * l_pHomerFfdc   =
+                ( HomerFfdcRegion *)( (uint8_t *)i_pHomer + FFDC_REGION_HOMER_BASE_OFFSET );
+       OccFfdcRegion * l_pOccLayout     =   ( OccFfdcRegion * ) &l_pHomerFfdc->iv_occFfdcRegion;
+       uint8_t * l_pOccReg              =   &l_pOccLayout->iv_occRegs[0];
+       FfdcScomEntry * l_pFirEntry      =   (FfdcScomEntry *)&l_pHomerFfdc->iv_firFfdcRegion.iv_OccPbaBlock[0];
+       SysState * l_pSysConfig          =   &l_pHomerFfdc->iv_ffdcSummaryRegion.iv_sysState;
+       OccFfdcHeader* l_pOccFfdcHdr     =   (OccFfdcHeader*) ( &l_pHomerFfdc->iv_occFfdcRegion );
+
+       FfdcSummSubSectHdr * l_pSysConfigHdr   =
+                    (FfdcSummSubSectHdr *)&l_pSysConfig->iv_subSecHdr;
+       l_pSysConfigHdr->iv_subSectnId   =   PLAT_OCC;
+       l_pSysConfigHdr->iv_majorNum     =   1;
+       l_pSysConfigHdr->iv_minorNum     =   0;
+       l_pSysConfigHdr->iv_secValid     =   l_pOccFfdcHdr->iv_sectionsValid;
+
+       if( l_pSysConfigHdr->iv_secValid )
+       {
+           initRegList();
+           memcpy( &l_pSysConfig->iv_occPbaFir[0],
+                   &l_pFirEntry->iv_scomData,
+                   FFDC_SUMMARY_SCOM_REG_SIZE ) ; //copying first FIR value
+
+                   l_pFirEntry++;
+
+           memcpy( &l_pSysConfig->iv_occPbaFir[FFDC_SUMMARY_SCOM_REG_SIZE],
+                   &l_pFirEntry->iv_scomData,
+                   FFDC_SUMMARY_SCOM_REG_SIZE ); //copying second FIR value
+
+
+           PlatPmComplex::extractScomSummaryReg( l_pOccReg,
+                                                 FFDC_OCC_REGS_SIZE,
+                                                 &l_pSysConfig->iv_configReg[0] );
+       }
+
+       return fapi2::FAPI2_RC_SUCCESS;
+    }
+
+    //--------------------------------------------------------------------------
+
+
 extern "C"
 {
     fapi2::ReturnCode p9_pm_recovery_ffdc_occ (
diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_pm_recovery_ffdc_occ.H b/src/import/chips/p9/procedures/hwp/pm/p9_pm_recovery_ffdc_occ.H
index 24a87dee0..2d80f4904 100644
--- a/src/import/chips/p9/procedures/hwp/pm/p9_pm_recovery_ffdc_occ.H
+++ b/src/import/chips/p9/procedures/hwp/pm/p9_pm_recovery_ffdc_occ.H
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* OpenPOWER HostBoot Project                                             */
 /*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2015,2017                        */
+/* Contributors Listed Below - COPYRIGHT 2015,2018                        */
 /* [+] International Business Machines Corp.                              */
 /*                                                                        */
 /*                                                                        */
@@ -68,6 +68,11 @@ namespace p9_stop_recov_ffdc
             fapi2::ReturnCode collectFfdc ( void*   i_pHomerBuf,
                                             uint8_t i_ffdcType = ALL );
 
+            /// @brief      generates summary of FFDC pertaining to a given platform.
+            /// @param[in]  i_pHomer    points to Homer base.
+            /// @return     fapi2 return code
+            fapi2::ReturnCode generateSummary( void * i_pHomer );
+
         private:
             /// @brief      collects trace info from a known region OCC SRAM
             /// @param[in]  i_pHomerBuf     location in HOMER to write at
@@ -100,14 +105,35 @@ namespace p9_stop_recov_ffdc
             ///@return      fapi2 return code.
             fapi2::ReturnCode  collectOccReg( uint8_t * i_pHomerBuf);
 
-
+            ///@brief initializes a list of register for generation of FFDC summary.
+            void initRegList();
+        private:
+            std::vector<uint32_t> iv_occSummaryReg;
     };
 
-extern "C"
-{
+    //---------------------------------------------------------------------------------------------
+
+    // function pointer typedef definition for HWP call support
     typedef fapi2::ReturnCode( *p9_pm_recovery_ffdc_occ_FP_t )
             ( const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> & i_procChipTgt,
               void* i_occFfdcBuf );
+extern "C"
+{
+    // -----------------------------------------------------------------------------
+    // Function prototypes
+    // -----------------------------------------------------------------------------
+    ///
+    /// @brief Populates the OCC FFDC section with FFDC collected from OCC GPE0 and GPE1.
+    ///
+    /// @param[in] i_procChipTarget Proc Chip target
+    /// @param[in] i_pHomerImage    Pointer to the base of the chip HOMER region
+    ///
+    /// @return FAPI2_RC_SUCCESS on success or error return code
+    ///
+        fapi2::ReturnCode p9_pm_recovery_ffdc_occ
+        ( const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_procChipTarget,
+          void* i_pHomerImage );
+
 }
 
 } //namespace p9_stop_recov_ffdc ends
diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_pm_recovery_ffdc_pgpe.C b/src/import/chips/p9/procedures/hwp/pm/p9_pm_recovery_ffdc_pgpe.C
index 6a8a775ab..5db2ff0c8 100644
--- a/src/import/chips/p9/procedures/hwp/pm/p9_pm_recovery_ffdc_pgpe.C
+++ b/src/import/chips/p9/procedures/hwp/pm/p9_pm_recovery_ffdc_pgpe.C
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* OpenPOWER HostBoot Project                                             */
 /*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2015,2017                        */
+/* Contributors Listed Below - COPYRIGHT 2015,2018                        */
 /* [+] International Business Machines Corp.                              */
 /*                                                                        */
 /*                                                                        */
@@ -43,6 +43,7 @@
 #include <p9_pm_recovery_ffdc_pgpe.H>
 #include <p9_hcd_memmap_occ_sram.H>
 #include <p9_ppe_defs.H>
+#include <p9_ppe_utils.H>
 #include <stddef.h>
 #include <endian.h>
 
@@ -85,6 +86,7 @@
         PpeFfdcHeader* l_pPgpeFfdcHdr = (PpeFfdcHeader*) l_pFfdcLoc;
         uint16_t l_ffdcValdityVect = l_pPgpeFfdcHdr->iv_sectionsValid;
 
+
         if ( i_ffdcType & INIT )
         {   // overwrite on init
             l_ffdcValdityVect = PPE_FFDC_INVALID;
@@ -159,6 +161,11 @@
         else
             setPmFfdcSectionValid ( i_pHomerBuf, PM_FFDC_PGPE_VALID );
 
+        if( !(i_ffdcType & INIT) )
+        {
+            generateSummary( i_pHomerBuf );
+        }
+
     fapi_try_exit:
         FAPI_DBG("<< PlatPgpe::collectFfdc");
         return fapi2::current_err;
@@ -172,13 +179,29 @@
         PpeFfdcLayout * l_pPgpeFfdc = ( PpeFfdcLayout *) ( i_pTraceBuf );
 
         uint8_t * l_pTraceLoc = &l_pPgpeFfdc->iv_ppeTraces[0];
+        uint64_t l_traceBufHdr      =   0;
+        uint32_t l_traceBufAddress  =   0;
+        uint32_t l_doubleWordsRead  =   0;
+
+        FAPI_TRY( PlatPmComplex::readSramInfo(  PlatPmComplex::getProcChip(),
+                                                getTraceBufAddr(),
+                                                (uint8_t *)&l_traceBufHdr,
+                                                8,
+                                                l_doubleWordsRead ),
+                  "Trace Buf Ptr Collection Failed" );
+
+        l_traceBufHdr       =  htobe64( l_traceBufHdr );
+        l_traceBufAddress   =  (uint32_t) l_traceBufHdr;
+
+        FAPI_DBG( "Trace Buf Address 0x%08x", l_traceBufAddress );
+
+        FAPI_TRY( PlatPmComplex::readSramInfo(  PlatPmComplex::getProcChip(),
+                                                l_traceBufAddress,
+                                                l_pTraceLoc,
+                                                FFDC_PPE_TRACES_SIZE,
+                                                l_doubleWordsRead ),
+                  "Trace Bin Collection Failed" );
 
-        FAPI_TRY( PlatPmComplex::collectSramInfo
-                    ( PlatPmComplex::getProcChip(),
-                      l_pTraceLoc,
-                      TRACES,
-                      FFDC_PPE_TRACES_SIZE ),
-                  "Trace Collection Failed" );
 
     fapi_try_exit:
         FAPI_DBG("<< PlatPgpe::collectTrace" );
@@ -248,6 +271,40 @@
         FAPI_DBG("<< updatePgpeFfdcHeader" );
         return fapi2::FAPI2_RC_SUCCESS;
     }
+
+    //-----------------------------------------------------------------------
+
+    fapi2::ReturnCode PlatPgpe::generateSummary( void * i_pHomer )
+    {
+       FAPI_DBG(">> PlatPgpe::generateSummary" );
+
+       HomerFfdcRegion * l_pHomerFfdc =
+                ( HomerFfdcRegion *)( (uint8_t *)i_pHomer + FFDC_REGION_HOMER_BASE_OFFSET );
+       PpeFfdcLayout * l_pPgpeLayout    =   ( PpeFfdcLayout * ) &l_pHomerFfdc->iv_pgpeFfdcRegion;
+       uint8_t * l_pPgpeXirReg          =   &l_pPgpeLayout->iv_ppeXirReg[0];
+       uint8_t * l_pPgpeSummary         =   &l_pHomerFfdc->iv_ffdcSummaryRegion.iv_pgpeSummary[FFDC_SUMMARY_SEC_HDR_SIZE];
+       PpeFfdcHeader* l_pPgpeFfdcHdr    =   (PpeFfdcHeader*) &l_pHomerFfdc->iv_pgpeFfdcRegion;
+
+       FfdcSummSubSectHdr * l_pPgpeSummaryHdr   =   (FfdcSummSubSectHdr *)&l_pHomerFfdc->iv_ffdcSummaryRegion.iv_pgpeSummary[0];
+       l_pPgpeSummaryHdr->iv_subSectnId =   PLAT_PGPE;
+       l_pPgpeSummaryHdr->iv_majorNum   =   1;
+       l_pPgpeSummaryHdr->iv_minorNum   =   0;
+       l_pPgpeSummaryHdr->iv_secValid   =   l_pPgpeFfdcHdr->iv_sectionsValid;
+
+       if( l_pPgpeSummaryHdr->iv_secValid )
+       {
+           PlatPmComplex::initRegList();
+           PlatPmComplex::extractPpeSummaryReg( l_pPgpeXirReg, FFDC_PPE_XIR_SIZE, l_pPgpeSummary );
+
+           //Populating the Extended FFDC summary
+           l_pHomerFfdc->iv_ffdcSummaryRegion.iv_pgpeScoreBoard.iv_dataPtr      =   &l_pPgpeLayout->iv_ppeGlobals[0];
+           l_pHomerFfdc->iv_ffdcSummaryRegion.iv_pgpeScoreBoard.iv_dataSize     =   FFDC_PPE_SCORE_BOARD_SIZE;
+       }
+
+       FAPI_DBG("<< PlatPgpe::generateSummary" );
+       return fapi2::FAPI2_RC_SUCCESS;
+    }
+
     //-----------------------------------------------------------------------
 
 extern "C"
diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_pm_recovery_ffdc_pgpe.H b/src/import/chips/p9/procedures/hwp/pm/p9_pm_recovery_ffdc_pgpe.H
index 34ee09500..3887a5f29 100644
--- a/src/import/chips/p9/procedures/hwp/pm/p9_pm_recovery_ffdc_pgpe.H
+++ b/src/import/chips/p9/procedures/hwp/pm/p9_pm_recovery_ffdc_pgpe.H
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* OpenPOWER HostBoot Project                                             */
 /*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2017                             */
+/* Contributors Listed Below - COPYRIGHT 2017,2018                        */
 /* [+] International Business Machines Corp.                              */
 /*                                                                        */
 /*                                                                        */
@@ -67,6 +67,11 @@ namespace p9_stop_recov_ffdc
             fapi2::ReturnCode collectFfdc( void*   i_pHomerBuf,
                                            uint8_t i_ffdcType = ALL );
 
+            /// @brief      generates summary of FFDC pertaining to a given platform.
+            /// @param[in]  i_pHomer    points to Homer base.
+            /// @return     fapi2 return code
+            fapi2::ReturnCode generateSummary( void * i_pHomer );
+
         private:
             /// @brief      collects trace info from PGPE's SRAM buffer.
             /// @param[in]  i_pHomerBuf     points to location of HOMER meant for PGPE Trace info.
@@ -103,15 +108,34 @@ namespace p9_stop_recov_ffdc
             ///@brief returns type of platform
             PmComplexPlatId getPlatType() { return iv_plat; }
 
+            ///@brief initializes a list of register for generation of FFDC summary.
+            void initRegList();
+
         private:
             PmComplexPlatId iv_plat;
     };
 
-extern "C"
-{
+    //---------------------------------------------------------------------------------------------
+    // function pointer typedef definition for HWP call support
     typedef fapi2::ReturnCode( *p9_pm_recovery_ffdc_pgpe_FP_t )
             ( const fapi2::Target< fapi2::TARGET_TYPE_PROC_CHIP > & i_procChipTgt,
               void * i_pgpeFfdcBuf );
+extern "C"
+{
+    // -----------------------------------------------------------------------------
+    // Function prototypes
+    // -----------------------------------------------------------------------------
+    ///
+    /// @brief Populates the PGPE FFDC section with FFDC collected from PGPE.
+    ///
+    /// @param[in] i_procChipTarget Proc Chip target
+    /// @param[in] i_pHomerImage    Pointer to the base of the chip HOMER region
+    ///
+    /// @return FAPI2_RC_SUCCESS on success or error return code
+    ///
+        fapi2::ReturnCode p9_pm_recovery_ffdc_pgpe
+        ( const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_procChipTarget,
+          void* i_pHomerImage );
 }
 
 } //namespace p9_stop_recov_ffdc ends
diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_pm_recovery_ffdc_qppm.C b/src/import/chips/p9/procedures/hwp/pm/p9_pm_recovery_ffdc_qppm.C
index 205240346..3288b92db 100644
--- a/src/import/chips/p9/procedures/hwp/pm/p9_pm_recovery_ffdc_qppm.C
+++ b/src/import/chips/p9/procedures/hwp/pm/p9_pm_recovery_ffdc_qppm.C
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* OpenPOWER HostBoot Project                                             */
 /*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2017                             */
+/* Contributors Listed Below - COPYRIGHT 2017,2018                        */
 /* [+] International Business Machines Corp.                              */
 /*                                                                        */
 /*                                                                        */
@@ -42,6 +42,7 @@
 
 #include <p9_pm_recovery_ffdc_qppm.H>
 #include <collect_reg_ffdc.H>
+#include <p9_quad_scom_addresses.H>
 #include <stddef.h>
 #include <endian.h>
 
@@ -56,6 +57,7 @@
     fapi2::ReturnCode QppmRegs::init ( void* i_pHomerBuf )
     {
         FAPI_DBG (">> QppmRegs::init" );
+
         FAPI_TRY ( collectFfdc( i_pHomerBuf, INIT),
                    "Failed To init QPPM REGS FFDC" );
 
@@ -66,6 +68,17 @@
 
     //----------------------------------------------------------------------
 
+    void QppmRegs::initRegList()
+    {
+        std::vector < uint32_t> l_scomRegList;
+        l_scomRegList.push_back( EQ_PPM_GPMMR_SCOM );
+        l_scomRegList.push_back( EQ_PPM_SSHSRC );
+        l_scomRegList.push_back( EQ_QPPM_DPLL_FREQ );
+        PlatPmComplex::updateSummaryList( l_scomRegList );
+    }
+
+    //----------------------------------------------------------------------
+
     fapi2::ReturnCode QppmRegs::collectFfdc ( void*   i_pHomerBuf,
                                               uint8_t i_ffdcType )
     {
@@ -73,11 +86,11 @@
 
         fapi2::ReturnCode l_rc = fapi2::FAPI2_RC_SUCCESS;
 
-        auto l_quadList =
+        uint8_t* l_pFfdcLoc     =   NULL;
+        auto l_quadList         =
             getProcChip().getChildren< fapi2::TARGET_TYPE_EQ > ( fapi2::TARGET_STATE_PRESENT );
-        uint8_t l_quadPos = 0;
-        uint8_t* l_pFfdcLoc = NULL;
-        uint16_t l_ffdcValid = 0;
+        uint8_t l_quadPos    = 0;
+        uint16_t l_ffdcValid = FFDC_SUMMARY_SUB_SEC_VALID;
         HomerFfdcRegion * l_pHomerFfdc =
                 ( HomerFfdcRegion *)( (uint8_t *)i_pHomerBuf + FFDC_REGION_HOMER_BASE_OFFSET );
 
@@ -95,22 +108,30 @@
                 // Note: ( i_ffdcType & INIT ) is the default case
                 if ( i_ffdcType & SCOM_REG )
                 {
-                    l_ffdcValid = 1;
+                    l_ffdcValid = FFDC_SUMMARY_SUB_SEC_VALID;
                     FAPI_INF("QPPM FFDC Pos %d ", l_quadPos);
 
                     l_rc = collectRegisterData <fapi2::TARGET_TYPE_EQ> (
                            quad,
                            l_pFfdcLoc + sizeof(PpmFfdcHeader),
                            static_cast<fapi2::HwpFfdcId>(fapi2::QPPM_FFDC_REGISTERS));
-                    if (l_rc )
+
+                    if ( l_rc )
                     {
-                        l_ffdcValid = 0;
+                        l_ffdcValid = FFDC_SUMMARY_SUB_SEC_INVALID;
                     }
                 }
+
             }
 
             FAPI_TRY( updateQppmFfdcHeader( l_pFfdcLoc, l_quadPos, l_ffdcValid),
                       "Failed To Update QPPM FFDC Header for quad 0x%0d", l_quadPos);
+
+        }
+
+        if( !( i_ffdcType & INIT ) )
+        {
+            generateSummary( i_pHomerBuf );
         }
 
     fapi_try_exit:
@@ -118,16 +139,18 @@
         return fapi2::current_err;
     }
 
-    fapi2::ReturnCode QppmRegs::updateQppmFfdcHeader( uint8_t * i_pHomerBuf, 
+    //-----------------------------------------------------------------------
+
+    fapi2::ReturnCode QppmRegs::updateQppmFfdcHeader( uint8_t * i_pHomerBuf,
                                                       const uint8_t i_quadPos,
                                                       const uint16_t i_ffdcValid)
     {
         FAPI_DBG(">> updateQppmFfdcHeader" );
 
-        PpmFfdcHeader * l_QppmFfdcHdr     =   (PpmFfdcHeader *) i_pHomerBuf ;
+        PpmFfdcHeader * l_QppmFfdcHdr     =  (PpmFfdcHeader *) i_pHomerBuf ;
         l_QppmFfdcHdr->iv_ppmMagicWord    =  htobe32(FFDC_QPPM_MAGIC_NUM);
-        l_QppmFfdcHdr->iv_versionMajor = 1;
-        l_QppmFfdcHdr->iv_versionMinor = 0;
+        l_QppmFfdcHdr->iv_versionMajor    =  1;
+        l_QppmFfdcHdr->iv_versionMinor    =  0;
         l_QppmFfdcHdr->iv_Instance        =  i_quadPos;
         l_QppmFfdcHdr->iv_ppmHeaderSize   =  htobe16(sizeof(PpmFfdcHeader));
         l_QppmFfdcHdr->iv_sectionSize     =  htobe16(FFDC_QPPM_REGION_SIZE);
@@ -136,15 +159,51 @@
         FAPI_DBG("<< updateQppmFfdcHeader" );
         return fapi2::FAPI2_RC_SUCCESS;
     }
+
     //-----------------------------------------------------------------------
 
+    fapi2::ReturnCode QppmRegs::generateSummary( void * i_pHomer )
+    {
+        HomerFfdcRegion * l_pHomerFfdc =
+                ( HomerFfdcRegion *)( (uint8_t *)i_pHomer + FFDC_REGION_HOMER_BASE_OFFSET );
+        uint8_t* l_pQppmFfdcLoc     = NULL;
+        uint8_t * l_pQppmSummary    = NULL;
+        PpmFfdcHeader * l_pQppmHdr  = NULL;
+        uint32_t  l_regionSizeLimit = FFDC_QPPM_REGION_SIZE - sizeof( PpmFfdcHeader );
+        initRegList();
+
+        for( uint8_t l_ppmPos = 0; l_ppmPos < MAX_QUADS_PER_CHIP; l_ppmPos++ )
+        {
+            l_pQppmFfdcLoc  =  &l_pHomerFfdc->iv_quadFfdc[l_ppmPos].iv_quadQppmRegion[0];
+            l_pQppmSummary  =  &l_pHomerFfdc->iv_ffdcSummaryRegion.iv_qpmmRegSummary[l_ppmPos][FFDC_SUMMARY_SEC_HDR_SIZE];
+            l_pQppmHdr      = ( PpmFfdcHeader * ) &l_pHomerFfdc->iv_quadFfdc[l_ppmPos].iv_quadQppmRegion[0];
+            FfdcSummSubSectHdr * l_pQppmSummaryHdr
+                            =  (FfdcSummSubSectHdr *)&l_pHomerFfdc->iv_ffdcSummaryRegion.iv_qpmmRegSummary[l_ppmPos][0];
+            l_pQppmSummaryHdr->iv_subSectnId    =   PLAT_QPPM;
+            l_pQppmSummaryHdr->iv_majorNum      =   1;
+            l_pQppmSummaryHdr->iv_minorNum      =   0;
+            l_pQppmSummaryHdr->iv_secValid      =   htobe16(l_pQppmHdr->iv_ffdcValid);
+
+            if( !l_pQppmSummaryHdr->iv_secValid )
+            {
+                continue;
+            }
 
+            PlatPmComplex::extractScomSummaryReg( l_pQppmFfdcLoc + sizeof( PpmFfdcHeader ),
+                                                  l_regionSizeLimit, l_pQppmSummary );
+        }
+
+        return fapi2::FAPI2_RC_SUCCESS;
+    }
+
+    //-----------------------------------------------------------------------
 
 extern "C"
 {
     fapi2::ReturnCode p9_pm_recovery_ffdc_qppm( const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP >& i_procChip, void * i_pFfdcBuf )
     {
         FAPI_IMP(">> p9_pm_recovery_ffdc_qppm" );
+
         QppmRegs l_qppmFfdc( i_procChip );
         FAPI_TRY( l_qppmFfdc.collectFfdc( i_pFfdcBuf, SCOM_REG ),
                   "Failed To Collect QPPM FFDC" );
diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_pm_recovery_ffdc_qppm.H b/src/import/chips/p9/procedures/hwp/pm/p9_pm_recovery_ffdc_qppm.H
index 43b3ee50d..a5b2a8a56 100644
--- a/src/import/chips/p9/procedures/hwp/pm/p9_pm_recovery_ffdc_qppm.H
+++ b/src/import/chips/p9/procedures/hwp/pm/p9_pm_recovery_ffdc_qppm.H
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* OpenPOWER HostBoot Project                                             */
 /*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2017                             */
+/* Contributors Listed Below - COPYRIGHT 2017,2018                        */
 /* [+] International Business Machines Corp.                              */
 /*                                                                        */
 /*                                                                        */
@@ -67,6 +67,11 @@ namespace p9_stop_recov_ffdc
             fapi2::ReturnCode collectFfdc ( void*   i_pHomerBuf,
                                             uint8_t i_ffdcType = ALL );
 
+            /// @brief      generates summary of FFDC pertaining to a given platform.
+            /// @param[in]  i_pHomer    points to Homer base.
+            /// @return     fapi2 return code
+            fapi2::ReturnCode generateSummary( void * i_pHomer );
+
         private:
             /// @brief updates the QPPM FFDC Header
             ///@param[in]   i_pHomerBuf     points to a location in HOMER meant for QPPM Header
@@ -74,17 +79,40 @@ namespace p9_stop_recov_ffdc
             ///@param[in]   i_ffdcValid     QPPM FFDC valid state
             ///@return      fapi2 return code.
 
-            fapi2::ReturnCode updateQppmFfdcHeader( uint8_t * i_pHomerBuf, 
+            fapi2::ReturnCode updateQppmFfdcHeader( uint8_t * i_pHomerBuf,
                                                     const uint8_t i_qppmInstance,
                                                     const uint16_t i_ffdcValid);
 
+            ///@brief initializes a list of register for generation of FFDC summary.
+            void initRegList();
+
+       private:
+            std::vector<uint32_t> iv_qppmSummaryReg;
+
     };
 
-extern "C"
-{
+    //---------------------------------------------------------------------------------------------
+    // function pointer typedef definition for HWP call support
     typedef fapi2::ReturnCode( *p9_pm_recovery_ffdc_qppm_FP_t )
             ( const fapi2::Target< fapi2::TARGET_TYPE_PROC_CHIP > & i_procChipTgt,
               void * i_qppmFfdcBuf );
+
+extern "C"
+{
+    // -----------------------------------------------------------------------------
+    // Function prototypes
+    // -----------------------------------------------------------------------------
+    ///
+    /// @brief Populates the PM FFDC section with FFDC collected from QPPM.
+    ///
+    /// @param[in] i_procChipTarget Proc Chip target
+    /// @param[in] i_pHomerImage    Pointer to the base of the chip HOMER region
+    ///
+    /// @return FAPI2_RC_SUCCESS on success or error return code
+    ///
+        fapi2::ReturnCode p9_pm_recovery_ffdc_qppm
+        ( const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_procChipTarget,
+          void* i_pHomerImage );
 }
 
 } //namespace p9_stop_recov_ffdc ends
diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_pm_recovery_ffdc_sgpe.C b/src/import/chips/p9/procedures/hwp/pm/p9_pm_recovery_ffdc_sgpe.C
index 57730ebde..478c1049f 100644
--- a/src/import/chips/p9/procedures/hwp/pm/p9_pm_recovery_ffdc_sgpe.C
+++ b/src/import/chips/p9/procedures/hwp/pm/p9_pm_recovery_ffdc_sgpe.C
@@ -43,6 +43,7 @@
 #include <p9_pm_recovery_ffdc_sgpe.H>
 #include <p9_hcd_memmap_occ_sram.H>
 #include <p9_ppe_defs.H>
+#include <p9_ppe_utils.H>
 #include <stddef.h>
 #include <endian.h>
 
@@ -158,6 +159,11 @@
         else
             setPmFfdcSectionValid ( i_pHomerBuf, PM_FFDC_SGPE_VALID );
 
+        if( !(i_ffdcType & INIT) )
+        {
+            generateSummary( i_pHomerBuf );
+        }
+
     fapi_try_exit:
         FAPI_DBG("<< PlatSgpe::collectFfdc: 0x%02X", l_ffdcValdityVect);
         return fapi2::current_err;
@@ -221,13 +227,29 @@
         PpeFfdcLayout * l_pSgpeFfdc = ( PpeFfdcLayout *) ( i_pTraceBuf );
 
         uint8_t * l_pTraceLoc = &l_pSgpeFfdc->iv_ppeTraces[0];
+        uint64_t l_traceBufHdr      =   0;
+        uint32_t l_traceBufAddress  =   0;
+        uint32_t l_doubleWordsRead  =   0;
+
+        FAPI_TRY( PlatPmComplex::readSramInfo(  PlatPmComplex::getProcChip(),
+                                                getTraceBufAddr(),
+                                                (uint8_t*)&l_traceBufHdr,
+                                                8,
+                                                l_doubleWordsRead ),
+                  "Trace Buf Ptr Collection Failed" );
+
+        l_traceBufHdr       =   htobe64(l_traceBufHdr);
+        l_traceBufAddress   =   (uint32_t) l_traceBufHdr;
+
+        FAPI_DBG( "Trace Buf Address 0x%08x", l_traceBufAddress );
+
+        FAPI_TRY( PlatPmComplex::readSramInfo(  PlatPmComplex::getProcChip(),
+                                                l_traceBufAddress,
+                                                l_pTraceLoc,
+                                                FFDC_PPE_TRACES_SIZE,
+                                                l_doubleWordsRead ),
+                  "Trace Bin Collection Failed" );
 
-        FAPI_TRY( PlatPmComplex::collectSramInfo
-                    ( PlatPmComplex::getProcChip(),
-                      l_pTraceLoc,
-                      TRACES,
-                      FFDC_PPE_TRACES_SIZE ),
-                  "Trace Collection Failed" );
 
         fapi_try_exit:
         FAPI_DBG("<< PlatSgpe::collectTrace" );
@@ -299,6 +321,39 @@
         FAPI_DBG("<< updateSgpeFfdcHeader" );
         return fapi2::FAPI2_RC_SUCCESS;
     }
+
+    //-----------------------------------------------------------------------
+
+    fapi2::ReturnCode PlatSgpe::generateSummary( void * i_pHomer )
+    {
+       HomerFfdcRegion * l_pHomerFfdc =
+                ( HomerFfdcRegion *)( (uint8_t *)i_pHomer + FFDC_REGION_HOMER_BASE_OFFSET );
+       PpeFfdcLayout * l_pSgpeLayout    =   ( PpeFfdcLayout * ) &l_pHomerFfdc->iv_sgpeFfdcRegion;
+       uint8_t * l_pSgpeXirReg          =   &l_pSgpeLayout->iv_ppeXirReg[0];
+       uint8_t * l_pSgpeSummary         =   &l_pHomerFfdc->iv_ffdcSummaryRegion.iv_sgpeSummary[FFDC_SUMMARY_SEC_HDR_SIZE];
+       PpeFfdcHeader* l_pSgpeFfdcHdr    =   ( PpeFfdcHeader* )&l_pHomerFfdc->iv_sgpeFfdcRegion;
+       FfdcSummSubSectHdr * l_pSgpeSummaryHdr   =   (FfdcSummSubSectHdr *)&l_pHomerFfdc->iv_ffdcSummaryRegion.iv_sgpeSummary[0];
+       l_pSgpeSummaryHdr->iv_subSectnId =   PLAT_SGPE;
+       l_pSgpeSummaryHdr->iv_majorNum   =   1;
+       l_pSgpeSummaryHdr->iv_minorNum   =   0;
+       l_pSgpeSummaryHdr->iv_secValid   =   l_pSgpeFfdcHdr->iv_sectionsValid;
+
+       if( l_pSgpeSummaryHdr->iv_secValid )
+       {
+           PlatPmComplex::initRegList();
+           PlatPmComplex::extractPpeSummaryReg( l_pSgpeXirReg, FFDC_PPE_XIR_SIZE, l_pSgpeSummary );
+
+           //Populating the Extended FFDC summary
+           l_pHomerFfdc->iv_ffdcSummaryRegion.iv_sgpeScoreBoard.iv_dataPtr      =  &l_pSgpeLayout->iv_ppeGlobals[0];
+           l_pHomerFfdc->iv_ffdcSummaryRegion.iv_sgpeScoreBoard.iv_dataSize     =  FFDC_PPE_SCORE_BOARD_SIZE;
+
+           FAPI_DBG( "Dash Board Size       :   0x%08x ",
+                      l_pHomerFfdc->iv_ffdcSummaryRegion.iv_sgpeScoreBoard.iv_dataSize );
+       }
+
+       return fapi2::FAPI2_RC_SUCCESS;
+    }
+
     //-----------------------------------------------------------------------
 
 extern "C"
diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_pm_recovery_ffdc_sgpe.H b/src/import/chips/p9/procedures/hwp/pm/p9_pm_recovery_ffdc_sgpe.H
index 5d46658da..aa0f79077 100644
--- a/src/import/chips/p9/procedures/hwp/pm/p9_pm_recovery_ffdc_sgpe.H
+++ b/src/import/chips/p9/procedures/hwp/pm/p9_pm_recovery_ffdc_sgpe.H
@@ -69,6 +69,10 @@ namespace p9_stop_recov_ffdc
 
             virtual fapi2::ReturnCode collectPartialFfdc( void * i_pHomerBuf, FfdcDataType i_ffdcType ,
                                                           uint32_t & o_ffdcLength );
+            /// @brief      generates summary of FFDC pertaining to a given platform.
+            /// @param[in]  i_pHomer    points to Homer base.
+            /// @return     fapi2 return code
+            fapi2::ReturnCode generateSummary( void * i_pHomer );
 
         private:
             /// @brief      collects trace info from SGPE's SRAM buffer.
@@ -101,15 +105,34 @@ namespace p9_stop_recov_ffdc
             ///@brief returns type of platform
             PmComplexPlatId getPlatType() { return iv_plat; }
 
+            void initRegList();
+
         private:
             PmComplexPlatId iv_plat;
     };
 
-extern "C"
-{
+    //---------------------------------------------------------------------------------------------
+
+    // function pointer typedef definition for HWP call support
     typedef fapi2::ReturnCode( *p9_pm_recovery_ffdc_sgpe_FP_t )
             ( const fapi2::Target< fapi2::TARGET_TYPE_PROC_CHIP > & i_procChipTgt,
               void * i_sgpeFfdcBuf );
+extern "C"
+{
+    // -----------------------------------------------------------------------------
+    // Function prototypes
+    // -----------------------------------------------------------------------------
+    ///
+    /// @brief Populatess the SGPE FFDC section with FFDC collected from SGPE.
+    ///
+    /// @param[in] i_procChipTarget Proc Chip target
+    /// @param[in] i_pHomerImage    Pointer to the base of the chip HOMER region
+    ///
+    /// @return FAPI2_RC_SUCCESS on success or error return code
+    ///
+        fapi2::ReturnCode p9_pm_recovery_ffdc_sgpe
+        ( const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_procChipTarget,
+          void* i_pHomerImage );
 }
 
 } //namespace p9_stop_recov_ffdc ends
diff --git a/src/import/chips/p9/procedures/xml/error_info/p9_pm_registers.xml b/src/import/chips/p9/procedures/xml/error_info/p9_pm_registers.xml
index 98fbde7a4..4ffe7d3d0 100644
--- a/src/import/chips/p9/procedures/xml/error_info/p9_pm_registers.xml
+++ b/src/import/chips/p9/procedures/xml/error_info/p9_pm_registers.xml
@@ -5,7 +5,7 @@
 <!--                                                                        -->
 <!-- OpenPOWER HostBoot Project                                             -->
 <!--                                                                        -->
-<!-- Contributors Listed Below - COPYRIGHT 2016,2017                        -->
+<!-- Contributors Listed Below - COPYRIGHT 2016,2018                        -->
 <!-- [+] International Business Machines Corp.                              -->
 <!--                                                                        -->
 <!--                                                                        -->
@@ -305,6 +305,10 @@
     <scomRegister>EX_CME_SCOM_PSCRS11_SCOM</scomRegister>
     <scomRegister>EX_CME_SCOM_PSCRS12_SCOM</scomRegister>
     <scomRegister>EX_CME_SCOM_PSCRS13_SCOM</scomRegister>
+    <scomRegister>EX_CME_SCOM_VDSR_SCOM</scomRegister>
+    <scomRegister>EX_PPE_XIRAMDBG</scomRegister>
+    <scomRegister>EX_PPE_XIRAMEDR</scomRegister>
+    <scomRegister>EX_PPE_XIDBGPRO</scomRegister>
   </registerFfdc>
   <!-- *********************************************************************** -->
   <registerFfdc>
@@ -336,6 +340,40 @@
     <scomRegister>EQ_QPPM_QACCR</scomRegister>
     <scomRegister>EQ_CPLT_CTRL0</scomRegister>
     <scomRegister>EQ_CPLT_CTRL1</scomRegister>
+    <scomRegister>PERV_EP00_QPPM_QACSR</scomRegister>
+    <scomRegister>PERV_EP00_QPPM_EXCGCR</scomRegister>
+    <scomRegister>EQ_QPPM_VDMCFGR</scomRegister>
+    <scomRegister>EQ_0_PPM_VDMCR</scomRegister>
+    <scomRegister>EQ_CME_SCOM_XIPCBMD0</scomRegister>
+    <scomRegister>EQ_CME_SCOM_XIPCBMD1</scomRegister>
+    <scomRegister>EQ_CME_SCOM_XIPCBMI0</scomRegister>
+    <scomRegister>EQ_CME_SCOM_XIPCBMI1</scomRegister>
+    <scomRegister>EQ_CME_SCOM_XIPCBQ0</scomRegister>
+    <scomRegister>EQ_CME_SCOM_XIPCBQ1</scomRegister>
+    <scomRegister>EQ_CPLT_CTRL0</scomRegister>
+    <scomRegister>EQ_CPLT_CTRL1</scomRegister>
+    <scomRegister>EQ_CPLT_STAT0</scomRegister>
+    <scomRegister>EQ_SYNC_CONFIG</scomRegister>
+    <scomRegister>EQ_OPCG_ALIGN</scomRegister>
+    <scomRegister>EQ_OPCG_ALIGN</scomRegister>
+    <scomRegister>EQ_OPCG_REG0</scomRegister>
+    <scomRegister>EQ_OPCG_REG1</scomRegister>
+    <scomRegister>EQ_OPCG_REG2</scomRegister>
+    <scomRegister>EQ_SCAN_REGION_TYPE</scomRegister>
+    <scomRegister>EQ_CLK_REGION</scomRegister>
+    <scomRegister>EQ_CLOCK_STAT_SL</scomRegister>
+    <scomRegister>EQ_CLOCK_STAT_NSL</scomRegister>
+    <scomRegister>EQ_CLOCK_STAT_ARY</scomRegister>
+    <scomRegister>EQ_CLOCK_STAT_ARY</scomRegister>
+    <scomRegister>EQ_BIST</scomRegister>
+    <scomRegister>EQ_XSTOP1</scomRegister>
+    <scomRegister>EQ_XSTOP2</scomRegister>
+    <scomRegister>EQ_XSTOP3</scomRegister>
+    <scomRegister>EQ_ERROR_STATUS</scomRegister>
+    <scomRegister>EQ_OPCG_CAPT1</scomRegister>
+    <scomRegister>EQ_OPCG_CAPT2</scomRegister>
+    <scomRegister>EQ_OPCG_CAPT3</scomRegister>
+    <scomRegister>EQ_DBG_CBS_CC</scomRegister>
   </registerFfdc>
   <!-- *********************************************************************** -->
   <registerFfdc>
@@ -368,16 +406,23 @@
     <scomRegister>C_CPPM_CMEDB3</scomRegister>
     <scomRegister>C_CPLT_CTRL0</scomRegister>
     <scomRegister>C_CPLT_CTRL1</scomRegister>
+    <scomRegister>C_CPPM_CACSR</scomRegister>
   </registerFfdc>
   <!-- *********************************************************************** -->
   <registerFfdc>
     <id>PM_CME_FIR_REGISTERS</id>
     <scomRegister>EX_CME_SCOM_LFIR</scomRegister>
+    <scomRegister>EX_CME_SCOM_LFIRACT0</scomRegister>
+    <scomRegister>EX_CME_SCOM_LFIRACT1</scomRegister>
+    <scomRegister>EX_CME_SCOM_LFIRMASK</scomRegister>
   </registerFfdc>
   <!-- *********************************************************************** -->
   <registerFfdc>
     <id>PM_FIR_REGISTERS</id>
     <scomRegister>PERV_TP_OCC_SCOM_OCCLFIR</scomRegister>
+    <scomRegister>PERV_TP_OCC_SCOM_OCCLFIRMASK</scomRegister>
+    <scomRegister>PERV_TP_OCC_SCOM_OCCLFIRACT0</scomRegister>
+    <scomRegister>PERV_TP_OCC_SCOM_OCCLFIRACT1</scomRegister>
     <scomRegister>PU_PBAFIR</scomRegister>
   </registerFfdc>
   <!-- *********************************************************************** -->
@@ -419,9 +464,6 @@
     <scomRegister>PU_OCB_PIB_OCBESR1</scomRegister>
     <scomRegister>PU_OCB_PIB_OCBESR2</scomRegister>
     <scomRegister>PU_OCB_PIB_OCBESR3</scomRegister>
-    <scomRegister>PU_OCB_PIB_OCBDR0</scomRegister>
-    <scomRegister>PU_OCB_PIB_OCBDR1</scomRegister>
-    <scomRegister>PU_OCB_PIB_OCBDR2</scomRegister>
     <scomRegister>PU_OCB_PIB_OCBDR3</scomRegister>
     <scomRegister>PU_OCB_OCI_OPIT0C0_SCOM</scomRegister>
     <scomRegister>PU_OCB_OCI_OPIT0C1_SCOM</scomRegister>
@@ -584,5 +626,38 @@
     <scomRegister>PU_PBASLVCTL1_SCOM</scomRegister>
     <scomRegister>PU_PBASLVCTL2_SCOM</scomRegister>
     <scomRegister>PU_PBASLVCTL3_SCOM</scomRegister>
+    <scomRegister>PU_GPE0_GPEIVPR_SCOM</scomRegister>
+    <scomRegister>PU_GPE1_GPEIVPR_SCOM</scomRegister>
+    <scomRegister>PU_GPE2_GPEIVPR_SCOM</scomRegister>
+    <scomRegister>PU_GPE3_GPEIVPR_SCOM</scomRegister>
+    <scomRegister>PU_GPE2_GPEDBG_OCI</scomRegister>
+    <scomRegister>PU_GPE0_PPE_XIRAMDBG</scomRegister>
+    <scomRegister>PU_GPE0_PPE_XIRAMEDR</scomRegister>
+    <scomRegister>PU_GPE0_PPE_XIDBGPRO</scomRegister>
+    <scomRegister>PU_GPE1_PPE_XIRAMDBG</scomRegister>
+    <scomRegister>PU_GPE1_PPE_XIRAMEDR</scomRegister>
+    <scomRegister>PU_GPE1_PPE_XIDBGPRO</scomRegister>
+    <scomRegister>PU_GPE2_PPE_XIRAMDBG</scomRegister>
+    <scomRegister>PU_GPE2_PPE_XIRAMEDR</scomRegister>
+    <scomRegister>PU_GPE2_PPE_XIDBGPRO</scomRegister>
+    <scomRegister>PU_GPE3_PPE_XIRAMDBG</scomRegister>
+    <scomRegister>PU_GPE3_PPE_XIRAMEDR</scomRegister>
+    <scomRegister>PU_GPE3_PPE_XIDBGPRO</scomRegister>
+    <scomRegister>PU_OCB_OCI_OINKR0_SCOM</scomRegister> 
+    <scomRegister>PU_OCB_OCI_OINKR1_SCOM</scomRegister> 
+    <scomRegister>P9N2_PU_OCB_OCI_OCCFLG2_SCOM</scomRegister> 
+    <scomRegister>PU_OCB_OCI_G0ISR0_SCOM</scomRegister>
+    <scomRegister>PU_OCB_OCI_G1ISR0_SCOM</scomRegister>
+    <scomRegister>PU_OCB_OCI_G2ISR0_SCOM</scomRegister>
+    <scomRegister>PU_OCB_OCI_G3ISR0_SCOM</scomRegister>
+    <scomRegister>PU_OCB_OCI_G0ISR1_SCOM</scomRegister>
+    <scomRegister>PU_OCB_OCI_G1ISR1_SCOM</scomRegister>
+    <scomRegister>PU_OCB_OCI_G2ISR1_SCOM</scomRegister>
+    <scomRegister>PU_OCB_OCI_G3ISR1_SCOM</scomRegister>
+    <scomRegister>PU_OCB_OCI_OCCS0_SCOM</scomRegister>
+    <scomRegister>PU_OCB_OCI_OCCS1_SCOM</scomRegister>
+    <scomRegister>PU_OCB_OCI_OCCS2_SCOM</scomRegister>
   </registerFfdc>
+
+  <!-- ******************************************************************** -->
 </hwpErrors>
diff --git a/src/import/hwpf/fapi2/tools/parseErrorInfo.pl b/src/import/hwpf/fapi2/tools/parseErrorInfo.pl
index 768a8b101..1fa756f5d 100755
--- a/src/import/hwpf/fapi2/tools/parseErrorInfo.pl
+++ b/src/import/hwpf/fapi2/tools/parseErrorInfo.pl
@@ -6,7 +6,7 @@
 #
 # OpenPOWER HostBoot Project
 #
-# Contributors Listed Below - COPYRIGHT 2015,2017
+# Contributors Listed Below - COPYRIGHT 2015,2018
 # [+] International Business Machines Corp.
 #
 #
@@ -505,6 +505,7 @@ print CRFILE "#include <plat_trace.H>\n";
 print CRFILE "#include <hwp_error_info.H>\n";
 print CRFILE "#include <p9_mc_scom_addresses.H>\n";
 print CRFILE "#include <p9_misc_scom_addresses.H>\n";
+print CRFILE "#include <p9n2_misc_scom_addresses.H>\n";
 print CRFILE "#include <p9_obus_scom_addresses.H>\n";
 print CRFILE "#include <p9_perv_scom_addresses.H>\n";
 print CRFILE "#include <p9_quad_scom_addresses.H>\n";
diff --git a/src/usr/fapi2/platCreateHwpErrParser.pl b/src/usr/fapi2/platCreateHwpErrParser.pl
index d0e04f2fb..0281a8aca 100755
--- a/src/usr/fapi2/platCreateHwpErrParser.pl
+++ b/src/usr/fapi2/platCreateHwpErrParser.pl
@@ -6,7 +6,7 @@
 #
 # OpenPOWER HostBoot Project
 #
-# Contributors Listed Below - COPYRIGHT 2015,2017
+# Contributors Listed Below - COPYRIGHT 2015,2018
 # [+] Google Inc.
 # [+] International Business Machines Corp.
 #
@@ -219,6 +219,7 @@ print EDISFILE "#define HBFWERRDISPLAYPLATHWPFFDC_H_\n\n";
 print EDISFILE "#include <stdio.h>\n\n";
 print EDISFILE "#include <p9_mc_scom_addresses.H>\n";
 print EDISFILE "#include <p9_misc_scom_addresses.H>\n";
+print EDISFILE "#include <p9n2_misc_scom_addresses.H>\n";
 print EDISFILE "#include <p9_obus_scom_addresses.H>\n";
 print EDISFILE "#include <p9_perv_scom_addresses.H>\n";
 print EDISFILE "#include <p9_quad_scom_addresses.H>\n";