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author | Andre Marin <aamarin@us.ibm.com> | 2016-03-02 12:52:07 -0600 |
---|---|---|
committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2016-05-13 15:29:37 -0400 |
commit | 8642af5a3f8dbefcf54392c0fac7039a36df22f7 (patch) | |
tree | 67a5d6b5d5526f446e27fb874c5f37bd6cd711b3 | |
parent | 092c6749cc80fe17e7798286fa9ed9984ba3482c (diff) | |
download | talos-hostboot-8642af5a3f8dbefcf54392c0fac7039a36df22f7.tar.gz talos-hostboot-8642af5a3f8dbefcf54392c0fac7039a36df22f7.zip |
Modify freq & dep. files. Add cas latency & unit tests
Change-Id: I42c58831479a08bb61425bc4358a4073384e6982
Original-Change-Id: I205bf48e54fb3c8f19f973f58f8ec1d4c7345a23
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/22632
Tested-by: PPE CI
Tested-by: Jenkins Server
Reviewed-by: Brian R. Silver <bsilver@us.ibm.com>
Tested-by: Hostboot CI
Reviewed-by: JACOB L. HARVEY <jlharvey@us.ibm.com>
Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com>
Reviewed-by: Louis Stermole <stermole@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24541
Tested-by: FSP CI Jenkins
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
3 files changed, 65 insertions, 75 deletions
diff --git a/src/import/chips/p9/procedures/xml/error_info/p9_memory_mss_eff_config.xml b/src/import/chips/p9/procedures/xml/error_info/p9_memory_mss_eff_config.xml index cc27b31c1..24d2132c8 100644 --- a/src/import/chips/p9/procedures/xml/error_info/p9_memory_mss_eff_config.xml +++ b/src/import/chips/p9/procedures/xml/error_info/p9_memory_mss_eff_config.xml @@ -47,4 +47,20 @@ </deconfigure> </hwpError> + <hwpError> + <rc>RC_MSS_INVALID_KEY</rc> + <description> + Conditional that tests whether a certain key value is located in a map. + </description> + <ffdc>KEY</ffdc> + <ffdc>DATA</ffdc> + <callout> + <target>DIMM_TARGET</target> + <priority>HIGH</priority> + </callout> + <deconfigure> + <target>DIMM_TARGET</target> + </deconfigure> + </hwpError> + </hwpErrors> diff --git a/src/import/chips/p9/procedures/xml/error_info/p9_memory_mss_freq.xml b/src/import/chips/p9/procedures/xml/error_info/p9_memory_mss_freq.xml index d33f944d1..60e3e5bc7 100644 --- a/src/import/chips/p9/procedures/xml/error_info/p9_memory_mss_freq.xml +++ b/src/import/chips/p9/procedures/xml/error_info/p9_memory_mss_freq.xml @@ -32,29 +32,11 @@ <hwpErrors> -<!-- Original Source for RC_MSS_UNSUPPORTED_SPD_DATA_DDR4 memory_errors.xml --> - <hwpError> - <rc>RC_MSS_UNSUPPORTED_SPD_DATA_DDR4</rc> - <description>Invalid SPD data returned.</description> - <ffdc>MTB_DDR4</ffdc> - <ffdc>FTB_DDR4</ffdc> - <callout> - <target>DIMM_TARGET</target> - <priority>HIGH</priority> - </callout> - <deconfigure> - <target>DIMM_TARGET</target> - </deconfigure> -</hwpError> -<!-- Original Source for RC_MSS_UNSUPPORTED_SPD_DATA_DDR3 memory_errors.xml --> <hwpError> - <rc>RC_MSS_UNSUPPORTED_SPD_DATA_DDR3</rc> - <description>Invalid SPD data returned.</description> - <ffdc>MTB_DIVIDEND</ffdc> - <ffdc>MTB_DIVISOR</ffdc> - <ffdc>FTB_DIVIDEND</ffdc> - <ffdc>FTB_DIVISOR</ffdc> + <rc>RC_MSS_INVALID_TIMING_VALUE</rc> + <description>Invalid value calculated for timing value based on MTB and FTB from SPD.</description> + <ffdc>VALUE</ffdc> <callout> <target>DIMM_TARGET</target> <priority>HIGH</priority> @@ -62,56 +44,33 @@ <deconfigure> <target>DIMM_TARGET</target> </deconfigure> -</hwpError> + </hwpError> -<!-- Original Source for RC_MSS_UNSUPPORTED_SPD_DATA_COMMON memory_errors.xml --> <hwpError> - <rc>RC_MSS_UNSUPPORTED_SPD_DATA_COMMON</rc> - <description>Invalid SPD data returned.</description> - <ffdc>MIN_TCK</ffdc> - <ffdc>MIN_TAA</ffdc> - <callout> - <target>TARGET</target> - <priority>HIGH</priority> - </callout> - <deconfigure> - <target>DIMM_TARGET</target> - </deconfigure> -</hwpError> + <rc>RC_MSS_REACHED_HIGHEST_TCK</rc> + <description> + No valid tCK exists that would produce a CAS latency that is common among all dimms. + </description> + <ffdc>TCK</ffdc> + </hwpError> -<!-- Original Source for RC_MSS_MODULE_TYPE_MIX memory_errors.xml --> - <hwpError> - <rc>RC_MSS_MODULE_TYPE_MIX</rc> - <description>Differing DIMM types in the same configuration.</description> - <ffdc>MODULE_TYPE</ffdc> - <callout> - <target>DIMM_TARGET</target> - <priority>HIGH</priority> - </callout> - <deconfigure> - <target>DIMM_TARGET</target> - </deconfigure> -</hwpError> - -<!-- Original Source for RC_MSS_NO_COMMON_SUPPORTED_CL memory_errors.xml --> <hwpError> <rc>RC_MSS_NO_COMMON_SUPPORTED_CL</rc> - <description>Current Configuration has no common supported CL Values.</description> + <description>Current Configuration has no common supported CL values.</description> <ffdc>CL_SUPPORTED</ffdc> <callout> - <target>DIMM_TARGET</target> + <target>MCS_TARGET</target> <priority>HIGH</priority> </callout> <deconfigure> - <target>DIMM_TARGET</target> + <target>MCS_TARGET</target> </deconfigure> -</hwpError> + </hwpError> -<!-- Original Source for RC_MSS_EXCEED_TAA_MAX_NO_CL memory_errors.xml --> <hwpError> <rc>RC_MSS_EXCEED_TAA_MAX_NO_CL</rc> <description>Exceeded TAA MAX with Lowest frequency. No compatable CL.</description> - <ffdc>CL_SUPPORTED</ffdc> + <ffdc>CL</ffdc> <callout> <target>DIMM_TARGET</target> <priority>HIGH</priority> @@ -119,28 +78,28 @@ <deconfigure> <target>DIMM_TARGET</target> </deconfigure> -</hwpError> + </hwpError> -<!-- Original Source for RC_MSS_UNSUPPORTED_FREQ_CALCULATED memory_errors.xml --> + <!-- Original Source for RC_MSS_UNSUPPORTED_FREQ_CALCULATED memory_errors.xml --> <hwpError> <rc>RC_MSS_UNSUPPORTED_FREQ_CALCULATED</rc> <description>The frequency calculated with spd data is not supported by the jedec standards.</description> <ffdc>DIMM_MIN_FREQ</ffdc> -</hwpError> + </hwpError> -<!-- Original Source for RC_MSS_UNSUPPORTED_DEV_TYPE memory_errors.xml --> + <!-- TK - I don't think this belongs in this file - AAM --> <hwpError> - <rc>RC_MSS_UNSUPPORTED_DEV_TYPE</rc> - <description>Device type is not DDR4.</description> - <ffdc>DEV_TYPE</ffdc> - <callout> - <target>DIMM_TARGET</target> - <priority>HIGH</priority> - </callout> - <deconfigure> - <target>DIMM_TARGET</target> - </deconfigure> + <rc>RC_MSS_UNSUPPORTED_DEV_TYPE</rc> + <description>Device type is not DDR4.</description> + <ffdc>DEV_TYPE</ffdc> + <callout> + <target>DIMM_TARGET</target> + <priority>HIGH</priority> + </callout> + <deconfigure> + <target>DIMM_TARGET</target> + </deconfigure> + </hwpError> - </hwpError> </hwpErrors> diff --git a/src/import/chips/p9/procedures/xml/error_info/p9_memory_mss_spd_decode.xml b/src/import/chips/p9/procedures/xml/error_info/p9_memory_mss_spd_decode.xml index 6b02d0b26..6a8bd0d5f 100644 --- a/src/import/chips/p9/procedures/xml/error_info/p9_memory_mss_spd_decode.xml +++ b/src/import/chips/p9/procedures/xml/error_info/p9_memory_mss_spd_decode.xml @@ -30,7 +30,7 @@ <hwpErrors> - <hwpError> + <hwpError> <rc>RC_MSS_BAD_SPD</rc> <description>Bad SPD data recieved.</description> <ffdc>VALUE</ffdc> @@ -42,9 +42,9 @@ <deconfigure> <target>DIMM_TARGET</target> </deconfigure> - </hwpError> + </hwpError> - <hwpError> + <hwpError> <rc>RC_MSS_INVALID_DIMM_REV_COMBO</rc> <description> Recieved a dimm type (e.g. RDIMM, LRDIMM) and SPD revision @@ -61,6 +61,21 @@ <deconfigure> <target>DIMM_TARGET</target> </deconfigure> - </hwpError> + </hwpError> + + <hwpError> + <rc>RC_MSS_INVALID_CACHE</rc> + <description> + Bad SPD cache. Unable to find decoder factory instance from dimm position. + </description> + <ffdc>DIMM_POS</ffdc> + <callout> + <target>DIMM_TARGET</target> + <priority>HIGH</priority> + </callout> + <deconfigure> + <target>DIMM_TARGET</target> + </deconfigure> + </hwpError> </hwpErrors> |