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| author | Brian Silver <bsilver@us.ibm.com> | 2016-12-15 12:10:44 -0600 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2017-03-03 16:06:23 -0500 |
| commit | 75459961dd2564a436e1fcd8679fcc646e333b56 (patch) | |
| tree | a3c0a469cd7b30b0c56d0de893db578b2c57338a | |
| parent | 349f0d6c2a5f033b1481cce4a57e0b81610c6ca6 (diff) | |
| download | talos-hostboot-75459961dd2564a436e1fcd8679fcc646e333b56.tar.gz talos-hostboot-75459961dd2564a436e1fcd8679fcc646e333b56.zip | |
Change R17/R16 bits for 1R DIMM config depending on slot configs
Change-Id: I799ab5b9cc2c785aef54c7b161763423e57f43c6
Original-Change-Id: I71a2ee3df032b18646534032b9c6f8347ccf8ab2
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/33914
Dev-Ready: Brian R. Silver <bsilver@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: SHELTON LEUNG <sleung@us.ibm.com>
Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com>
Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/37411
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/memory/lib/mc/xlate.C | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/mc/xlate.C b/src/import/chips/p9/procedures/hwp/memory/lib/mc/xlate.C index 05c8ac95e..6e7057f37 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/mc/xlate.C +++ b/src/import/chips/p9/procedures/hwp/memory/lib/mc/xlate.C @@ -1172,8 +1172,8 @@ fapi2::ReturnCode xlate_dimm_1R1T8Gbx4( const dimm::kind& i_kind, fapi2::buffer<uint64_t>& io_xlate1, fapi2::buffer<uint64_t>& io_xlate2 ) { - constexpr uint64_t R16_MAP_ALL_1R(0b00110); - constexpr uint64_t R16_MAP_NOT_ALL_1R(0b00101); + constexpr uint64_t R16_MAP_ALL_1R(0b00101); + constexpr uint64_t R16_MAP_NOT_ALL_1R(0b00110); const auto R16_MAP = all_slots_1R_helper(i_kind.iv_target) ? R16_MAP_ALL_1R : R16_MAP_NOT_ALL_1R; // We're more or less a 1R 4Gbx4 with an extra row. So lets setup like that and add our row in. @@ -1209,8 +1209,8 @@ fapi2::ReturnCode xlate_dimm_1R1T16Gbx4( const dimm::kind& i_kind, fapi2::buffer<uint64_t>& io_xlate1, fapi2::buffer<uint64_t>& io_xlate2 ) { - constexpr uint64_t R17_MAP_ALL_1R(0b00101); - constexpr uint64_t R17_MAP_NOT_ALL_1R(0b00100); + constexpr uint64_t R17_MAP_ALL_1R(0b00100); + constexpr uint64_t R17_MAP_NOT_ALL_1R(0b00101); const auto R17_MAP = all_slots_1R_helper(i_kind.iv_target) ? R17_MAP_ALL_1R : R17_MAP_NOT_ALL_1R; // We're more or less a 1R 8Gbx4 with an extra row. So lets setup like that and add our row in. |
