PRD: update filter parsing in XML parser

Change-Id: Ibcdd98f4ccb5e51e4485b4c73d2a5c6eec4e78b7
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/68624
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Caleb N. Palmer <cnpalmer@us.ibm.com>
Reviewed-by: Brian J. Stegmiller <bjs@us.ibm.com>
Reviewed-by: Zane C. Shelley <zshelle@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/68821
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>

26 files changed, 531 insertions, 216 deletions

diff --git a/src/usr/diag/prdf/common/plat/centaur/centaur_mba.rule b/src/usr/diag/prdf/common/plat/centaur/centaur_mba.rule
index 9cd9a694c..f17bdf3f1 100644
--- a/src/usr/diag/prdf/common/plat/centaur/centaur_mba.rule
+++ b/src/usr/diag/prdf/common/plat/centaur/centaur_mba.rule
@@ -231,7 +231,8 @@ rule rMBA
 
 # The MBACALFIR must be analyzed first so that the RCD parity errors are the
 # first to be analyzed.
-group gMBA attntype RECOVERABLE, UNIT_CS, HOST_ATTN filter singlebit
+group gMBA attntype RECOVERABLE, UNIT_CS, HOST_ATTN
+    filter singlebit
 {
     (rMBA, bit(0)) ? analyze(gMBACALFIR);
     (rMBA, bit(1)) ? analyze(gMBASECUREFIR);
@@ -254,8 +255,9 @@ rule rMBACALFIR
 
 # RCD parity errors (bits 4 and 7) given priority over potential side effects
 # bits 2 and 17.
-group gMBACALFIR filter priority( 4, 7 ),
-                        cs_root_cause( 0, 1, 2, 4, 5, 6, 7, 8, 9, 11, 13, 15, 17, 18 )
+group gMBACALFIR
+    filter priority(4,7),
+           cs_root_cause(0,1,2,4,5,6,7,8,9,11,13,15,17,18)
 {
     /** MBACALFIR[0]
      *  MBA_RECOVERABLE_ERROR
@@ -399,7 +401,9 @@ rule rMBASECUREFIR
     MBASECUREFIR;
 };
 
-group gMBASECUREFIR filter singlebit, cs_root_cause( 0, 1, 2, 3, 4, 5 )
+group gMBASECUREFIR
+    filter singlebit,
+           cs_root_cause(0,1,2,3,4,5)
 {
     /** MBASECUREFIR[0]
      *  Invalid MBA_CALQ0 access
@@ -445,7 +449,9 @@ rule rMBAFIR
     MBAFIR & ~MBAFIR_MASK & ~MBAFIR_ACT0 &  MBAFIR_ACT1;
 };
 
-group gMBAFIR filter singlebit, cs_root_cause( 3, 5, 6, 7, 8 )
+group gMBAFIR
+    filter singlebit,
+           cs_root_cause(3,5,6,7,8)
 {
     /** MBAFIR[0]
      *  Invalid Maintenance Command
@@ -519,7 +525,9 @@ rule rMBASPA
     MBASPA & ~MBASPA_MASK;
 };
 
-group gMBASPA filter singlebit, cs_root_cause
+group gMBASPA
+    filter singlebit,
+           cs_root_cause
 {
     /** MBASPA[0]
      *  Maintenance command complete
@@ -590,7 +598,9 @@ rule rMBADDRPHYFIR
     MBADDRPHYFIR & ~MBADDRPHYFIR_MASK & ~MBADDRPHYFIR_ACT0 &  MBADDRPHYFIR_ACT1;
 };
 
-group gMBADDRPHYFIR filter singlebit, cs_root_cause( 48, 49, 51, 52, 56, 57, 59, 60 )
+group gMBADDRPHYFIR
+    filter singlebit,
+           cs_root_cause(48,49,51,52,56,57,59,60)
 {
     /** MBADDRPHYFIR[48]
      *  FSM Error Checkstop
diff --git a/src/usr/diag/prdf/common/plat/centaur/centaur_membuf.rule b/src/usr/diag/prdf/common/plat/centaur/centaur_membuf.rule
index 767bd094a..500e9974e 100644
--- a/src/usr/diag/prdf/common/plat/centaur/centaur_membuf.rule
+++ b/src/usr/diag/prdf/common/plat/centaur/centaur_membuf.rule
@@ -615,7 +615,8 @@ rule rGLOBAL_FIR
     GLOBAL_RE_FIR;
 };
 
-group gGLOBAL_FIR attntype UNIT_CS, RECOVERABLE filter singlebit
+group gGLOBAL_FIR attntype UNIT_CS, RECOVERABLE
+    filter singlebit
 {
     /** GLOBAL_FIR[1]
      *  Attention from TP chiplet
@@ -644,7 +645,8 @@ rule rGLOBAL_SPA_FIR
     GLOBAL_SPA_FIR;
 };
 
-group gGLOBAL_SPA_FIR attntype HOST_ATTN filter singlebit
+group gGLOBAL_SPA_FIR attntype HOST_ATTN
+    filter singlebit
 {
     /** GLOBAL_SPA_FIR[3]
      *  Attention from MEM chiplet
@@ -665,7 +667,8 @@ rule rTP_CHIPLET_FIR
     (TP_CHIPLET_RE_FIR >> 2) & ~TP_CHIPLET_FIR_MASK & `1fffffffffffffff`;
 };
 
-group gTP_CHIPLET_FIR filter singlebit
+group gTP_CHIPLET_FIR
+    filter singlebit
 {
     /** TP_CHIPLET_FIR[3]
      *  Attention from TP_LFIR
@@ -686,7 +689,9 @@ rule rTP_LFIR
     TP_LFIR & ~TP_LFIR_MASK & ~TP_LFIR_ACT0 &  TP_LFIR_ACT1;
 };
 
-group gTP_LFIR filter singlebit, cs_root_cause( 19, 20 )
+group gTP_LFIR
+    filter singlebit,
+           cs_root_cause(19,20)
 {
     /** TP_LFIR[0]
      *  CFIR internal parity error
@@ -802,7 +807,8 @@ rule rNEST_CHIPLET_FIR
     (NEST_CHIPLET_RE_FIR >> 2) & ~NEST_CHIPLET_FIR_MASK & `1fffffffffffffff`;
 };
 
-group gNEST_CHIPLET_FIR filter priority( 3, 6, 5, 7 )
+group gNEST_CHIPLET_FIR
+    filter priority(3,6,5,7)
 {
     # NOTE: The MBIFIR must be analyzed before the DMIFIR and both the MBIFIR
     # and DMIFIR must be analyzed before the MBSFIR. All other FIRs will be
@@ -872,7 +878,9 @@ rule rNEST_LFIR
     NEST_LFIR & ~NEST_LFIR_MASK & ~NEST_LFIR_ACT0 &  NEST_LFIR_ACT1;
 };
 
-group gNEST_LFIR filter singlebit, cs_root_cause
+group gNEST_LFIR
+    filter singlebit,
+           cs_root_cause
 {
     /** NEST_LFIR[0]
      *  CFIR internal parity error
@@ -963,8 +971,9 @@ rule rDMIFIR
     DMIFIR & ~DMIFIR_MASK & ~DMIFIR_ACT0 &  DMIFIR_ACT1;
 };
 
-group gDMIFIR filter priority( 10, 2, 11, 12, 9  ),
-                     cs_root_cause( 12 )
+group gDMIFIR
+    filter priority(10,2,11,12,9),
+           cs_root_cause(12)
 {
     /** DMIFIR[0]
      *  RX invalid state or parity error
@@ -1060,8 +1069,9 @@ rule rMBIFIR
     MBIFIR & ~MBIFIR_MASK & ~MBIFIR_ACT0 &  MBIFIR_ACT1;
 };
 
-group gMBIFIR filter priority(  8, 9, 19, 20, 6, 0, 16, 5, 10 ),
-                     cs_root_cause( 0, 6, 8, 9, 19, 20 )
+group gMBIFIR
+    filter priority(8,9,19,20,6,0,16,5,10),
+           cs_root_cause(0,6,8,9,19,20)
 {
     /** MBIFIR[0]
      *  Replay Timeout
@@ -1202,7 +1212,9 @@ rule rMBSFIR
     MBSFIR & ~MBSFIR_MASK & ~MBSFIR_ACT0 &  MBSFIR_ACT1;
 };
 
-group gMBSFIR filter singlebit, cs_root_cause( 0, 1, 2, 4, 6, 8, 10, 13, 16, 18, 20, 27, 30 )
+group gMBSFIR
+    filter singlebit,
+           cs_root_cause(0,1,2,4,6,8,10,13,16,18,20,27,30)
 {
     /** MBSFIR[0]
      *  HOST_PROTOCOL_ERROR
@@ -1386,7 +1398,9 @@ rule rMBSSECUREFIR
     MBSSECUREFIR;
 };
 
-group gMBSSECUREFIR filter singlebit, cs_root_cause( 0, 1, 2, 3, 4, 5 )
+group gMBSSECUREFIR
+    filter singlebit,
+           cs_root_cause(0,1,2,3,4,5)
 {
     /** MBSSECUREFIR[0]
      *  Invalid MBSXCR access
@@ -1432,8 +1446,9 @@ rule rMBSECCFIR_0
     MBSECCFIR_0 & ~MBSECCFIR_0_MASK & ~MBSECCFIR_0_ACT0 &  MBSECCFIR_0_ACT1;
 };
 
-group gMBSECCFIR_0 filter priority ( 19, 41 ),
-                          cs_root_cause( 19, 44, 47, 49 )
+group gMBSECCFIR_0
+    filter priority(19,41),
+           cs_root_cause(19,44,47,49)
 {
     /** MBSECCFIR_0[0]
      *  Memory chip mark on rank 0
@@ -1604,8 +1619,9 @@ rule rMBSECCFIR_1
     MBSECCFIR_1 & ~MBSECCFIR_1_MASK & ~MBSECCFIR_1_ACT0 &  MBSECCFIR_1_ACT1;
 };
 
-group gMBSECCFIR_1 filter priority ( 19, 41 ),
-                          cs_root_cause( 19, 44, 47, 49 )
+group gMBSECCFIR_1
+    filter priority(19,41),
+           cs_root_cause(19,44,47,49)
 {
     /** MBSECCFIR_1[0]
      *  Memory chip mark on rank 0
@@ -1776,7 +1792,9 @@ rule rSCACFIR
     SCACFIR & ~SCACFIR_MASK & ~SCACFIR_ACT0 &  SCACFIR_ACT1;
 };
 
-group gSCACFIR filter singlebit, cs_root_cause( 25, 26 )
+group gSCACFIR
+    filter singlebit,
+           cs_root_cause(25,26)
 {
     /** SCACFIR[0]
      *  I2CM(0) Invalid Address
@@ -1942,7 +1960,9 @@ rule rMCBISTFIR_0
     MCBISTFIR_0 & ~MCBISTFIR_0_MASK & ~MCBISTFIR_0_ACT0 &  MCBISTFIR_0_ACT1;
 };
 
-group gMCBISTFIR_0 filter singlebit, cs_root_cause( 0, 1 )
+group gMCBISTFIR_0
+    filter singlebit,
+           cs_root_cause(0,1)
 {
     /** MCBISTFIR_0[0]
      *  SCOM Parity Errors
@@ -1993,7 +2013,9 @@ rule rMCBISTFIR_1
     MCBISTFIR_1 & ~MCBISTFIR_1_MASK & ~MCBISTFIR_1_ACT0 &  MCBISTFIR_1_ACT1;
 };
 
-group gMCBISTFIR_1 filter singlebit, cs_root_cause( 0, 1 )
+group gMCBISTFIR_1
+    filter singlebit,
+           cs_root_cause(0,1)
 {
     /** MCBISTFIR_1[0]
      *  SCOM Parity Errors
@@ -2044,7 +2066,8 @@ rule rMEM_CHIPLET_FIR
     (MEM_CHIPLET_RE_FIR >> 2) & ~MEM_CHIPLET_FIR_MASK & `1fffffffffffffff`;
 };
 
-group gMEM_CHIPLET_FIR filter singlebit
+group gMEM_CHIPLET_FIR
+    filter singlebit
 {
     /** MEM_CHIPLET_FIR[3]
      *  Attention from MEM_LFIR
@@ -2103,7 +2126,8 @@ rule rMEM_CHIPLET_SPA_FIR
     MEM_CHIPLET_SPA_FIR & ~MEM_CHIPLET_SPA_FIR_MASK;
 };
 
-group gMEM_CHIPLET_SPA_FIR filter singlebit
+group gMEM_CHIPLET_SPA_FIR
+    filter singlebit
 {
     /** MEM_CHIPLET_SPA_FIR[0]
      *  Attention from MBASPA 0
@@ -2129,7 +2153,9 @@ rule rMEM_LFIR
     MEM_LFIR & ~MEM_LFIR_MASK & ~MEM_LFIR_ACT0 &  MEM_LFIR_ACT1;
 };
 
-group gMEM_LFIR filter singlebit, cs_root_cause
+group gMEM_LFIR
+    filter singlebit,
+           cs_root_cause
 {
     /** MEM_LFIR[0]
      *  CFIR internal parity error
diff --git a/src/usr/diag/prdf/common/plat/cumulus/cumulus_capp.rule b/src/usr/diag/prdf/common/plat/cumulus/cumulus_capp.rule
index 1fd2d5a79..59d44c543 100644
--- a/src/usr/diag/prdf/common/plat/cumulus/cumulus_capp.rule
+++ b/src/usr/diag/prdf/common/plat/cumulus/cumulus_capp.rule
@@ -112,7 +112,8 @@ rule rCAPP
 
 };
 
-group gCAPP attntype CHECK_STOP, RECOVERABLE, UNIT_CS filter singlebit
+group gCAPP attntype CHECK_STOP, RECOVERABLE, UNIT_CS
+    filter singlebit
 {
     (rCAPP, bit(0)) ? analyze(gCXAFIR);
 };
@@ -131,7 +132,9 @@ rule rCXAFIR
     CXAFIR & ~CXAFIR_MASK &  CXAFIR_ACT0 &  CXAFIR_ACT1;
 };
 
-group gCXAFIR filter singlebit, cs_root_cause
+group gCXAFIR
+    filter singlebit,
+           cs_root_cause
 {
     /** CXAFIR[0]
      *  CXA Informational PE
diff --git a/src/usr/diag/prdf/common/plat/cumulus/cumulus_dmi.rule b/src/usr/diag/prdf/common/plat/cumulus/cumulus_dmi.rule
index 3e6cd8ebc..7da1e4cc6 100644
--- a/src/usr/diag/prdf/common/plat/cumulus/cumulus_dmi.rule
+++ b/src/usr/diag/prdf/common/plat/cumulus/cumulus_dmi.rule
@@ -115,7 +115,8 @@ rule rDMI
 
 };
 
-group gDMI attntype CHECK_STOP, RECOVERABLE, UNIT_CS, HOST_ATTN filter singlebit
+group gDMI attntype CHECK_STOP, RECOVERABLE, UNIT_CS, HOST_ATTN
+    filter singlebit
 {
     (rDMI, bit(0)) ? analyze(gCHIFIR);
 };
@@ -139,15 +140,9 @@ rule rCHIFIR
 # Note that CHIFIR[16:21] indicate there was an attention on the Centaur. All
 # bits in this FIR must be prioritized over CHIFIR[16:21]. Otherwise, we may
 # get stuck in a loop on some conditions.
-group gCHIFIR filter priority( 0, 1, 2, 3, 4, 5, 6, 7, 8, 9,
-                              10,11,12,13,14,15,
-                                    22,23,24,25,26,27,28,29,
-                              30,31,32,33,34,35,36,37,38,39,
-                              40,41,42,43,44,45,46,47,48,49,
-                              50,51,52,53,54,55,56,57,58,59,
-                              60,61,62,63),
-                     cs_root_cause( 0, 2, 4, 5, 6, 12, 14, 15, 16, 32, 36, 40,
-                                   41, 42, 43, 46, 61 )
+group gCHIFIR
+    filter priority(0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63),
+           cs_root_cause(0,2,4,5,6,12,14,15,16,32,36,40,41,42,43,46,61)
 {
     /** CHIFIR[0]
      *  PE on internal register
diff --git a/src/usr/diag/prdf/common/plat/cumulus/cumulus_ec.rule b/src/usr/diag/prdf/common/plat/cumulus/cumulus_ec.rule
index e69c60d73..1d1cbe16c 100644
--- a/src/usr/diag/prdf/common/plat/cumulus/cumulus_ec.rule
+++ b/src/usr/diag/prdf/common/plat/cumulus/cumulus_ec.rule
@@ -191,7 +191,8 @@ rule rEC_CHIPLET_FIR
     (EC_CHIPLET_RE_FIR >> 2) & ~EC_CHIPLET_FIR_MASK & `3fffffffffffffff`;
 };
 
-group gEC_CHIPLET_FIR attntype CHECK_STOP, RECOVERABLE filter singlebit
+group gEC_CHIPLET_FIR attntype CHECK_STOP, RECOVERABLE
+    filter singlebit
 {
     /** EC_CHIPLET_FIR[2]
      *  Unit Checkstop from COREFIR (bit0 in RER)
@@ -220,7 +221,8 @@ rule rEC_CHIPLET_UCS_FIR
     EC_CHIPLET_UCS_FIR & ~(EC_CHIPLET_UCS_FIR_MASK >> 1) & `7fffffffffffffff`;
 };
 
-group gEC_CHIPLET_UCS_FIR attntype UNIT_CS filter singlebit
+group gEC_CHIPLET_UCS_FIR attntype UNIT_CS
+    filter singlebit
 {
     /** EC_CHIPLET_UCS_FIR[1]
      *  Attention from COREFIR
@@ -241,7 +243,9 @@ rule rEC_LFIR
     EC_LFIR & ~EC_LFIR_MASK & ~EC_LFIR_ACT0 &  EC_LFIR_ACT1;
 };
 
-group gEC_LFIR filter singlebit, cs_root_cause
+group gEC_LFIR
+    filter singlebit,
+           cs_root_cause
 {
     /** EC_LFIR[0]
      *  CFIR internal parity error
@@ -329,7 +333,9 @@ rule rCOREFIR
     COREFIR & ~COREFIR_MASK &  COREFIR_ACT0 &  COREFIR_ACT1;
 };
 
-group gCOREFIR filter priority(0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,58,59,60,61,62,63,57), cs_root_cause
+group gCOREFIR
+    filter priority(0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,58,59,60,61,62,63,57),
+           cs_root_cause
 {
     /** COREFIR[0]
      *  IFU SRAM Recoverable error
diff --git a/src/usr/diag/prdf/common/plat/cumulus/cumulus_eq.rule b/src/usr/diag/prdf/common/plat/cumulus/cumulus_eq.rule
index 9eb1513b4..36daab78b 100644
--- a/src/usr/diag/prdf/common/plat/cumulus/cumulus_eq.rule
+++ b/src/usr/diag/prdf/common/plat/cumulus/cumulus_eq.rule
@@ -132,7 +132,8 @@ rule rEQ_CHIPLET_FIR
     (EQ_CHIPLET_RE_FIR >> 2) & ~EQ_CHIPLET_FIR_MASK & `1fffffffffffffff`;
 };
 
-group gEQ_CHIPLET_FIR attntype CHECK_STOP, RECOVERABLE filter singlebit
+group gEQ_CHIPLET_FIR attntype CHECK_STOP, RECOVERABLE
+    filter singlebit
 {
     /** EQ_CHIPLET_FIR[3]
      *  Attention from EQ_LFIR
@@ -193,7 +194,9 @@ rule rEQ_LFIR
     EQ_LFIR & ~EQ_LFIR_MASK & ~EQ_LFIR_ACT0 &  EQ_LFIR_ACT1;
 };
 
-group gEQ_LFIR filter singlebit, cs_root_cause
+group gEQ_LFIR
+    filter singlebit,
+           cs_root_cause
 {
     /** EQ_LFIR[0]
      *  CFIR internal parity error
diff --git a/src/usr/diag/prdf/common/plat/cumulus/cumulus_ex.rule b/src/usr/diag/prdf/common/plat/cumulus/cumulus_ex.rule
index 2be40e394..93cdbc350 100644
--- a/src/usr/diag/prdf/common/plat/cumulus/cumulus_ex.rule
+++ b/src/usr/diag/prdf/common/plat/cumulus/cumulus_ex.rule
@@ -226,7 +226,8 @@ rule rEX
 
 };
 
-group gEX attntype CHECK_STOP, RECOVERABLE filter singlebit
+group gEX attntype CHECK_STOP, RECOVERABLE
+    filter singlebit
 {
     (rEX, bit(0)) ? analyze(gL2FIR);
     (rEX, bit(1)) ? analyze(gNCUFIR);
@@ -246,7 +247,9 @@ rule rL2FIR
     L2FIR & ~L2FIR_MASK & ~L2FIR_ACT0 &  L2FIR_ACT1;
 };
 
-group gL2FIR filter singlebit, cs_root_cause( 1, 17, 18, 20 )
+group gL2FIR
+    filter singlebit,
+           cs_root_cause(1,17,18,20)
 {
     /** L2FIR[0]
      *  L2 cache read CE
@@ -442,7 +445,9 @@ rule rNCUFIR
     NCUFIR & ~NCUFIR_MASK & ~NCUFIR_ACT0 &  NCUFIR_ACT1;
 };
 
-group gNCUFIR filter singlebit, cs_root_cause( 3, 4, 7, 8 )
+group gNCUFIR
+    filter singlebit,
+           cs_root_cause(3,4,7,8)
 {
     /** NCUFIR[0]
      *  NCU store queue control error
@@ -583,7 +588,9 @@ rule rL3FIR
     L3FIR & ~L3FIR_MASK & ~L3FIR_ACT0 &  L3FIR_ACT1;
 };
 
-group gL3FIR filter singlebit, cs_root_cause( 5, 8, 11, 17, 21 )
+group gL3FIR
+    filter singlebit,
+           cs_root_cause(5,8,11,17,21)
 {
     /** L3FIR[0]
      *  L3_RDDSP_SEGR_LCO_ALL_MEM_UNAVAIL_ERR
@@ -769,7 +776,9 @@ rule rCMEFIR
     CMEFIR & ~CMEFIR_MASK & ~CMEFIR_ACT0 &  CMEFIR_ACT1;
 };
 
-group gCMEFIR filter singlebit, cs_root_cause
+group gCMEFIR
+    filter singlebit,
+           cs_root_cause
 {
     /** CMEFIR[0]
      *  PPE asserted an internal error
diff --git a/src/usr/diag/prdf/common/plat/cumulus/cumulus_mc.rule b/src/usr/diag/prdf/common/plat/cumulus/cumulus_mc.rule
index eddf86751..49c4ad18f 100644
--- a/src/usr/diag/prdf/common/plat/cumulus/cumulus_mc.rule
+++ b/src/usr/diag/prdf/common/plat/cumulus/cumulus_mc.rule
@@ -279,7 +279,8 @@ rule rMC_CHIPLET_FIR
     (MC_CHIPLET_RE_FIR >> 2) & ~MC_CHIPLET_FIR_MASK & `1fffffffffffffff`;
 };
 
-group gMC_CHIPLET_FIR attntype CHECK_STOP, RECOVERABLE filter singlebit
+group gMC_CHIPLET_FIR attntype CHECK_STOP, RECOVERABLE
+    filter singlebit
 {
     /** MC_CHIPLET_FIR[3]
      *  Attention from MC_LFIR
@@ -335,7 +336,8 @@ rule rMC_CHIPLET_UCS_FIR
 
 # The IOMCFIR has been prioritized over all the other bits in this FIR. See the
 # notes in prdfMemUtils.C for the reasons why.
-group gMC_CHIPLET_UCS_FIR attntype UNIT_CS filter priority ( 10 )
+group gMC_CHIPLET_UCS_FIR attntype UNIT_CS
+    filter priority(10)
 {
     /** MC_CHIPLET_UCS_FIR[1]
      *  Attention from CHIFIR 0
@@ -384,7 +386,8 @@ rule rMC_CHIPLET_HA_FIR
     MC_CHIPLET_HA_FIR & ~(MC_CHIPLET_HA_FIR_MASK >> 1) & `7fffffffffffffff`;
 };
 
-group gMC_CHIPLET_HA_FIR attntype HOST_ATTN filter singlebit
+group gMC_CHIPLET_HA_FIR attntype HOST_ATTN
+    filter singlebit
 {
     /** MC_CHIPLET_HA_FIR[1]
      *  Attention from CHIFIR 0
@@ -425,7 +428,9 @@ rule rMC_LFIR
     MC_LFIR & ~MC_LFIR_MASK & ~MC_LFIR_ACT0 &  MC_LFIR_ACT1;
 };
 
-group gMC_LFIR filter singlebit, cs_root_cause
+group gMC_LFIR
+    filter singlebit,
+           cs_root_cause
 {
     /** MC_LFIR[0]
      *  CFIR internal parity error
@@ -535,7 +540,9 @@ rule rIOMCFIR
     IOMCFIR & ~IOMCFIR_MASK &  IOMCFIR_ACT0 &  IOMCFIR_ACT1;
 };
 
-group gIOMCFIR filter singlebit, cs_root_cause( 12, 20, 28, 36 )
+group gIOMCFIR
+    filter singlebit,
+           cs_root_cause(12,20,28,36)
 {
     /** IOMCFIR[0]
      *  RX_INVALID_STATE_OR_PARITY_ERROR
@@ -710,7 +717,9 @@ rule rMCPPEFIR
     MCPPEFIR & ~MCPPEFIR_MASK &  MCPPEFIR_ACT0 &  MCPPEFIR_ACT1;
 };
 
-group gMCPPEFIR filter singlebit, cs_root_cause
+group gMCPPEFIR
+    filter singlebit,
+           cs_root_cause
 {
     /** MCPPEFIR[0]
      *  PPE general error.
@@ -795,7 +804,9 @@ rule rMCBISTFIR
     MCBISTFIR & ~MCBISTFIR_MASK &  MCBISTFIR_ACT0 &  MCBISTFIR_ACT1;
 };
 
-group gMCBISTFIR filter singlebit, cs_root_cause
+group gMCBISTFIR
+    filter singlebit,
+           cs_root_cause
 {
     /** MCBISTFIR[0]
      *  WAT_DEBUG_ATTN
diff --git a/src/usr/diag/prdf/common/plat/cumulus/cumulus_mi.rule b/src/usr/diag/prdf/common/plat/cumulus/cumulus_mi.rule
index b0cb153a5..a0689bf9b 100644
--- a/src/usr/diag/prdf/common/plat/cumulus/cumulus_mi.rule
+++ b/src/usr/diag/prdf/common/plat/cumulus/cumulus_mi.rule
@@ -115,7 +115,8 @@ rule rMI
 
 };
 
-group gMI attntype CHECK_STOP, RECOVERABLE, UNIT_CS, HOST_ATTN filter singlebit
+group gMI attntype CHECK_STOP, RECOVERABLE, UNIT_CS, HOST_ATTN
+    filter singlebit
 {
     (rMI, bit(0)) ? analyze(gMCFIR);
 };
@@ -136,7 +137,9 @@ rule rMCFIR
     MCFIR & ~MCFIR_MASK &  MCFIR_ACT0 &  MCFIR_ACT1;
 };
 
-group gMCFIR filter singlebit, cs_root_cause( 0, 8 )
+group gMCFIR
+    filter singlebit,
+           cs_root_cause(0,8)
 {
     /** MCFIR[0]
      *  MC internal recoverable eror
diff --git a/src/usr/diag/prdf/common/plat/cumulus/cumulus_obus.rule b/src/usr/diag/prdf/common/plat/cumulus/cumulus_obus.rule
index ccbcbe2d2..7ab3c7d0f 100644
--- a/src/usr/diag/prdf/common/plat/cumulus/cumulus_obus.rule
+++ b/src/usr/diag/prdf/common/plat/cumulus/cumulus_obus.rule
@@ -262,7 +262,8 @@ rule rOB_CHIPLET_FIR
     (OB_CHIPLET_RE_FIR >> 2) & ~OB_CHIPLET_FIR_MASK & `1fffffffffffffff`;
 };
 
-group gOB_CHIPLET_FIR attntype CHECK_STOP, RECOVERABLE filter singlebit
+group gOB_CHIPLET_FIR attntype CHECK_STOP, RECOVERABLE
+    filter singlebit
 {
     /** OB_CHIPLET_FIR[3]
      *  Attention from OB_LFIR
@@ -296,7 +297,8 @@ rule rOB_CHIPLET_UCS_FIR
     OB_CHIPLET_UCS_FIR & ~(OB_CHIPLET_UCS_FIR_MASK >> 1) & `7fffffffffffffff`;
 };
 
-group gOB_CHIPLET_UCS_FIR attntype UNIT_CS filter singlebit
+group gOB_CHIPLET_UCS_FIR attntype UNIT_CS
+    filter singlebit
 {
     /** OB_CHIPLET_UCS_FIR[2]
      *  Attention from IOOBFIR
@@ -322,7 +324,9 @@ rule rOB_LFIR
     OB_LFIR & ~OB_LFIR_MASK & ~OB_LFIR_ACT0 &  OB_LFIR_ACT1;
 };
 
-group gOB_LFIR filter singlebit, cs_root_cause
+group gOB_LFIR
+    filter singlebit,
+           cs_root_cause
 {
     /** OB_LFIR[0]
      *  CFIR internal parity error
@@ -418,7 +422,9 @@ rule rIOOLFIR
     IOOLFIR & ~IOOLFIR_MASK & ~IOOLFIR_ACT0 &  IOOLFIR_ACT1;
 };
 
-group gIOOLFIR filter singlebit, cs_root_cause( 54, 55, 56, 57, 58, 59 )
+group gIOOLFIR
+    filter singlebit,
+           cs_root_cause(54,55,56,57,58,59)
 {
     /** IOOLFIR[0]
      *  link0 trained
@@ -756,7 +762,9 @@ rule rIOOBFIR
     IOOBFIR & ~IOOBFIR_MASK &  IOOBFIR_ACT0 &  IOOBFIR_ACT1;
 };
 
-group gIOOBFIR filter singlebit, cs_root_cause
+group gIOOBFIR
+    filter singlebit,
+           cs_root_cause
 {
     /** IOOBFIR[0]
      *  A RX state machine error
@@ -804,7 +812,9 @@ rule rOBPPEFIR
     OBPPEFIR & ~OBPPEFIR_MASK &  OBPPEFIR_ACT0 &  OBPPEFIR_ACT1;
 };
 
-group gOBPPEFIR filter singlebit, cs_root_cause
+group gOBPPEFIR
+    filter singlebit,
+           cs_root_cause
 {
     /** OBPPEFIR[0:3]
      *  PPE general error.
diff --git a/src/usr/diag/prdf/common/plat/cumulus/cumulus_pec.rule b/src/usr/diag/prdf/common/plat/cumulus/cumulus_pec.rule
index 1391833a1..c4ed742b4 100644
--- a/src/usr/diag/prdf/common/plat/cumulus/cumulus_pec.rule
+++ b/src/usr/diag/prdf/common/plat/cumulus/cumulus_pec.rule
@@ -147,7 +147,8 @@ rule rPEC
 
 };
 
-group gPEC attntype CHECK_STOP, RECOVERABLE filter singlebit
+group gPEC attntype CHECK_STOP, RECOVERABLE
+    filter singlebit
 {
     (rPEC, bit(0)) ? analyze(gPCI_LFIR);
     (rPEC, bit(1)) ? analyze(gIOPCIFIR);
@@ -165,7 +166,9 @@ rule rPCI_LFIR
     PCI_LFIR & ~PCI_LFIR_MASK & ~PCI_LFIR_ACT0 &  PCI_LFIR_ACT1;
 };
 
-group gPCI_LFIR filter singlebit, cs_root_cause
+group gPCI_LFIR
+    filter singlebit,
+           cs_root_cause
 {
     /** PCI_LFIR[0]
      *  CFIR internal parity error
@@ -261,7 +264,9 @@ rule rIOPCIFIR
     IOPCIFIR & ~IOPCIFIR_MASK & ~IOPCIFIR_ACT0 &  IOPCIFIR_ACT1;
 };
 
-group gIOPCIFIR filter singlebit, cs_root_cause
+group gIOPCIFIR
+    filter singlebit,
+           cs_root_cause
 {
     /** IOPCIFIR[0]
      *  HSS ZCAL Calibration Error
diff --git a/src/usr/diag/prdf/common/plat/cumulus/cumulus_phb.rule b/src/usr/diag/prdf/common/plat/cumulus/cumulus_phb.rule
index 9f4659a51..5d474636b 100644
--- a/src/usr/diag/prdf/common/plat/cumulus/cumulus_phb.rule
+++ b/src/usr/diag/prdf/common/plat/cumulus/cumulus_phb.rule
@@ -185,7 +185,8 @@ rule rPHB
 
 };
 
-group gPHB attntype CHECK_STOP, RECOVERABLE filter singlebit
+group gPHB attntype CHECK_STOP, RECOVERABLE
+    filter singlebit
 {
     (rPHB, bit(0)) ? analyze(gPHBNFIR);
     (rPHB, bit(1)) ? analyze(gPCIFIR);
@@ -204,7 +205,9 @@ rule rPHBNFIR
     PHBNFIR & ~PHBNFIR_MASK & ~PHBNFIR_ACT0 &  PHBNFIR_ACT1;
 };
 
-group gPHBNFIR filter singlebit, cs_root_cause
+group gPHBNFIR
+    filter singlebit,
+           cs_root_cause
 {
     /** PHBNFIR[0]
      *  BAR Parity Error
@@ -370,7 +373,9 @@ rule rPCIFIR
     PCIFIR & ~PCIFIR_MASK & ~PCIFIR_ACT0 &  PCIFIR_ACT1;
 };
 
-group gPCIFIR filter singlebit, cs_root_cause
+group gPCIFIR
+    filter singlebit,
+           cs_root_cause
 {
     /** PCIFIR[0]
      *  PBAIB register parity error
@@ -421,7 +426,9 @@ rule rETUFIR
     ETUFIR & ~ETUFIR_MASK & ~ETUFIR_ACT0 &  ETUFIR_ACT1;
 };
 
-group gETUFIR filter singlebit, cs_root_cause
+group gETUFIR
+    filter singlebit,
+           cs_root_cause
 {
     /** ETUFIR[0]
      *  AIB_COMMAND_INVALID
diff --git a/src/usr/diag/prdf/common/plat/cumulus/cumulus_proc.rule b/src/usr/diag/prdf/common/plat/cumulus/cumulus_proc.rule
index dd60d324f..d2c29760b 100644
--- a/src/usr/diag/prdf/common/plat/cumulus/cumulus_proc.rule
+++ b/src/usr/diag/prdf/common/plat/cumulus/cumulus_proc.rule
@@ -1548,7 +1548,8 @@ rule rGLOBAL_FIR
 };
 
 # Priority put on MC chiplets because of channel failures analysis.
-group gGLOBAL_FIR attntype CHECK_STOP, RECOVERABLE filter priority( 7, 8 )
+group gGLOBAL_FIR attntype CHECK_STOP, RECOVERABLE
+    filter priority(7,8)
 {
     /** GLOBAL_FIR[1]
      *  Attention from TP chiplet
@@ -1787,7 +1788,8 @@ rule rGLOBAL_UCS_FIR
     GLOBAL_UCS_FIR;
 };
 
-group gGLOBAL_UCS_FIR attntype UNIT_CS filter singlebit
+group gGLOBAL_UCS_FIR attntype UNIT_CS
+    filter singlebit
 {
     /** GLOBAL_UCS_FIR[2]
      *  Attention from N0 chiplet
@@ -1976,7 +1978,8 @@ rule rGLOBAL_HA_FIR
     GLOBAL_HA_FIR;
 };
 
-group gGLOBAL_HA_FIR attntype HOST_ATTN filter singlebit
+group gGLOBAL_HA_FIR attntype HOST_ATTN
+    filter singlebit
 {
     /** GLOBAL_HA_FIR[3]
      *  Attention from N1 chiplet
@@ -2012,7 +2015,8 @@ rule rTP_CHIPLET_FIR
     (TP_CHIPLET_RE_FIR >> 2) & ~TP_CHIPLET_FIR_MASK & `1fffffffffffffff`;
 };
 
-group gTP_CHIPLET_FIR filter singlebit
+group gTP_CHIPLET_FIR
+    filter singlebit
 {
     /** TP_CHIPLET_FIR[3]
      *  Attention from TP_LFIR
@@ -2038,7 +2042,9 @@ rule rTP_LFIR
     TP_LFIR & ~TP_LFIR_MASK & ~TP_LFIR_ACT0 &  TP_LFIR_ACT1;
 };
 
-group gTP_LFIR filter singlebit, cs_root_cause
+group gTP_LFIR
+    filter singlebit,
+           cs_root_cause
 {
     /** TP_LFIR[0]
      *  CFIR internal parity error
@@ -2264,7 +2270,9 @@ rule rOCCFIR
     OCCFIR & ~OCCFIR_MASK & ~OCCFIR_ACT0 &  OCCFIR_ACT1;
 };
 
-group gOCCFIR filter singlebit, cs_root_cause
+group gOCCFIR
+    filter singlebit,
+           cs_root_cause
 {
     /** OCCFIR[0]
      *  OCC_FW0
@@ -2590,7 +2598,8 @@ rule rN0_CHIPLET_FIR
     (N0_CHIPLET_RE_FIR >> 2) & ~N0_CHIPLET_FIR_MASK & `1fffffffffffffff`;
 };
 
-group gN0_CHIPLET_FIR filter singlebit
+group gN0_CHIPLET_FIR
+    filter singlebit
 {
     /** N0_CHIPLET_FIR[3]
      *  Attention from N0_LFIR
@@ -2624,7 +2633,8 @@ rule rN0_CHIPLET_UCS_FIR
     N0_CHIPLET_UCS_FIR & ~(N0_CHIPLET_UCS_FIR_MASK >> 1) & `7fffffffffffffff`;
 };
 
-group gN0_CHIPLET_UCS_FIR filter singlebit
+group gN0_CHIPLET_UCS_FIR
+    filter singlebit
 {
     /** N0_CHIPLET_UCS_FIR[1]
      *  Attention from NXDMAENGFIR
@@ -2655,7 +2665,9 @@ rule rN0_LFIR
     N0_LFIR & ~N0_LFIR_MASK & ~N0_LFIR_ACT0 &  N0_LFIR_ACT1;
 };
 
-group gN0_LFIR filter singlebit, cs_root_cause
+group gN0_LFIR
+    filter singlebit,
+           cs_root_cause
 {
     /** N0_LFIR[0]
      *  CFIR internal parity error
@@ -2778,7 +2790,9 @@ rule rNXCQFIR
     NXCQFIR & ~NXCQFIR_MASK &  NXCQFIR_ACT0 &  NXCQFIR_ACT1;
 };
 
-group gNXCQFIR filter singlebit, cs_root_cause
+group gNXCQFIR
+    filter singlebit,
+           cs_root_cause
 {
     /** NXCQFIR[0]
      *  PBI internal parity error
@@ -3016,7 +3030,9 @@ rule rNXDMAENGFIR
     NXDMAENGFIR & ~NXDMAENGFIR_MASK &  NXDMAENGFIR_ACT0 &  NXDMAENGFIR_ACT1;
 };
 
-group gNXDMAENGFIR filter singlebit, cs_root_cause
+group gNXDMAENGFIR
+    filter singlebit,
+           cs_root_cause
 {
     /** NXDMAENGFIR[0]
      *  DMA hang timer expired
@@ -3217,7 +3233,8 @@ rule rN1_CHIPLET_FIR
     (N1_CHIPLET_RE_FIR >> 2) & ~N1_CHIPLET_FIR_MASK & `1fffffffffffffff`;
 };
 
-group gN1_CHIPLET_FIR filter singlebit
+group gN1_CHIPLET_FIR
+    filter singlebit
 {
     /** N1_CHIPLET_FIR[3]
      *  Attention from N1_LFIR
@@ -3261,7 +3278,8 @@ rule rN1_CHIPLET_UCS_FIR
     N1_CHIPLET_UCS_FIR & ~(N1_CHIPLET_UCS_FIR_MASK >> 1) & `7fffffffffffffff`;
 };
 
-group gN1_CHIPLET_UCS_FIR filter singlebit
+group gN1_CHIPLET_UCS_FIR
+    filter singlebit
 {
     /** N1_CHIPLET_UCS_FIR[1]
      *  Attention from MCFIR 2
@@ -3290,7 +3308,8 @@ rule rN1_CHIPLET_HA_FIR
     N1_CHIPLET_HA_FIR & ~(N1_CHIPLET_HA_FIR_MASK >> 1) & `7fffffffffffffff`;
 };
 
-group gN1_CHIPLET_HA_FIR filter singlebit
+group gN1_CHIPLET_HA_FIR
+    filter singlebit
 {
     /** N1_CHIPLET_HA_FIR[1]
      *  Attention from MCFIR 2
@@ -3316,7 +3335,9 @@ rule rN1_LFIR
     N1_LFIR & ~N1_LFIR_MASK & ~N1_LFIR_ACT0 &  N1_LFIR_ACT1;
 };
 
-group gN1_LFIR filter singlebit, cs_root_cause
+group gN1_LFIR
+    filter singlebit,
+           cs_root_cause
 {
     /** N1_LFIR[0]
      *  CFIR internal parity error
@@ -3437,7 +3458,9 @@ rule rMCDFIR_0
     MCDFIR_0 & ~MCDFIR_0_MASK & ~MCDFIR_0_ACT0 &  MCDFIR_0_ACT1;
 };
 
-group gMCDFIR_0 filter singlebit, cs_root_cause
+group gMCDFIR_0
+    filter singlebit,
+           cs_root_cause
 {
     /** MCDFIR_0[0]
      *  MCD array had a unrecoverable ECC error
@@ -3513,7 +3536,9 @@ rule rMCDFIR_1
     MCDFIR_1 & ~MCDFIR_1_MASK & ~MCDFIR_1_ACT0 &  MCDFIR_1_ACT1;
 };
 
-group gMCDFIR_1 filter singlebit, cs_root_cause
+group gMCDFIR_1
+    filter singlebit,
+           cs_root_cause
 {
     /** MCDFIR_1[0]
      *  MCD array had a unrecoverable ECC error
@@ -3591,7 +3616,9 @@ rule rVASFIR
     VASFIR & ~VASFIR_MASK &  VASFIR_ACT0 &  VASFIR_ACT1;
 };
 
-group gVASFIR filter singlebit, cs_root_cause
+group gVASFIR
+    filter singlebit,
+           cs_root_cause
 {
     /** VASFIR[0]
      *  Egress Hardware Error
@@ -3872,7 +3899,8 @@ rule rN2_CHIPLET_FIR
     (N2_CHIPLET_RE_FIR >> 2) & ~N2_CHIPLET_FIR_MASK & `1fffffffffffffff`;
 };
 
-group gN2_CHIPLET_FIR filter singlebit
+group gN2_CHIPLET_FIR
+    filter singlebit
 {
     /** N2_CHIPLET_FIR[3]
      *  Attention from N2_LFIR
@@ -3931,7 +3959,8 @@ rule rN2_CHIPLET_UCS_FIR
     N2_CHIPLET_UCS_FIR & ~(N2_CHIPLET_UCS_FIR_MASK >> 1) & `7fffffffffffffff`;
 };
 
-group gN2_CHIPLET_UCS_FIR filter singlebit
+group gN2_CHIPLET_UCS_FIR
+    filter singlebit
 {
     /** N2_CHIPLET_UCS_FIR[1]
      *  Attention from CXAFIR 1
@@ -3952,7 +3981,9 @@ rule rN2_LFIR
     N2_LFIR & ~N2_LFIR_MASK & ~N2_LFIR_ACT0 &  N2_LFIR_ACT1;
 };
 
-group gN2_LFIR filter singlebit, cs_root_cause
+group gN2_LFIR
+    filter singlebit,
+           cs_root_cause
 {
     /** N2_LFIR[0]
      *  CFIR internal parity error
@@ -4073,7 +4104,9 @@ rule rPSIFIR
     PSIFIR & ~PSIFIR_MASK & ~PSIFIR_ACT0 &  PSIFIR_ACT1;
 };
 
-group gPSIFIR filter singlebit, cs_root_cause
+group gPSIFIR
+    filter singlebit,
+           cs_root_cause
 {
     /** PSIFIR[0:4]
      *  spare
@@ -4104,7 +4137,8 @@ rule rN3_CHIPLET_FIR
     (N3_CHIPLET_RE_FIR >> 2) & ~N3_CHIPLET_FIR_MASK & `1fffffffffffffff`;
 };
 
-group gN3_CHIPLET_FIR filter singlebit
+group gN3_CHIPLET_FIR
+    filter singlebit
 {
     /** N3_CHIPLET_FIR[3]
      *  Attention from N3_LFIR
@@ -4213,7 +4247,8 @@ rule rN3_CHIPLET_UCS_FIR
     N3_CHIPLET_UCS_FIR & ~(N3_CHIPLET_UCS_FIR_MASK >> 1) & `7fffffffffffffff`;
 };
 
-group gN3_CHIPLET_UCS_FIR filter singlebit
+group gN3_CHIPLET_UCS_FIR
+    filter singlebit
 {
     /** N3_CHIPLET_UCS_FIR[1]
      *  Attention from MCFIR 0
@@ -4262,7 +4297,8 @@ rule rN3_CHIPLET_HA_FIR
     N3_CHIPLET_HA_FIR & ~(N3_CHIPLET_HA_FIR_MASK >> 1) & `7fffffffffffffff`;
 };
 
-group gN3_CHIPLET_HA_FIR filter singlebit
+group gN3_CHIPLET_HA_FIR
+    filter singlebit
 {
     /** N3_CHIPLET_HA_FIR[1]
      *  Attention from MCFIR 0
@@ -4288,7 +4324,9 @@ rule rN3_LFIR
     N3_LFIR & ~N3_LFIR_MASK & ~N3_LFIR_ACT0 &  N3_LFIR_ACT1;
 };
 
-group gN3_LFIR filter singlebit, cs_root_cause
+group gN3_LFIR
+    filter singlebit,
+           cs_root_cause
 {
     /** N3_LFIR[0]
      *  CFIR internal parity error
@@ -4429,7 +4467,9 @@ rule rPBWESTFIR
     PBWESTFIR & ~PBWESTFIR_MASK & ~PBWESTFIR_ACT0 &  PBWESTFIR_ACT1;
 };
 
-group gPBWESTFIR filter singlebit, cs_root_cause
+group gPBWESTFIR
+    filter singlebit,
+           cs_root_cause
 {
     /** PBWESTFIR[0]
      *  pbeq0 hw1 error, PE in custom array
@@ -4540,7 +4580,9 @@ rule rPBCENTFIR
     PBCENTFIR & ~PBCENTFIR_MASK & ~PBCENTFIR_ACT0 &  PBCENTFIR_ACT1;
 };
 
-group gPBCENTFIR filter singlebit, cs_root_cause
+group gPBCENTFIR
+    filter singlebit,
+           cs_root_cause
 {
     /** PBCENTFIR[0]
      *  pb protocol_error
@@ -4626,7 +4668,9 @@ rule rPBEASTFIR
     PBEASTFIR & ~PBEASTFIR_MASK & ~PBEASTFIR_ACT0 &  PBEASTFIR_ACT1;
 };
 
-group gPBEASTFIR filter singlebit, cs_root_cause
+group gPBEASTFIR
+    filter singlebit,
+           cs_root_cause
 {
     /** PBEASTFIR[0]
      *  pbieq4_pbh_hw1_error
@@ -4722,7 +4766,9 @@ rule rPBPPEFIR
     PBPPEFIR & ~PBPPEFIR_MASK & ~PBPPEFIR_ACT0 &  PBPPEFIR_ACT1;
 };
 
-group gPBPPEFIR filter singlebit, cs_root_cause
+group gPBPPEFIR
+    filter singlebit,
+           cs_root_cause
 {
     /** PBPPEFIR[0]
      *  PPE asserted an internally detected err
@@ -4808,7 +4854,9 @@ rule rPBAFIR
     PBAFIR & ~PBAFIR_MASK & ~PBAFIR_ACT0 &  PBAFIR_ACT1;
 };
 
-group gPBAFIR filter singlebit, cs_root_cause
+group gPBAFIR
+    filter singlebit,
+           cs_root_cause
 {
     /** PBAFIR[0]
      *  PBA OCI Addr PE err
@@ -5044,7 +5092,9 @@ rule rPSIHBFIR
     PSIHBFIR & ~PSIHBFIR_MASK & ~PSIHBFIR_ACT0 &  PSIHBFIR_ACT1;
 };
 
-group gPSIHBFIR filter singlebit, cs_root_cause
+group gPSIHBFIR
+    filter singlebit,
+           cs_root_cause
 {
     /** PSIHBFIR[0]
      *  CE from PowerBus data
@@ -5195,7 +5245,9 @@ rule rENHCAFIR
     ENHCAFIR & ~ENHCAFIR_MASK & ~ENHCAFIR_ACT0 &  ENHCAFIR_ACT1;
 };
 
-group gENHCAFIR filter singlebit, cs_root_cause
+group gENHCAFIR
+    filter singlebit,
+           cs_root_cause
 {
     /** ENHCAFIR[0]
      *  PB0 data UE
@@ -5331,7 +5383,9 @@ rule rPBAMFIR
     PBAMFIR & ~PBAMFIR_MASK & ~PBAMFIR_ACT0 &  PBAMFIR_ACT1;
 };
 
-group gPBAMFIR filter singlebit, cs_root_cause
+group gPBAMFIR
+    filter singlebit,
+           cs_root_cause
 {
     /** PBAMFIR[0]
      *  action0_for_invalid_transfer_size
@@ -5404,7 +5458,9 @@ rule rNMMUCQFIR
     NMMUCQFIR & ~NMMUCQFIR_MASK &  NMMUCQFIR_ACT0 &  NMMUCQFIR_ACT1;
 };
 
-group gNMMUCQFIR filter singlebit, cs_root_cause
+group gNMMUCQFIR
+    filter singlebit,
+           cs_root_cause
 {
     /** NMMUCQFIR[0]
      *  PBI_PE_FIR: PBI internal parity error
@@ -5532,7 +5588,9 @@ rule rNMMUFIR
     NMMUFIR & ~NMMUFIR_MASK &  NMMUFIR_ACT0 &  NMMUFIR_ACT1;
 };
 
-group gNMMUFIR filter singlebit, cs_root_cause
+group gNMMUFIR
+    filter singlebit,
+           cs_root_cause
 {
     /** NMMUFIR[0]
      *  Fabric DIn xlat array CE error detected.
@@ -5788,7 +5846,9 @@ rule rINTCQFIR
     INTCQFIR & ~INTCQFIR_MASK & ~INTCQFIR_ACT0 &  INTCQFIR_ACT1;
 };
 
-group gINTCQFIR filter singlebit, cs_root_cause
+group gINTCQFIR
+    filter singlebit,
+           cs_root_cause
 {
     /** INTCQFIR[0]
      *  INT_CQ_FIR_PI_ECC_CE:
@@ -6079,7 +6139,9 @@ rule rPBIOEFIR
     PBIOEFIR & ~PBIOEFIR_MASK & ~PBIOEFIR_ACT0 &  PBIOEFIR_ACT1;
 };
 
-group gPBIOEFIR filter singlebit, cs_root_cause( 8, 11, 14 )
+group gPBIOEFIR
+    filter singlebit,
+           cs_root_cause(8,11,14)
 {
     /** PBIOEFIR[0]
      *  fmr00 trained
@@ -6375,7 +6437,9 @@ rule rPBIOOFIR
     PBIOOFIR & ~PBIOOFIR_MASK & ~PBIOOFIR_ACT0 &  PBIOOFIR_ACT1;
 };
 
-group gPBIOOFIR filter singlebit, cs_root_cause( 8, 11, 14, 17 )
+group gPBIOOFIR
+    filter singlebit,
+           cs_root_cause(8,11,14,17)
 {
     /** PBIOOFIR[0]
      *  fmr00 trained
@@ -6708,7 +6772,9 @@ rule rNPU0FIR
     NPU0FIR & ~NPU0FIR_MASK &  NPU0FIR_ACT0 &  NPU0FIR_ACT1;
 };
 
-group gNPU0FIR filter singlebit, cs_root_cause( 1, 2, 3, 4, 5, 6, 7, 9, 10, 16, 18, 29, 31, 42, 44 )
+group gNPU0FIR
+    filter singlebit,
+           cs_root_cause(1,2,3,4,5,6,7,9,10,16,18,29,31,42,44)
 {
     /** NPU0FIR[0]
      *  NTL array CE
@@ -6981,7 +7047,9 @@ rule rNPU1FIR
     NPU1FIR & ~NPU1FIR_MASK &  NPU1FIR_ACT0 &  NPU1FIR_ACT1;
 };
 
-group gNPU1FIR filter singlebit, cs_root_cause( 0, 2, 4, 6, 8, 10, 13, 14, 15, 20, 25, 27, 28, 29, 31, 32, 33, 34, 35 )
+group gNPU1FIR
+    filter singlebit,
+           cs_root_cause(0,2,4,6,8,10,13,14,15,20,25,27,28,29,31,32,33,34,35)
 {
     /** NPU1FIR[0]
      *  NDL Brick0 stall
@@ -7204,7 +7272,9 @@ rule rNPU2FIR
     NPU2FIR & ~NPU2FIR_MASK &  NPU2FIR_ACT0 &  NPU2FIR_ACT1;
 };
 
-group gNPU2FIR filter singlebit, cs_root_cause
+group gNPU2FIR
+    filter singlebit,
+           cs_root_cause
 {
     /** NPU2FIR[0]
      *  OTL Brick2 translation fault
@@ -7465,7 +7535,8 @@ rule rXB_CHIPLET_FIR
     (XB_CHIPLET_RE_FIR >> 2) & ~XB_CHIPLET_FIR_MASK & `1fffffffffffffff`;
 };
 
-group gXB_CHIPLET_FIR filter singlebit
+group gXB_CHIPLET_FIR
+    filter singlebit
 {
     /** XB_CHIPLET_FIR[3]
      *  Attention from XB_LFIR
@@ -7519,7 +7590,8 @@ rule rXB_CHIPLET_UCS_FIR
     XB_CHIPLET_UCS_FIR & ~(XB_CHIPLET_UCS_FIR_MASK >> 1) & `7fffffffffffffff`;
 };
 
-group gXB_CHIPLET_UCS_FIR filter singlebit
+group gXB_CHIPLET_UCS_FIR
+    filter singlebit
 {
     /** XB_CHIPLET_UCS_FIR[1]
      *  Attention from IOELFIR 0
@@ -7570,7 +7642,9 @@ rule rXB_LFIR
     XB_LFIR & ~XB_LFIR_MASK & ~XB_LFIR_ACT0 &  XB_LFIR_ACT1;
 };
 
-group gXB_LFIR filter singlebit, cs_root_cause
+group gXB_LFIR
+    filter singlebit,
+           cs_root_cause
 {
     /** XB_LFIR[0]
      *  CFIR internal parity error
@@ -7678,7 +7752,9 @@ rule rXBPPEFIR
     XBPPEFIR & ~XBPPEFIR_MASK &  XBPPEFIR_ACT0 &  XBPPEFIR_ACT1;
 };
 
-group gXBPPEFIR filter singlebit, cs_root_cause
+group gXBPPEFIR
+    filter singlebit,
+           cs_root_cause
 {
     /** XBPPEFIR[0]
      *  PPE general error.
@@ -7759,7 +7835,8 @@ rule rPCI0_CHIPLET_FIR
     (PCI0_CHIPLET_RE_FIR >> 2) & ~PCI0_CHIPLET_FIR_MASK & `1fffffffffffffff`;
 };
 
-group gPCI0_CHIPLET_FIR filter singlebit
+group gPCI0_CHIPLET_FIR
+    filter singlebit
 {
     /** PCI0_CHIPLET_FIR[3]
      *  Attention from PCI_LFIR 0
@@ -7795,7 +7872,8 @@ rule rPCI1_CHIPLET_FIR
     (PCI1_CHIPLET_RE_FIR >> 2) & ~PCI1_CHIPLET_FIR_MASK & `1fffffffffffffff`;
 };
 
-group gPCI1_CHIPLET_FIR filter singlebit
+group gPCI1_CHIPLET_FIR
+    filter singlebit
 {
     /** PCI1_CHIPLET_FIR[3]
      *  Attention from PCI_LFIR 1
@@ -7841,7 +7919,8 @@ rule rPCI2_CHIPLET_FIR
     (PCI2_CHIPLET_RE_FIR >> 2) & ~PCI2_CHIPLET_FIR_MASK & `1fffffffffffffff`;
 };
 
-group gPCI2_CHIPLET_FIR filter singlebit
+group gPCI2_CHIPLET_FIR
+    filter singlebit
 {
     /** PCI2_CHIPLET_FIR[3]
      *  Attention from PCI_LFIR 2
diff --git a/src/usr/diag/prdf/common/plat/cumulus/cumulus_xbus.rule b/src/usr/diag/prdf/common/plat/cumulus/cumulus_xbus.rule
index 341f7a7d1..5e16a6e04 100644
--- a/src/usr/diag/prdf/common/plat/cumulus/cumulus_xbus.rule
+++ b/src/usr/diag/prdf/common/plat/cumulus/cumulus_xbus.rule
@@ -154,7 +154,8 @@ rule rXBUS
 
 };
 
-group gXBUS attntype CHECK_STOP, RECOVERABLE, UNIT_CS filter singlebit
+group gXBUS attntype CHECK_STOP, RECOVERABLE, UNIT_CS
+    filter singlebit
 {
     (rXBUS, bit(0)) ? analyze(gIOXBFIR);
     (rXBUS, bit(1)) ? analyze(gIOELFIR);
@@ -174,7 +175,9 @@ rule rIOXBFIR
     IOXBFIR & ~IOXBFIR_MASK &  IOXBFIR_ACT0 &  IOXBFIR_ACT1;
 };
 
-group gIOXBFIR filter singlebit, cs_root_cause
+group gIOXBFIR
+    filter singlebit,
+           cs_root_cause
 {
     /** IOXBFIR[0]
      *  RX_INVALID_STATE_OR_PARITY_ERROR
@@ -372,7 +375,9 @@ rule rIOELFIR
     IOELFIR & ~IOELFIR_MASK &  IOELFIR_ACT0 &  IOELFIR_ACT1;
 };
 
-group gIOELFIR filter singlebit, cs_root_cause( 54, 55, 56, 57, 58, 59 )
+group gIOELFIR
+    filter singlebit,
+           cs_root_cause(54,55,56,57,58,59)
 {
     /** IOELFIR[0]
      *  link0 trained
diff --git a/src/usr/diag/prdf/common/plat/nimbus/nimbus_capp.rule b/src/usr/diag/prdf/common/plat/nimbus/nimbus_capp.rule
index 0d0c570c4..14fde9bc2 100644
--- a/src/usr/diag/prdf/common/plat/nimbus/nimbus_capp.rule
+++ b/src/usr/diag/prdf/common/plat/nimbus/nimbus_capp.rule
@@ -112,7 +112,8 @@ rule rCAPP
 
 };
 
-group gCAPP attntype CHECK_STOP, RECOVERABLE, UNIT_CS filter singlebit
+group gCAPP attntype CHECK_STOP, RECOVERABLE, UNIT_CS
+    filter singlebit
 {
     (rCAPP, bit(0)) ? analyze(gCXAFIR);
 };
@@ -131,7 +132,9 @@ rule rCXAFIR
     CXAFIR & ~CXAFIR_MASK &  CXAFIR_ACT0 &  CXAFIR_ACT1;
 };
 
-group gCXAFIR filter singlebit, cs_root_cause
+group gCXAFIR
+    filter singlebit,
+           cs_root_cause
 {
     /** CXAFIR[0]
      *  CXA Informational PE
diff --git a/src/usr/diag/prdf/common/plat/nimbus/nimbus_ec.rule b/src/usr/diag/prdf/common/plat/nimbus/nimbus_ec.rule
index 127c46271..cf9838dbf 100644
--- a/src/usr/diag/prdf/common/plat/nimbus/nimbus_ec.rule
+++ b/src/usr/diag/prdf/common/plat/nimbus/nimbus_ec.rule
@@ -191,7 +191,8 @@ rule rEC_CHIPLET_FIR
     (EC_CHIPLET_RE_FIR >> 2) & ~EC_CHIPLET_FIR_MASK & `3fffffffffffffff`;
 };
 
-group gEC_CHIPLET_FIR attntype CHECK_STOP, RECOVERABLE filter singlebit
+group gEC_CHIPLET_FIR attntype CHECK_STOP, RECOVERABLE
+    filter singlebit
 {
     /** EC_CHIPLET_FIR[2]
      *  Unit Checkstop from COREFIR (bit0 in RER)
@@ -220,7 +221,8 @@ rule rEC_CHIPLET_UCS_FIR
     EC_CHIPLET_UCS_FIR & ~(EC_CHIPLET_UCS_FIR_MASK >> 1) & `7fffffffffffffff`;
 };
 
-group gEC_CHIPLET_UCS_FIR attntype UNIT_CS filter singlebit
+group gEC_CHIPLET_UCS_FIR attntype UNIT_CS
+    filter singlebit
 {
     /** EC_CHIPLET_UCS_FIR[1]
      *  Attention from COREFIR
@@ -241,7 +243,9 @@ rule rEC_LFIR
     EC_LFIR & ~EC_LFIR_MASK & ~EC_LFIR_ACT0 &  EC_LFIR_ACT1;
 };
 
-group gEC_LFIR filter singlebit, cs_root_cause
+group gEC_LFIR
+    filter singlebit,
+           cs_root_cause
 {
     /** EC_LFIR[0]
      *  CFIR internal parity error
@@ -329,7 +333,9 @@ rule rCOREFIR
     COREFIR & ~COREFIR_MASK &  COREFIR_ACT0 &  COREFIR_ACT1;
 };
 
-group gCOREFIR filter priority(0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,58,59,60,61,62,63,57), cs_root_cause
+group gCOREFIR
+    filter priority(0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,58,59,60,61,62,63,57),
+           cs_root_cause
 {
     /** COREFIR[0]
      *  IFU SRAM Recoverable error
diff --git a/src/usr/diag/prdf/common/plat/nimbus/nimbus_eq.rule b/src/usr/diag/prdf/common/plat/nimbus/nimbus_eq.rule
index 08c5c3a9e..12acedcb6 100644
--- a/src/usr/diag/prdf/common/plat/nimbus/nimbus_eq.rule
+++ b/src/usr/diag/prdf/common/plat/nimbus/nimbus_eq.rule
@@ -132,7 +132,8 @@ rule rEQ_CHIPLET_FIR
     (EQ_CHIPLET_RE_FIR >> 2) & ~EQ_CHIPLET_FIR_MASK & `1fffffffffffffff`;
 };
 
-group gEQ_CHIPLET_FIR attntype CHECK_STOP, RECOVERABLE filter singlebit
+group gEQ_CHIPLET_FIR attntype CHECK_STOP, RECOVERABLE
+    filter singlebit
 {
     /** EQ_CHIPLET_FIR[3]
      *  Attention from EQ_LFIR
@@ -193,7 +194,9 @@ rule rEQ_LFIR
     EQ_LFIR & ~EQ_LFIR_MASK & ~EQ_LFIR_ACT0 &  EQ_LFIR_ACT1;
 };
 
-group gEQ_LFIR filter singlebit, cs_root_cause
+group gEQ_LFIR
+    filter singlebit,
+           cs_root_cause
 {
     /** EQ_LFIR[0]
      *  CFIR internal parity error
diff --git a/src/usr/diag/prdf/common/plat/nimbus/nimbus_ex.rule b/src/usr/diag/prdf/common/plat/nimbus/nimbus_ex.rule
index dc9e92251..b24b89a4d 100644
--- a/src/usr/diag/prdf/common/plat/nimbus/nimbus_ex.rule
+++ b/src/usr/diag/prdf/common/plat/nimbus/nimbus_ex.rule
@@ -226,7 +226,8 @@ rule rEX
 
 };
 
-group gEX attntype CHECK_STOP, RECOVERABLE filter singlebit
+group gEX attntype CHECK_STOP, RECOVERABLE
+    filter singlebit
 {
     (rEX, bit(0)) ? analyze(gL2FIR);
     (rEX, bit(1)) ? analyze(gNCUFIR);
@@ -246,7 +247,9 @@ rule rL2FIR
     L2FIR & ~L2FIR_MASK & ~L2FIR_ACT0 &  L2FIR_ACT1;
 };
 
-group gL2FIR filter singlebit, cs_root_cause( 1, 17, 18, 20 )
+group gL2FIR
+    filter singlebit,
+           cs_root_cause(1,17,18,20)
 {
     /** L2FIR[0]
      *  L2 cache read CE
@@ -442,7 +445,9 @@ rule rNCUFIR
     NCUFIR & ~NCUFIR_MASK & ~NCUFIR_ACT0 &  NCUFIR_ACT1;
 };
 
-group gNCUFIR filter singlebit, cs_root_cause( 3, 4, 7, 8 )
+group gNCUFIR
+    filter singlebit,
+           cs_root_cause(3,4,7,8)
 {
     /** NCUFIR[0]
      *  NCU store queue control error
@@ -583,7 +588,9 @@ rule rL3FIR
     L3FIR & ~L3FIR_MASK & ~L3FIR_ACT0 &  L3FIR_ACT1;
 };
 
-group gL3FIR filter singlebit, cs_root_cause( 5, 8, 11, 17, 21 )
+group gL3FIR
+    filter singlebit,
+           cs_root_cause(5,8,11,17,21)
 {
     /** L3FIR[0]
      *  L3_RDDSP_SEGR_LCO_ALL_MEM_UNAVAIL_ERR
@@ -769,7 +776,9 @@ rule rCMEFIR
     CMEFIR & ~CMEFIR_MASK & ~CMEFIR_ACT0 &  CMEFIR_ACT1;
 };
 
-group gCMEFIR filter singlebit, cs_root_cause
+group gCMEFIR
+    filter singlebit,
+           cs_root_cause
 {
     /** CMEFIR[0]
      *  PPE asserted an internal error
diff --git a/src/usr/diag/prdf/common/plat/nimbus/nimbus_mca.rule b/src/usr/diag/prdf/common/plat/nimbus/nimbus_mca.rule
index 30b2f43ce..bf0dc83d5 100644
--- a/src/usr/diag/prdf/common/plat/nimbus/nimbus_mca.rule
+++ b/src/usr/diag/prdf/common/plat/nimbus/nimbus_mca.rule
@@ -210,7 +210,8 @@ rule rMCA
 
 };
 
-group gMCA attntype CHECK_STOP, RECOVERABLE, UNIT_CS, HOST_ATTN filter singlebit
+group gMCA attntype CHECK_STOP, RECOVERABLE, UNIT_CS, HOST_ATTN
+    filter singlebit
 {
     (rMCA, bit(0)) ? analyze(gMCACALFIR);
     (rMCA, bit(1)) ? analyze(gMCAECCFIR);
@@ -233,7 +234,9 @@ rule rMCACALFIR
     MCACALFIR & ~MCACALFIR_MASK &  MCACALFIR_ACT0 &  MCACALFIR_ACT1;
 };
 
-group gMCACALFIR filter priority( 13 ), cs_root_cause( 4, 13, 14 )
+group gMCACALFIR
+    filter priority(13),
+           cs_root_cause(4,13,14)
 {
     /** MCACALFIR[0]
      *  A MBA recoverable error has occurred.
@@ -343,8 +346,9 @@ rule rMCAECCFIR
     MCAECCFIR & ~MCAECCFIR_MASK &  MCAECCFIR_ACT0 &  MCAECCFIR_ACT1;
 };
 
-group gMCAECCFIR filter priority( 14, 17, 37 ), # ensure UEs handled before NCEs
-                 cs_root_cause(   14, 17, 37 )
+group gMCAECCFIR
+    filter priority(14,17,37),
+           cs_root_cause(14,17,37)
 {
     /** MCAECCFIR[0]
      *  Mainline read MPE on rank 0
@@ -645,7 +649,9 @@ rule rDDRPHYFIR
     DDRPHYFIR & ~DDRPHYFIR_MASK & ~DDRPHYFIR_ACT0 &  DDRPHYFIR_ACT1;
 };
 
-group gDDRPHYFIR filter singlebit, cs_root_cause
+group gDDRPHYFIR
+    filter singlebit,
+           cs_root_cause
 {
     /** DDRPHYFIR[54]
      *  Non-recoverable FSM error
diff --git a/src/usr/diag/prdf/common/plat/nimbus/nimbus_mcbist.rule b/src/usr/diag/prdf/common/plat/nimbus/nimbus_mcbist.rule
index 7735d8341..1f61719a7 100644
--- a/src/usr/diag/prdf/common/plat/nimbus/nimbus_mcbist.rule
+++ b/src/usr/diag/prdf/common/plat/nimbus/nimbus_mcbist.rule
@@ -208,7 +208,8 @@ rule rMC_CHIPLET_FIR
     (MC_CHIPLET_RE_FIR >> 2) & ~MC_CHIPLET_FIR_MASK & `1fffffffffffffff`;
 };
 
-group gMC_CHIPLET_FIR attntype CHECK_STOP, RECOVERABLE filter singlebit
+group gMC_CHIPLET_FIR attntype CHECK_STOP, RECOVERABLE
+    filter singlebit
 {
     /** MC_CHIPLET_FIR[3]
      *  Attention from MC_LFIR
@@ -292,7 +293,8 @@ rule rMC_CHIPLET_UCS_FIR
     MC_CHIPLET_UCS_FIR & ~(MC_CHIPLET_UCS_FIR_MASK >> 1) & `7fffffffffffffff`;
 };
 
-group gMC_CHIPLET_UCS_FIR attntype UNIT_CS filter singlebit
+group gMC_CHIPLET_UCS_FIR attntype UNIT_CS
+    filter singlebit
 {
     /** MC_CHIPLET_UCS_FIR[1]
      *  Attention from MCAECCFIR 0
@@ -351,7 +353,8 @@ rule rMC_CHIPLET_HA_FIR
     MC_CHIPLET_HA_FIR & ~(MC_CHIPLET_HA_FIR_MASK >> 1) & `7fffffffffffffff`;
 };
 
-group gMC_CHIPLET_HA_FIR attntype HOST_ATTN filter singlebit
+group gMC_CHIPLET_HA_FIR attntype HOST_ATTN
+    filter singlebit
 {
     /** MC_CHIPLET_HA_FIR[1]
      *  Attention from MCAECCFIR 0
@@ -412,7 +415,9 @@ rule rMC_LFIR
     MC_LFIR & ~MC_LFIR_MASK & ~MC_LFIR_ACT0 &  MC_LFIR_ACT1;
 };
 
-group gMC_LFIR filter singlebit, cs_root_cause
+group gMC_LFIR
+    filter singlebit,
+           cs_root_cause
 {
     /** MC_LFIR[0]
      *  CFIR internal parity error
@@ -522,7 +527,9 @@ rule rMCBISTFIR
     MCBISTFIR & ~MCBISTFIR_MASK &  MCBISTFIR_ACT0 &  MCBISTFIR_ACT1;
 };
 
-group gMCBISTFIR filter singlebit, cs_root_cause
+group gMCBISTFIR
+    filter singlebit,
+           cs_root_cause
 {
     /** MCBISTFIR[0]
      *  INVALID_MAINT_ADDRESS
diff --git a/src/usr/diag/prdf/common/plat/nimbus/nimbus_mcs.rule b/src/usr/diag/prdf/common/plat/nimbus/nimbus_mcs.rule
index 827b7a1a5..9e456e591 100644
--- a/src/usr/diag/prdf/common/plat/nimbus/nimbus_mcs.rule
+++ b/src/usr/diag/prdf/common/plat/nimbus/nimbus_mcs.rule
@@ -119,7 +119,8 @@ rule rMCS
 
 };
 
-group gMCS attntype CHECK_STOP, RECOVERABLE, UNIT_CS, HOST_ATTN filter singlebit
+group gMCS attntype CHECK_STOP, RECOVERABLE, UNIT_CS, HOST_ATTN
+    filter singlebit
 {
     (rMCS, bit(0)) ? analyze(gMCFIR);
 };
@@ -140,7 +141,9 @@ rule rMCFIR
     MCFIR & ~MCFIR_MASK &  MCFIR_ACT0 &  MCFIR_ACT1;
 };
 
-group gMCFIR filter singlebit, cs_root_cause( 0, 6, 8, 9 )
+group gMCFIR
+    filter singlebit,
+           cs_root_cause(0,6,8,9)
 {
     /** MCFIR[0]
      *  mc internal recoverable eror
diff --git a/src/usr/diag/prdf/common/plat/nimbus/nimbus_obus.rule b/src/usr/diag/prdf/common/plat/nimbus/nimbus_obus.rule
index 058b0b42d..86217c0ce 100644
--- a/src/usr/diag/prdf/common/plat/nimbus/nimbus_obus.rule
+++ b/src/usr/diag/prdf/common/plat/nimbus/nimbus_obus.rule
@@ -262,7 +262,8 @@ rule rOB_CHIPLET_FIR
     (OB_CHIPLET_RE_FIR >> 2) & ~OB_CHIPLET_FIR_MASK & `1fffffffffffffff`;
 };
 
-group gOB_CHIPLET_FIR attntype CHECK_STOP, RECOVERABLE filter singlebit
+group gOB_CHIPLET_FIR attntype CHECK_STOP, RECOVERABLE
+    filter singlebit
 {
     /** OB_CHIPLET_FIR[3]
      *  Attention from OB_LFIR
@@ -296,7 +297,8 @@ rule rOB_CHIPLET_UCS_FIR
     OB_CHIPLET_UCS_FIR & ~(OB_CHIPLET_UCS_FIR_MASK >> 1) & `7fffffffffffffff`;
 };
 
-group gOB_CHIPLET_UCS_FIR attntype UNIT_CS filter singlebit
+group gOB_CHIPLET_UCS_FIR attntype UNIT_CS
+    filter singlebit
 {
     /** OB_CHIPLET_UCS_FIR[2]
      *  Attention from IOOBFIR
@@ -322,7 +324,9 @@ rule rOB_LFIR
     OB_LFIR & ~OB_LFIR_MASK & ~OB_LFIR_ACT0 &  OB_LFIR_ACT1;
 };
 
-group gOB_LFIR filter singlebit, cs_root_cause
+group gOB_LFIR
+    filter singlebit,
+           cs_root_cause
 {
     /** OB_LFIR[0]
      *  CFIR internal parity error
@@ -418,7 +422,9 @@ rule rIOOLFIR
     IOOLFIR & ~IOOLFIR_MASK & ~IOOLFIR_ACT0 &  IOOLFIR_ACT1;
 };
 
-group gIOOLFIR filter singlebit, cs_root_cause( 54, 55, 56, 57, 58, 59 )
+group gIOOLFIR
+    filter singlebit,
+           cs_root_cause(54,55,56,57,58,59)
 {
     /** IOOLFIR[0]
      *  link0 trained
@@ -756,7 +762,9 @@ rule rIOOBFIR
     IOOBFIR & ~IOOBFIR_MASK &  IOOBFIR_ACT0 &  IOOBFIR_ACT1;
 };
 
-group gIOOBFIR filter singlebit, cs_root_cause
+group gIOOBFIR
+    filter singlebit,
+           cs_root_cause
 {
     /** IOOBFIR[0]
      *  A RX state machine error
@@ -804,7 +812,9 @@ rule rOBPPEFIR
     OBPPEFIR & ~OBPPEFIR_MASK &  OBPPEFIR_ACT0 &  OBPPEFIR_ACT1;
 };
 
-group gOBPPEFIR filter singlebit, cs_root_cause
+group gOBPPEFIR
+    filter singlebit,
+           cs_root_cause
 {
     /** OBPPEFIR[0:3]
      *  PPE general error.
diff --git a/src/usr/diag/prdf/common/plat/nimbus/nimbus_pec.rule b/src/usr/diag/prdf/common/plat/nimbus/nimbus_pec.rule
index 841601a96..4cca4567c 100644
--- a/src/usr/diag/prdf/common/plat/nimbus/nimbus_pec.rule
+++ b/src/usr/diag/prdf/common/plat/nimbus/nimbus_pec.rule
@@ -147,7 +147,8 @@ rule rPEC
 
 };
 
-group gPEC attntype CHECK_STOP, RECOVERABLE filter singlebit
+group gPEC attntype CHECK_STOP, RECOVERABLE
+    filter singlebit
 {
     (rPEC, bit(0)) ? analyze(gPCI_LFIR);
     (rPEC, bit(1)) ? analyze(gIOPCIFIR);
@@ -165,7 +166,9 @@ rule rPCI_LFIR
     PCI_LFIR & ~PCI_LFIR_MASK & ~PCI_LFIR_ACT0 &  PCI_LFIR_ACT1;
 };
 
-group gPCI_LFIR filter singlebit, cs_root_cause
+group gPCI_LFIR
+    filter singlebit,
+           cs_root_cause
 {
     /** PCI_LFIR[0]
      *  CFIR internal parity error
@@ -261,7 +264,9 @@ rule rIOPCIFIR
     IOPCIFIR & ~IOPCIFIR_MASK & ~IOPCIFIR_ACT0 &  IOPCIFIR_ACT1;
 };
 
-group gIOPCIFIR filter singlebit, cs_root_cause
+group gIOPCIFIR
+    filter singlebit,
+           cs_root_cause
 {
     /** IOPCIFIR[0]
      *  HSS ZCAL Calibration Error
diff --git a/src/usr/diag/prdf/common/plat/nimbus/nimbus_phb.rule b/src/usr/diag/prdf/common/plat/nimbus/nimbus_phb.rule
index ab590c10c..0cfbdc31f 100644
--- a/src/usr/diag/prdf/common/plat/nimbus/nimbus_phb.rule
+++ b/src/usr/diag/prdf/common/plat/nimbus/nimbus_phb.rule
@@ -185,7 +185,8 @@ rule rPHB
 
 };
 
-group gPHB attntype CHECK_STOP, RECOVERABLE filter singlebit
+group gPHB attntype CHECK_STOP, RECOVERABLE
+    filter singlebit
 {
     (rPHB, bit(0)) ? analyze(gPHBNFIR);
     (rPHB, bit(1)) ? analyze(gPCIFIR);
@@ -204,7 +205,9 @@ rule rPHBNFIR
     PHBNFIR & ~PHBNFIR_MASK & ~PHBNFIR_ACT0 &  PHBNFIR_ACT1;
 };
 
-group gPHBNFIR filter singlebit, cs_root_cause
+group gPHBNFIR
+    filter singlebit,
+           cs_root_cause
 {
     /** PHBNFIR[0]
      *  BAR Parity Error
@@ -370,7 +373,9 @@ rule rPCIFIR
     PCIFIR & ~PCIFIR_MASK & ~PCIFIR_ACT0 &  PCIFIR_ACT1;
 };
 
-group gPCIFIR filter singlebit, cs_root_cause
+group gPCIFIR
+    filter singlebit,
+           cs_root_cause
 {
     /** PCIFIR[0]
      *  PBAIB register parity error
@@ -421,7 +426,9 @@ rule rETUFIR
     ETUFIR & ~ETUFIR_MASK & ~ETUFIR_ACT0 &  ETUFIR_ACT1;
 };
 
-group gETUFIR filter singlebit, cs_root_cause
+group gETUFIR
+    filter singlebit,
+           cs_root_cause
 {
     /** ETUFIR[0]
      *  AIB_COMMAND_INVALID
diff --git a/src/usr/diag/prdf/common/plat/nimbus/nimbus_proc.rule b/src/usr/diag/prdf/common/plat/nimbus/nimbus_proc.rule
index 96b00dd95..6072d622d 100644
--- a/src/usr/diag/prdf/common/plat/nimbus/nimbus_proc.rule
+++ b/src/usr/diag/prdf/common/plat/nimbus/nimbus_proc.rule
@@ -1547,7 +1547,8 @@ rule rGLOBAL_FIR
     GLOBAL_RE_FIR;
 };
 
-group gGLOBAL_FIR attntype CHECK_STOP, RECOVERABLE filter singlebit
+group gGLOBAL_FIR attntype CHECK_STOP, RECOVERABLE
+    filter singlebit
 {
     /** GLOBAL_FIR[1]
      *  Attention from TP chiplet
@@ -1776,7 +1777,8 @@ rule rGLOBAL_UCS_FIR
     GLOBAL_UCS_FIR;
 };
 
-group gGLOBAL_UCS_FIR attntype UNIT_CS filter singlebit
+group gGLOBAL_UCS_FIR attntype UNIT_CS
+    filter singlebit
 {
     /** GLOBAL_UCS_FIR[2]
      *  Attention from N0 chiplet
@@ -1955,7 +1957,8 @@ rule rGLOBAL_HA_FIR
     GLOBAL_HA_FIR;
 };
 
-group gGLOBAL_HA_FIR attntype HOST_ATTN filter singlebit
+group gGLOBAL_HA_FIR attntype HOST_ATTN
+    filter singlebit
 {
     /** GLOBAL_HA_FIR[3]
      *  Attention from N1 chiplet
@@ -1991,7 +1994,8 @@ rule rTP_CHIPLET_FIR
     (TP_CHIPLET_RE_FIR >> 2) & ~TP_CHIPLET_FIR_MASK & `1fffffffffffffff`;
 };
 
-group gTP_CHIPLET_FIR filter singlebit
+group gTP_CHIPLET_FIR
+    filter singlebit
 {
     /** TP_CHIPLET_FIR[3]
      *  Attention from TP_LFIR
@@ -2017,7 +2021,9 @@ rule rTP_LFIR
     TP_LFIR & ~TP_LFIR_MASK & ~TP_LFIR_ACT0 &  TP_LFIR_ACT1;
 };
 
-group gTP_LFIR filter singlebit, cs_root_cause
+group gTP_LFIR
+    filter singlebit,
+           cs_root_cause
 {
     /** TP_LFIR[0]
      *  CFIR internal parity error
@@ -2243,7 +2249,9 @@ rule rOCCFIR
     OCCFIR & ~OCCFIR_MASK & ~OCCFIR_ACT0 &  OCCFIR_ACT1;
 };
 
-group gOCCFIR filter singlebit, cs_root_cause
+group gOCCFIR
+    filter singlebit,
+           cs_root_cause
 {
     /** OCCFIR[0]
      *  OCC_FW0
@@ -2569,7 +2577,8 @@ rule rN0_CHIPLET_FIR
     (N0_CHIPLET_RE_FIR >> 2) & ~N0_CHIPLET_FIR_MASK & `1fffffffffffffff`;
 };
 
-group gN0_CHIPLET_FIR filter singlebit
+group gN0_CHIPLET_FIR
+    filter singlebit
 {
     /** N0_CHIPLET_FIR[3]
      *  Attention from N0_LFIR
@@ -2603,7 +2612,8 @@ rule rN0_CHIPLET_UCS_FIR
     N0_CHIPLET_UCS_FIR & ~(N0_CHIPLET_UCS_FIR_MASK >> 1) & `7fffffffffffffff`;
 };
 
-group gN0_CHIPLET_UCS_FIR filter singlebit
+group gN0_CHIPLET_UCS_FIR
+    filter singlebit
 {
     /** N0_CHIPLET_UCS_FIR[1]
      *  Attention from NXDMAENGFIR
@@ -2634,7 +2644,9 @@ rule rN0_LFIR
     N0_LFIR & ~N0_LFIR_MASK & ~N0_LFIR_ACT0 &  N0_LFIR_ACT1;
 };
 
-group gN0_LFIR filter singlebit, cs_root_cause
+group gN0_LFIR
+    filter singlebit,
+           cs_root_cause
 {
     /** N0_LFIR[0]
      *  CFIR internal parity error
@@ -2757,7 +2769,9 @@ rule rNXCQFIR
     NXCQFIR & ~NXCQFIR_MASK &  NXCQFIR_ACT0 &  NXCQFIR_ACT1;
 };
 
-group gNXCQFIR filter singlebit, cs_root_cause
+group gNXCQFIR
+    filter singlebit,
+           cs_root_cause
 {
     /** NXCQFIR[0]
      *  PBI internal parity error
@@ -2995,7 +3009,9 @@ rule rNXDMAENGFIR
     NXDMAENGFIR & ~NXDMAENGFIR_MASK &  NXDMAENGFIR_ACT0 &  NXDMAENGFIR_ACT1;
 };
 
-group gNXDMAENGFIR filter singlebit, cs_root_cause
+group gNXDMAENGFIR
+    filter singlebit,
+           cs_root_cause
 {
     /** NXDMAENGFIR[0]
      *  DMA hang timer expired
@@ -3196,7 +3212,8 @@ rule rN1_CHIPLET_FIR
     (N1_CHIPLET_RE_FIR >> 2) & ~N1_CHIPLET_FIR_MASK & `1fffffffffffffff`;
 };
 
-group gN1_CHIPLET_FIR filter singlebit
+group gN1_CHIPLET_FIR
+    filter singlebit
 {
     /** N1_CHIPLET_FIR[3]
      *  Attention from N1_LFIR
@@ -3240,7 +3257,8 @@ rule rN1_CHIPLET_UCS_FIR
     N1_CHIPLET_UCS_FIR & ~(N1_CHIPLET_UCS_FIR_MASK >> 1) & `7fffffffffffffff`;
 };
 
-group gN1_CHIPLET_UCS_FIR filter singlebit
+group gN1_CHIPLET_UCS_FIR
+    filter singlebit
 {
     /** N1_CHIPLET_UCS_FIR[1]
      *  Attention from MCFIR 2
@@ -3269,7 +3287,8 @@ rule rN1_CHIPLET_HA_FIR
     N1_CHIPLET_HA_FIR & ~(N1_CHIPLET_HA_FIR_MASK >> 1) & `7fffffffffffffff`;
 };
 
-group gN1_CHIPLET_HA_FIR filter singlebit
+group gN1_CHIPLET_HA_FIR
+    filter singlebit
 {
     /** N1_CHIPLET_HA_FIR[1]
      *  Attention from MCFIR 2
@@ -3295,7 +3314,9 @@ rule rN1_LFIR
     N1_LFIR & ~N1_LFIR_MASK & ~N1_LFIR_ACT0 &  N1_LFIR_ACT1;
 };
 
-group gN1_LFIR filter singlebit, cs_root_cause
+group gN1_LFIR
+    filter singlebit,
+           cs_root_cause
 {
     /** N1_LFIR[0]
      *  CFIR internal parity error
@@ -3416,7 +3437,9 @@ rule rMCDFIR_0
     MCDFIR_0 & ~MCDFIR_0_MASK & ~MCDFIR_0_ACT0 &  MCDFIR_0_ACT1;
 };
 
-group gMCDFIR_0 filter singlebit, cs_root_cause
+group gMCDFIR_0
+    filter singlebit,
+           cs_root_cause
 {
     /** MCDFIR_0[0]
      *  MCD array had a unrecoverable ECC error
@@ -3492,7 +3515,9 @@ rule rMCDFIR_1
     MCDFIR_1 & ~MCDFIR_1_MASK & ~MCDFIR_1_ACT0 &  MCDFIR_1_ACT1;
 };
 
-group gMCDFIR_1 filter singlebit, cs_root_cause
+group gMCDFIR_1
+    filter singlebit,
+           cs_root_cause
 {
     /** MCDFIR_1[0]
      *  MCD array had a unrecoverable ECC error
@@ -3570,7 +3595,9 @@ rule rVASFIR
     VASFIR & ~VASFIR_MASK &  VASFIR_ACT0 &  VASFIR_ACT1;
 };
 
-group gVASFIR filter singlebit, cs_root_cause
+group gVASFIR
+    filter singlebit,
+           cs_root_cause
 {
     /** VASFIR[0]
      *  Egress Hardware Error
@@ -3851,7 +3878,8 @@ rule rN2_CHIPLET_FIR
     (N2_CHIPLET_RE_FIR >> 2) & ~N2_CHIPLET_FIR_MASK & `1fffffffffffffff`;
 };
 
-group gN2_CHIPLET_FIR filter singlebit
+group gN2_CHIPLET_FIR
+    filter singlebit
 {
     /** N2_CHIPLET_FIR[3]
      *  Attention from N2_LFIR
@@ -3910,7 +3938,8 @@ rule rN2_CHIPLET_UCS_FIR
     N2_CHIPLET_UCS_FIR & ~(N2_CHIPLET_UCS_FIR_MASK >> 1) & `7fffffffffffffff`;
 };
 
-group gN2_CHIPLET_UCS_FIR filter singlebit
+group gN2_CHIPLET_UCS_FIR
+    filter singlebit
 {
     /** N2_CHIPLET_UCS_FIR[1]
      *  Attention from CXAFIR 1
@@ -3931,7 +3960,9 @@ rule rN2_LFIR
     N2_LFIR & ~N2_LFIR_MASK & ~N2_LFIR_ACT0 &  N2_LFIR_ACT1;
 };
 
-group gN2_LFIR filter singlebit, cs_root_cause
+group gN2_LFIR
+    filter singlebit,
+           cs_root_cause
 {
     /** N2_LFIR[0]
      *  CFIR internal parity error
@@ -4052,7 +4083,9 @@ rule rPSIFIR
     PSIFIR & ~PSIFIR_MASK & ~PSIFIR_ACT0 &  PSIFIR_ACT1;
 };
 
-group gPSIFIR filter singlebit, cs_root_cause
+group gPSIFIR
+    filter singlebit,
+           cs_root_cause
 {
     /** PSIFIR[0:4]
      *  spare
@@ -4083,7 +4116,8 @@ rule rN3_CHIPLET_FIR
     (N3_CHIPLET_RE_FIR >> 2) & ~N3_CHIPLET_FIR_MASK & `1fffffffffffffff`;
 };
 
-group gN3_CHIPLET_FIR filter singlebit
+group gN3_CHIPLET_FIR
+    filter singlebit
 {
     /** N3_CHIPLET_FIR[3]
      *  Attention from N3_LFIR
@@ -4192,7 +4226,8 @@ rule rN3_CHIPLET_UCS_FIR
     N3_CHIPLET_UCS_FIR & ~(N3_CHIPLET_UCS_FIR_MASK >> 1) & `7fffffffffffffff`;
 };
 
-group gN3_CHIPLET_UCS_FIR filter singlebit
+group gN3_CHIPLET_UCS_FIR
+    filter singlebit
 {
     /** N3_CHIPLET_UCS_FIR[1]
      *  Attention from MCFIR 0
@@ -4241,7 +4276,8 @@ rule rN3_CHIPLET_HA_FIR
     N3_CHIPLET_HA_FIR & ~(N3_CHIPLET_HA_FIR_MASK >> 1) & `7fffffffffffffff`;
 };
 
-group gN3_CHIPLET_HA_FIR filter singlebit
+group gN3_CHIPLET_HA_FIR
+    filter singlebit
 {
     /** N3_CHIPLET_HA_FIR[1]
      *  Attention from MCFIR 0
@@ -4267,7 +4303,9 @@ rule rN3_LFIR
     N3_LFIR & ~N3_LFIR_MASK & ~N3_LFIR_ACT0 &  N3_LFIR_ACT1;
 };
 
-group gN3_LFIR filter singlebit, cs_root_cause
+group gN3_LFIR
+    filter singlebit,
+           cs_root_cause
 {
     /** N3_LFIR[0]
      *  CFIR internal parity error
@@ -4408,7 +4446,9 @@ rule rPBWESTFIR
     PBWESTFIR & ~PBWESTFIR_MASK & ~PBWESTFIR_ACT0 &  PBWESTFIR_ACT1;
 };
 
-group gPBWESTFIR filter singlebit, cs_root_cause
+group gPBWESTFIR
+    filter singlebit,
+           cs_root_cause
 {
     /** PBWESTFIR[0]
      *  pbeq0 hw1 error, PE in custom array
@@ -4519,7 +4559,9 @@ rule rPBCENTFIR
     PBCENTFIR & ~PBCENTFIR_MASK & ~PBCENTFIR_ACT0 &  PBCENTFIR_ACT1;
 };
 
-group gPBCENTFIR filter singlebit, cs_root_cause
+group gPBCENTFIR
+    filter singlebit,
+           cs_root_cause
 {
     /** PBCENTFIR[0]
      *  pb protocol_error
@@ -4605,7 +4647,9 @@ rule rPBEASTFIR
     PBEASTFIR & ~PBEASTFIR_MASK & ~PBEASTFIR_ACT0 &  PBEASTFIR_ACT1;
 };
 
-group gPBEASTFIR filter singlebit, cs_root_cause
+group gPBEASTFIR
+    filter singlebit,
+           cs_root_cause
 {
     /** PBEASTFIR[0]
      *  pbieq4_pbh_hw1_error
@@ -4701,7 +4745,9 @@ rule rPBPPEFIR
     PBPPEFIR & ~PBPPEFIR_MASK & ~PBPPEFIR_ACT0 &  PBPPEFIR_ACT1;
 };
 
-group gPBPPEFIR filter singlebit, cs_root_cause
+group gPBPPEFIR
+    filter singlebit,
+           cs_root_cause
 {
     /** PBPPEFIR[0]
      *  PPE asserted an internally detected err
@@ -4787,7 +4833,9 @@ rule rPBAFIR
     PBAFIR & ~PBAFIR_MASK & ~PBAFIR_ACT0 &  PBAFIR_ACT1;
 };
 
-group gPBAFIR filter singlebit, cs_root_cause
+group gPBAFIR
+    filter singlebit,
+           cs_root_cause
 {
     /** PBAFIR[0]
      *  PBA OCI Addr PE err
@@ -5023,7 +5071,9 @@ rule rPSIHBFIR
     PSIHBFIR & ~PSIHBFIR_MASK & ~PSIHBFIR_ACT0 &  PSIHBFIR_ACT1;
 };
 
-group gPSIHBFIR filter singlebit, cs_root_cause
+group gPSIHBFIR
+    filter singlebit,
+           cs_root_cause
 {
     /** PSIHBFIR[0]
      *  CE from PowerBus data
@@ -5174,7 +5224,9 @@ rule rENHCAFIR
     ENHCAFIR & ~ENHCAFIR_MASK & ~ENHCAFIR_ACT0 &  ENHCAFIR_ACT1;
 };
 
-group gENHCAFIR filter singlebit, cs_root_cause
+group gENHCAFIR
+    filter singlebit,
+           cs_root_cause
 {
     /** ENHCAFIR[0]
      *  PB0 data UE
@@ -5310,7 +5362,9 @@ rule rPBAMFIR
     PBAMFIR & ~PBAMFIR_MASK & ~PBAMFIR_ACT0 &  PBAMFIR_ACT1;
 };
 
-group gPBAMFIR filter singlebit, cs_root_cause
+group gPBAMFIR
+    filter singlebit,
+           cs_root_cause
 {
     /** PBAMFIR[0]
      *  action0_for_invalid_transfer_size
@@ -5383,7 +5437,9 @@ rule rNMMUCQFIR
     NMMUCQFIR & ~NMMUCQFIR_MASK &  NMMUCQFIR_ACT0 &  NMMUCQFIR_ACT1;
 };
 
-group gNMMUCQFIR filter singlebit, cs_root_cause
+group gNMMUCQFIR
+    filter singlebit,
+           cs_root_cause
 {
     /** NMMUCQFIR[0]
      *  PBI_PE_FIR: PBI internal parity error
@@ -5511,7 +5567,9 @@ rule rNMMUFIR
     NMMUFIR & ~NMMUFIR_MASK &  NMMUFIR_ACT0 &  NMMUFIR_ACT1;
 };
 
-group gNMMUFIR filter singlebit, cs_root_cause
+group gNMMUFIR
+    filter singlebit,
+           cs_root_cause
 {
     /** NMMUFIR[0]
      *  Fabric DIn xlat array CE error detected.
@@ -5767,7 +5825,9 @@ rule rINTCQFIR
     INTCQFIR & ~INTCQFIR_MASK & ~INTCQFIR_ACT0 &  INTCQFIR_ACT1;
 };
 
-group gINTCQFIR filter singlebit, cs_root_cause
+group gINTCQFIR
+    filter singlebit,
+           cs_root_cause
 {
     /** INTCQFIR[0]
      *  INT_CQ_FIR_PI_ECC_CE:
@@ -6058,7 +6118,9 @@ rule rPBIOEFIR
     PBIOEFIR & ~PBIOEFIR_MASK & ~PBIOEFIR_ACT0 &  PBIOEFIR_ACT1;
 };
 
-group gPBIOEFIR filter singlebit, cs_root_cause( 8, 11, 14 )
+group gPBIOEFIR
+    filter singlebit,
+           cs_root_cause(8,11,14)
 {
     /** PBIOEFIR[0]
      *  fmr00 trained
@@ -6354,7 +6416,9 @@ rule rPBIOOFIR
     PBIOOFIR & ~PBIOOFIR_MASK & ~PBIOOFIR_ACT0 &  PBIOOFIR_ACT1;
 };
 
-group gPBIOOFIR filter singlebit, cs_root_cause( 8, 11, 14, 17 )
+group gPBIOOFIR
+    filter singlebit,
+           cs_root_cause(8,11,14,17)
 {
     /** PBIOOFIR[0]
      *  fmr00 trained
@@ -6687,7 +6751,9 @@ rule rNPU0FIR
     NPU0FIR & ~NPU0FIR_MASK &  NPU0FIR_ACT0 &  NPU0FIR_ACT1;
 };
 
-group gNPU0FIR filter singlebit, cs_root_cause( 1, 2, 3, 4, 5, 6, 7, 9, 10, 16, 18, 29, 31, 42, 44 )
+group gNPU0FIR
+    filter singlebit,
+           cs_root_cause(1,2,3,4,5,6,7,9,10,16,18,29,31,42,44)
 {
     /** NPU0FIR[0]
      *  NTL array CE
@@ -6960,7 +7026,9 @@ rule rNPU1FIR
     NPU1FIR & ~NPU1FIR_MASK &  NPU1FIR_ACT0 &  NPU1FIR_ACT1;
 };
 
-group gNPU1FIR filter singlebit, cs_root_cause( 0, 2, 4, 6, 8, 10, 13, 14, 15, 20, 25, 27, 28, 29, 31, 32, 33, 34, 35 )
+group gNPU1FIR
+    filter singlebit,
+           cs_root_cause(0,2,4,6,8,10,13,14,15,20,25,27,28,29,31,32,33,34,35)
 {
     /** NPU1FIR[0]
      *  NDL Brick0 stall
@@ -7183,7 +7251,9 @@ rule rNPU2FIR
     NPU2FIR & ~NPU2FIR_MASK &  NPU2FIR_ACT0 &  NPU2FIR_ACT1;
 };
 
-group gNPU2FIR filter singlebit, cs_root_cause
+group gNPU2FIR
+    filter singlebit,
+           cs_root_cause
 {
     /** NPU2FIR[0]
      *  OTL Brick2 translation fault
@@ -7444,7 +7514,8 @@ rule rXB_CHIPLET_FIR
     (XB_CHIPLET_RE_FIR >> 2) & ~XB_CHIPLET_FIR_MASK & `1fffffffffffffff`;
 };
 
-group gXB_CHIPLET_FIR filter singlebit
+group gXB_CHIPLET_FIR
+    filter singlebit
 {
     /** XB_CHIPLET_FIR[3]
      *  Attention from XB_LFIR
@@ -7488,7 +7559,8 @@ rule rXB_CHIPLET_UCS_FIR
     XB_CHIPLET_UCS_FIR & ~(XB_CHIPLET_UCS_FIR_MASK >> 1) & `7fffffffffffffff`;
 };
 
-group gXB_CHIPLET_UCS_FIR filter singlebit
+group gXB_CHIPLET_UCS_FIR
+    filter singlebit
 {
     /** XB_CHIPLET_UCS_FIR[2]
      *  Attention from IOELFIR 1
@@ -7529,7 +7601,9 @@ rule rXB_LFIR
     XB_LFIR & ~XB_LFIR_MASK & ~XB_LFIR_ACT0 &  XB_LFIR_ACT1;
 };
 
-group gXB_LFIR filter singlebit, cs_root_cause
+group gXB_LFIR
+    filter singlebit,
+           cs_root_cause
 {
     /** XB_LFIR[0]
      *  CFIR internal parity error
@@ -7637,7 +7711,9 @@ rule rXBPPEFIR
     XBPPEFIR & ~XBPPEFIR_MASK &  XBPPEFIR_ACT0 &  XBPPEFIR_ACT1;
 };
 
-group gXBPPEFIR filter singlebit, cs_root_cause
+group gXBPPEFIR
+    filter singlebit,
+           cs_root_cause
 {
     /** XBPPEFIR[0]
      *  PPE general error.
@@ -7718,7 +7794,8 @@ rule rPCI0_CHIPLET_FIR
     (PCI0_CHIPLET_RE_FIR >> 2) & ~PCI0_CHIPLET_FIR_MASK & `1fffffffffffffff`;
 };
 
-group gPCI0_CHIPLET_FIR filter singlebit
+group gPCI0_CHIPLET_FIR
+    filter singlebit
 {
     /** PCI0_CHIPLET_FIR[3]
      *  Attention from PCI_LFIR 0
@@ -7754,7 +7831,8 @@ rule rPCI1_CHIPLET_FIR
     (PCI1_CHIPLET_RE_FIR >> 2) & ~PCI1_CHIPLET_FIR_MASK & `1fffffffffffffff`;
 };
 
-group gPCI1_CHIPLET_FIR filter singlebit
+group gPCI1_CHIPLET_FIR
+    filter singlebit
 {
     /** PCI1_CHIPLET_FIR[3]
      *  Attention from PCI_LFIR 1
@@ -7800,7 +7878,8 @@ rule rPCI2_CHIPLET_FIR
     (PCI2_CHIPLET_RE_FIR >> 2) & ~PCI2_CHIPLET_FIR_MASK & `1fffffffffffffff`;
 };
 
-group gPCI2_CHIPLET_FIR filter singlebit
+group gPCI2_CHIPLET_FIR
+    filter singlebit
 {
     /** PCI2_CHIPLET_FIR[3]
      *  Attention from PCI_LFIR 2
diff --git a/src/usr/diag/prdf/common/plat/nimbus/nimbus_xbus.rule b/src/usr/diag/prdf/common/plat/nimbus/nimbus_xbus.rule
index 874816f87..c7713b12e 100644
--- a/src/usr/diag/prdf/common/plat/nimbus/nimbus_xbus.rule
+++ b/src/usr/diag/prdf/common/plat/nimbus/nimbus_xbus.rule
@@ -154,7 +154,8 @@ rule rXBUS
 
 };
 
-group gXBUS attntype CHECK_STOP, RECOVERABLE, UNIT_CS filter singlebit
+group gXBUS attntype CHECK_STOP, RECOVERABLE, UNIT_CS
+    filter singlebit
 {
     (rXBUS, bit(0)) ? analyze(gIOXBFIR);
     (rXBUS, bit(1)) ? analyze(gIOELFIR);
@@ -174,7 +175,9 @@ rule rIOXBFIR
     IOXBFIR & ~IOXBFIR_MASK &  IOXBFIR_ACT0 &  IOXBFIR_ACT1;
 };
 
-group gIOXBFIR filter singlebit, cs_root_cause
+group gIOXBFIR
+    filter singlebit,
+           cs_root_cause
 {
     /** IOXBFIR[0]
      *  RX_INVALID_STATE_OR_PARITY_ERROR
@@ -372,7 +375,9 @@ rule rIOELFIR
     IOELFIR & ~IOELFIR_MASK &  IOELFIR_ACT0 &  IOELFIR_ACT1;
 };
 
-group gIOELFIR filter singlebit, cs_root_cause( 54, 55, 56, 57, 58, 59 )
+group gIOELFIR
+    filter singlebit,
+           cs_root_cause(54,55,56,57,58,59)
 {
     /** IOELFIR[0]
      *  link0 trained