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authorJoe Dery <dery@us.ibm.com>2016-08-15 16:53:45 -0400
committerDaniel M. Crowell <dcrowell@us.ibm.com>2017-02-10 22:08:17 -0500
commitfc98a8507232353b4b237eb6108398da4b0fbb1f (patch)
tree44df1e024e67d45e3e4d6c51968fe50791e540f8
parentc912e95c5651a4cb462b2d939f2f33f1703d4b98 (diff)
downloadtalos-hostboot-fc98a8507232353b4b237eb6108398da4b0fbb1f.tar.gz
talos-hostboot-fc98a8507232353b4b237eb6108398da4b0fbb1f.zip
p9_common_poweronoff: delay 10us/40k simcycles between FSM idle polling
Change-Id: I296ffb4520f276fc0ed8594122b59367c5b3e04e Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/28271 Reviewed-by: Kevin F. Reick <reick@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: YUE DU <daviddu@us.ibm.com> Reviewed-by: Sumit Kumar <sumit_kumar@in.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36095 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
-rw-r--r--src/import/chips/p9/procedures/hwp/lib/p9_common_poweronoff.C16
1 files changed, 11 insertions, 5 deletions
diff --git a/src/import/chips/p9/procedures/hwp/lib/p9_common_poweronoff.C b/src/import/chips/p9/procedures/hwp/lib/p9_common_poweronoff.C
index 4bc1c2a17..42240c0dd 100644
--- a/src/import/chips/p9/procedures/hwp/lib/p9_common_poweronoff.C
+++ b/src/import/chips/p9/procedures/hwp/lib/p9_common_poweronoff.C
@@ -67,8 +67,8 @@ const uint64_t PPM_PFSNS[2] = { C_PPM_PFSNS,
EQ_PPM_PFSNS
};
-enum { CYCLES_PER_MS = 500000,
- INST_PER_LOOP = 8,
+enum { FSM_IDLE_POLLING_HW_NS_DELAY = 10000,
+ FSM_IDLE_POLLING_SIM_CYCLE_DELAY = 40000,
PFET_STATE_LENGTH = 2,
VXX_PG_SEL_LEN = 4
};
@@ -158,11 +158,14 @@ p9_common_poweronoff(
// Poll for PFETCNTLSTAT_REG[VDD_PG_STATE] for 0b1000 (FSM idle)
// – Timeout value = 1ms
FAPI_DBG("Polling for power gate sequencer state: FSM idle");
- l_loopsPerMs = CYCLES_PER_MS / INST_PER_LOOP;
+ l_loopsPerMs = 1E6 / FSM_IDLE_POLLING_HW_NS_DELAY;
// Note that the Lamda assumes that l_data already contains the
do
{
+ fapi2::delay(FSM_IDLE_POLLING_HW_NS_DELAY,
+ FSM_IDLE_POLLING_SIM_CYCLE_DELAY);
+
FAPI_TRY(fapi2::getScom(i_target, PPM_PFCS[l_type], l_data),
"getScom failed for address PPM_PFCS"); // poll
}
@@ -200,13 +203,16 @@ p9_common_poweronoff(
// Poll for PFETCNTLSTAT_REG[VDD_PG_STATE] for 0b1000 (FSM idle)
// – Timeout value = 1ms
FAPI_DBG("Polling for power gate sequencer state: FSM idle");
- l_loopsPerMs = CYCLES_PER_MS / INST_PER_LOOP;
+ l_loopsPerMs = 1E6 / FSM_IDLE_POLLING_HW_NS_DELAY;
do
{
+ fapi2::delay(FSM_IDLE_POLLING_HW_NS_DELAY,
+ FSM_IDLE_POLLING_SIM_CYCLE_DELAY);
+
FAPI_TRY(fapi2::getScom(i_target, PPM_PFCS[l_type], l_data),
"getScom failed for address PPM_PFCS"); // poll
- FAPI_DBG("timeout l_loopsPerMs. %x", l_loopsPerMs);
+ //FAPI_DBG("timeout l_loopsPerMs. %x", l_loopsPerMs);
}
while ((l_data.getBit < VCS_PG_STATE_BIT + PG_STATE_IDLE_OFFSET > ()
== 0 ) && (--l_loopsPerMs != 0));
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