Ec_level attribute support for DD1 attributes

--Fixig hb_temp_defaults.xml

Change-Id: Iab140154483b10bd05a6dba092dad25f64eae742
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/26450
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Andrew J. Geissler <andrewg@us.ibm.com>
Reviewed-by: PARVATHI RACHAKONDA <prachako@in.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/26491
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>

5 files changed, 75 insertions, 46 deletions

diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_set_fsi_gp_shadow.C b/src/import/chips/p9/procedures/hwp/perv/p9_set_fsi_gp_shadow.C
index c65a009b5..17e748769 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_set_fsi_gp_shadow.C
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_set_fsi_gp_shadow.C
@@ -44,7 +44,7 @@ fapi2::ReturnCode p9_set_fsi_gp_shadow(const
     fapi2::buffer<uint8_t> l_read_attr;
     FAPI_INF("Entering ...");
 
-    FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_FSI_GP_SHADOWS_OVERWRITE, i_target_chip,
+    FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_EC_FEATURE_FSI_GP_SHADOWS_OVERWRITE, i_target_chip,
                            l_read_attr));
 
     if ( l_read_attr )
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_set_fsi_gp_shadow.mk b/src/import/chips/p9/procedures/hwp/perv/p9_set_fsi_gp_shadow.mk
index 627a31f39..45174a268 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_set_fsi_gp_shadow.mk
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_set_fsi_gp_shadow.mk
@@ -17,4 +17,5 @@
 #
 # IBM_PROLOG_END_TAG
 PROCEDURE=p9_set_fsi_gp_shadow
+lib$(PROCEDURE)_DEPLIBS += fapi2_utils
 $(call BUILD_PROCEDURE)
diff --git a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml
index b56d4cead..72918cce1 100644
--- a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml
+++ b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml
@@ -85,4 +85,77 @@
       </chip>
     </chipEcFeature>
   </attribute>
+  <!-- ********************************************************************* -->
+  <attribute>
+    <id>ATTR_CHIP_EC_FEATURE_VITL_CLK_SETUP</id>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+    <description>
+      Nimbus DD1 for differentiating present/functional targets. True if:
+      Nimbus EC less than 20
+    </description>
+    <chipEcFeature>
+      <chip>
+        <name>ENUM_ATTR_NAME_NIMBUS</name>
+        <ec>
+          <value>0x20</value>
+          <test>LESS_THAN</test>
+        </ec>
+      </chip>
+    </chipEcFeature>
+  </attribute>
+  <!-- ******************************************************************** -->
+  <attribute>
+    <id>ATTR_CHIP_EC_FEATURE_FSI_GP_SHADOWS_OVERWRITE</id>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+    <description>
+      DD1 attribute for assigning flushvalues to root_ctrl and perv_ctrl registers. True if:
+      Nimbus EC less than 20
+    </description>
+    <chipEcFeature>
+      <chip>
+        <name>ENUM_ATTR_NAME_NIMBUS</name>
+        <ec>
+          <value>0x20</value>
+          <test>LESS_THAN</test>
+        </ec>
+      </chip>
+    </chipEcFeature>
+  </attribute>
+  <!-- ******************************************************************** -->
+  <attribute>
+    <id>ATTR_CHIP_EC_FEATURE_N3_FLUSH_MODE</id>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+    <description>
+      DD1 update : Flush mode not initiated for N3. True if:
+      Nimbus EC less than 20
+    </description>
+    <chipEcFeature>
+      <chip>
+        <name>ENUM_ATTR_NAME_NIMBUS</name>
+        <ec>
+          <value>0x20</value>
+          <test>LESS_THAN</test>
+        </ec>
+      </chip>
+    </chipEcFeature>
+  </attribute>
+  <!-- ******************************************************************** -->
+  <attribute>
+    <id>ATTR_CHIP_EC_FEATURE_SDISN_SETUP</id>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+    <description>
+      Sdis_n set or clear : flushing LCBES condition woraround. True if:
+      Nimbus EC less than 20
+    </description>
+    <chipEcFeature>
+      <chip>
+        <name>ENUM_ATTR_NAME_NIMBUS</name>
+        <ec>
+          <value>0x20</value>
+          <test>LESS_THAN</test>
+        </ec>
+      </chip>
+    </chipEcFeature>
+  </attribute>
+  <!-- ******************************************************************** -->
 </attributes>
diff --git a/src/import/chips/p9/procedures/xml/attribute_info/pervasive_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/pervasive_attributes.xml
index f2e4c67dd..2ea17c6d0 100644
--- a/src/import/chips/p9/procedures/xml/attribute_info/pervasive_attributes.xml
+++ b/src/import/chips/p9/procedures/xml/attribute_info/pervasive_attributes.xml
@@ -553,14 +553,6 @@
 </attribute>
 
 <attribute>
-  <id>ATTR_SDISN_SETUP</id>
-  <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-  <description>Sdis_n set or clear : flushing LCBES condition woraround</description>
-  <valueType>uint8</valueType>
-  <platInit/>
-</attribute>
-
-<attribute>
   <id>ATTR_SECURITY_ENABLE</id>
   <targetType>TARGET_TYPE_SYSTEM</targetType>
   <description>Holds the state of Security Access Bit (SAB)</description>
@@ -588,14 +580,6 @@
 </attribute>
 
 <attribute>
-    <id>ATTR_VITL_CLK_SETUP</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>Nimbus DD1</description>
-    <valueType>uint8</valueType>
-    <platInit/>    
-</attribute>
-
-<attribute>
     <id>ATTR_OBUS_RATIO_VALUE</id>
     <targetType>TARGET_TYPE_PROC_CHIP</targetType>
     <description>Holds Obus ratio value</description>
@@ -642,22 +626,6 @@
 </attribute>
 
 <attribute>
-    <id>ATTR_FSI_GP_SHADOWS_OVERWRITE</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>DD1 attribute for assigning flushvalues to root_ctrl and perv_ctrl registers</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
-    <id>ATTR_N3_FLUSH_MODE</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>DD1 update : Flush mode not for N3</description>
-    <valueType>uint8</valueType>
-    <platInit/>
-</attribute>
-
-<attribute>
     <id>ATTR_CP_FILTER_BYPASS</id>
     <targetType>TARGET_TYPE_PROC_CHIP</targetType>
     <description>To skip the locking sequence and check for lock of CP PLL</description>
diff --git a/src/import/hwpf/fapi2/xml/attribute_info/hb_temp_defaults.xml b/src/import/hwpf/fapi2/xml/attribute_info/hb_temp_defaults.xml
index 86526c25e..e96c3ff51 100644
--- a/src/import/hwpf/fapi2/xml/attribute_info/hb_temp_defaults.xml
+++ b/src/import/hwpf/fapi2/xml/attribute_info/hb_temp_defaults.xml
@@ -101,10 +101,6 @@
         <default>0x00000FFF</default>
     </attribute>
     <attribute>
-        <id>ATTR_SDISN_SETUP</id>
-        <default>0</default>
-    </attribute>
-    <attribute>
         <id>ATTR_MEMVPD_POS</id>
         <default>0</default>
     </attribute>
@@ -161,12 +157,6 @@
         <id>ATTR_PFET_OFF_CONTROLS</id>
     </attribute> 
     <attribute>
-        <id>ATTR_N3_FLUSH_MODE</id>
-    </attribute>
-    <attribute>
-        <id>ATTR_VITL_CLK_SETUP</id>
-    </attribute>
-    <attribute>
         <id>ATTR_OBUS_RATIO_VALUE</id>
     </attribute>
     <attribute>
@@ -209,9 +199,6 @@
         <id>ATTR_C1_IS_SCANABLE</id>
     </attribute>
     <attribute>
-        <id>ATTR_FSI_GP_SHADOWS_OVERWRITE</id>
-    </attribute>
-    <attribute>
         <id>ATTR_ECID</id>
     </attribute>
     <attribute>