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| author | Ben Gass <bgass@us.ibm.com> | 2018-02-27 14:27:57 -0600 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2018-04-10 12:16:36 -0400 |
| commit | 885dde53dea48b51d1bdd64774000391d2d962fc (patch) | |
| tree | 39c8f27ab7856ac36a85c058de2450e4272623df | |
| parent | 2e0c329836ca6cfa23f0f059adbb91b67fed5805 (diff) | |
| download | talos-hostboot-885dde53dea48b51d1bdd64774000391d2d962fc.tar.gz talos-hostboot-885dde53dea48b51d1bdd64774000391d2d962fc.zip | |
Turn off PB.IOO.LL0.CONFIG_FAST_ASYNC_CROSS for Nimbus (HW409026)
Due to HW409026, PB.IOO.LL0.CONFIG_FAST_ASYNC_CROSS should be off
for all Nimbus chips.
Change-Id: Ib732be7ce3d3e64e3c0b9112a088bb9a8fed14c4
CQ: SW420220
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54789
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-by: ADRIAN BARRERA <abarrera@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Reviewed-by: Jeffrey W. Kellington <jwkellin@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54799
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/initfiles/p9_fbc_ioo_dl_scom.C | 5 | ||||
| -rw-r--r-- | src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml | 18 |
2 files changed, 20 insertions, 3 deletions
diff --git a/src/import/chips/p9/procedures/hwp/initfiles/p9_fbc_ioo_dl_scom.C b/src/import/chips/p9/procedures/hwp/initfiles/p9_fbc_ioo_dl_scom.C index 43ecf2a6e..725093adb 100644 --- a/src/import/chips/p9/procedures/hwp/initfiles/p9_fbc_ioo_dl_scom.C +++ b/src/import/chips/p9/procedures/hwp/initfiles/p9_fbc_ioo_dl_scom.C @@ -262,9 +262,8 @@ fapi2::ReturnCode p9_fbc_ioo_dl_scom(const fapi2::Target<fapi2::TARGET_TYPE_OBUS l_scom_buffer.insert<37, 1, 63, uint64_t>(l_PB_IOO_LL0_CONFIG_ELEVEN_LANE_MODE_ON ); } - if (((l_chip_id == 0x5) && (l_chip_ec == 0x20)) || ((l_chip_id == 0x5) && (l_chip_ec == 0x21)) || ((l_chip_id == 0x5) - && (l_chip_ec == 0x22)) || ((l_chip_id == 0x6) && (l_chip_ec == 0x10)) || ((l_chip_id == 0x6) && (l_chip_ec == 0x11)) - || ((l_chip_id == 0x6) && (l_chip_ec == 0x12)) || ((l_chip_id == 0x7) && (l_chip_ec == 0x10)) ) + if (((l_chip_id == 0x6) && (l_chip_ec == 0x10)) || ((l_chip_id == 0x6) && (l_chip_ec == 0x11)) || ((l_chip_id == 0x6) + && (l_chip_ec == 0x12)) || ((l_chip_id == 0x7) && (l_chip_ec == 0x10)) ) { constexpr auto l_PB_IOO_LL0_CONFIG_FAST_ASYNC_CROSS_ON = 0x1; l_scom_buffer.insert<59, 1, 63, uint64_t>(l_PB_IOO_LL0_CONFIG_FAST_ASYNC_CROSS_ON ); diff --git a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml index eeb3c04e7..61b8efbc5 100644 --- a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml +++ b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml @@ -32,6 +32,24 @@ <!-- ********************************************************************* --> <attribute> + <id>ATTR_CHIP_EC_FEATURE_HW409026</id> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <description> + Optics DLL fast async cross causes DLL internal errs + Fixed on all chips but Nimbus. + </description> + <chipEcFeature> + <chip> + <name>ENUM_ATTR_NAME_NIMBUS</name> + <ec> + <value>0x10</value> + <test>GREATER_THAN_OR_EQUAL</test> + </ec> + </chip> + </chipEcFeature> + </attribute> + <!-- ********************************************************************* --> + <attribute> <id>ATTR_CHIP_EC_FEATURE_SEPARATE_CORE_DBG_CNTL</id> <targetType>TARGET_TYPE_PROC_CHIP</targetType> <description> |
