Populate Attributes for HostServices

Inside the start payload istep a set of FAPI attributes will
 be read and copied into a specified location of mainstore so
 that HostServices runtime code can access them.
There are 4 files that will be shared with HostServices code:
- attribute_structs.H : common structures used to define data
- hsvc_sysdata.C : list of required system attributes
- hsvc_procdata.C : list of required proc attributes
- hsvc_exdata.C : list of required ex attributes

RTC: 41242
Change-Id: I3af3b2bf99b4dbedb6efeb2cb35e49ba066a9c19
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1893
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>

20 files changed, 2920 insertions, 65 deletions

diff --git a/src/include/usr/hbotcompid.H b/src/include/usr/hbotcompid.H
index 7fb1b3a47..e829c6e94 100644
--- a/src/include/usr/hbotcompid.H
+++ b/src/include/usr/hbotcompid.H
@@ -249,6 +249,14 @@ const compId_t SCAN_COMP_ID = 0x1900;
 const char SCAN_COMP_NAME[] = "scan";
 //@}
 
+/** @name RUNTIME
+ *  RUNTIME component
+ */
+//@{
+const compId_t RUNTIME_COMP_ID = 0x1A00;
+const char RUNTIME_COMP_NAME[] = "runtime";
+//@}
+
 /** @name RESERVED
  *  Reserved component ID. x3100 is the component ID
  *  of FipS ERRL component. Due to our use of
diff --git a/src/include/usr/hwpf/plat/fapiPlatAttributeService.H b/src/include/usr/hwpf/plat/fapiPlatAttributeService.H
index 236bc6215..1002b4084 100755
--- a/src/include/usr/hwpf/plat/fapiPlatAttributeService.H
+++ b/src/include/usr/hwpf/plat/fapiPlatAttributeService.H
@@ -1,26 +1,25 @@
-/*  IBM_PROLOG_BEGIN_TAG
- *  This is an automatically generated prolog.
- *
- *  $Source: src/include/usr/hwpf/plat/fapiPlatAttributeService.H $
- *
- *  IBM CONFIDENTIAL
- *
- *  COPYRIGHT International Business Machines Corp. 2011-2012
- *
- *  p1
- *
- *  Object Code Only (OCO) source materials
- *  Licensed Internal Code Source Materials
- *  IBM HostBoot Licensed Internal Code
- *
- *  The source code for this program is not published or other-
- *  wise divested of its trade secrets, irrespective of what has
- *  been deposited with the U.S. Copyright Office.
- *
- *  Origin: 30
- *
- *  IBM_PROLOG_END_TAG
- */
+/* IBM_PROLOG_BEGIN_TAG                                                   */
+/* This is an automatically generated prolog.                             */
+/*                                                                        */
+/* $Source: src/include/usr/hwpf/plat/fapiPlatAttributeService.H $        */
+/*                                                                        */
+/* IBM CONFIDENTIAL                                                       */
+/*                                                                        */
+/* COPYRIGHT International Business Machines Corp. 2011,2012              */
+/*                                                                        */
+/* p1                                                                     */
+/*                                                                        */
+/* Object Code Only (OCO) source materials                                */
+/* Licensed Internal Code Source Materials                                */
+/* IBM HostBoot Licensed Internal Code                                    */
+/*                                                                        */
+/* The source code for this program is not published or otherwise         */
+/* divested of its trade secrets, irrespective of what has been           */
+/* deposited with the U.S. Copyright Office.                              */
+/*                                                                        */
+/* Origin: 30                                                             */
+/*                                                                        */
+/* IBM_PROLOG_END_TAG                                                     */
 /**
  *  @file fapiPlatAttributeService.H
  *
@@ -652,6 +651,12 @@ fapi::ReturnCode fapiPlatGetProcPcieBarSize (
                                     const fapi::Target * i_pTarget,
                                     uint64_t    (&o_pcieBarSize) [3][3] );
 
+//@fixme begin  RTC:42293
+fapi::ReturnCode return0_uint8( uint8_t &o_data );
+fapi::ReturnCode return0_uint32( uint32_t &o_data );
+fapi::ReturnCode set_ignore( void );
+//@fixme end
+
 } // namespace platAttrSvc
 
 } // namespace fapi
@@ -856,11 +861,336 @@ fapi::ReturnCode fapiPlatGetProcPcieBarSize (
 #define ATTR_PROC_PCIE_BAR_BASE_ADDR_GETMACRO( ID, PTARGET, VAL )   \
     fapi::platAttrSvc::fapiPlatGetProcPcieBarBaseAddr (PTARGET, VAL )
 #define ATTR_PROC_PCIE_BAR_SIZE_GETMACRO( ID, PTARGET, VAL )   \
-    fapi::platAttrSvc::fapiPlatGetProcPcieBarSize (PTARGET, VAL )
+    fapi::platAttrSvc::fapiPlatGetProcPcieBarSize (PTARGET, VAL ) 
 
 //------------------------------------------------------------------------------
 //  MACROS to support proc_fab_smp_fabric_attributes.xml
 //------------------------------------------------------------------------------
 
+//@fixme : RTC:42293
+//------------------------------------------------------------------------------
+//  MACROS to support pm_plat_attributes.xml
+//------------------------------------------------------------------------------
+#define ATTR_PM_EXTERNAL_VRM_STEPSIZE_GETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::return0_uint8( VAL )
+#define ATTR_PM_EXTERNAL_VRM_STEPDELAY_GETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::return0_uint32( VAL )
+#define ATTR_PM_PSTATE_UNDERVOLTING_MAXIMUM_GETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::return0_uint8( VAL )
+#define ATTR_PM_SPIVID_FREQUENCY_GETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::return0_uint32( VAL )
+#define ATTR_PM_SPIVID_PORT_ENABLE_GETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::return0_uint8( VAL )
+#define ATTR_PM_SAFE_FREQUENCY_GETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::return0_uint8( VAL )
+#define ATTR_PM_RESONANT_CLOCK_FULL_CLOCK_SECTOR_BUFFER_FREQUENCY_GETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::return0_uint32( VAL )
+#define ATTR_PM_RESONANT_CLOCK_LOW_BAND_LOWER_FREQUENCY_GETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::return0_uint32( VAL )
+#define ATTR_PM_RESONANT_CLOCK_LOW_BAND_UPPER_FREQUENCY_GETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::return0_uint32( VAL )
+#define ATTR_PM_RESONANT_CLOCK_HIGH_BAND_LOWER_FREQUENCY_GETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::return0_uint32( VAL )
+#define ATTR_PM_RESONANT_CLOCK_HIGH_BAND_UPPER_FREQUENCY_GETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::return0_uint32( VAL )
+#define ATTR_PM_SPIPSS_FREQUENCY_GETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::return0_uint32( VAL )
+#define ATTR_PM_APSS_CHIP_SELECT_GETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::return0_uint8( VAL )
+#define ATTR_PM_PBAX_NODEID_GETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::return0_uint8( VAL )
+#define ATTR_PM_PBAX_CHIPID_GETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::return0_uint8( VAL )
+#define ATTR_PM_PBAX_BRDCST_ID_VECTOR_GETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::return0_uint8( VAL )
+#define ATTR_PROC_R_LOADLINE_GETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::return0_uint32( VAL )
+#define ATTR_PROC_R_DISTLOSS_GETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::return0_uint32( VAL )
+#define ATTR_PROC_VRM_VOFFSET_GETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::return0_uint32( VAL )
+#define ATTR_FREQ_CORE_MAX_GETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::return0_uint32( VAL )
+#define ATTR_PM_PSTATE_UNDERVOLTING_MINIMUM_GETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::return0_uint8( VAL )
+
+//@fixme : RTC:42293
+//------------------------------------------------------------------------------
+//  MACROS to support pm_hwp_attributes.xml
+//------------------------------------------------------------------------------
+#define ATTR_PM_POWER_PROXY_TRACE_TIMER_GETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::return0_uint32( VAL )
+#define ATTR_PM_PPT_TIMER_MATCH_VALUE_GETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::return0_uint32( VAL )
+#define ATTR_PM_PPT_TIMER_TICK_GETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::return0_uint32( VAL )
+#define ATTR_PM_AISS_TIMEOUT_GETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::return0_uint8( VAL )
+#define ATTR_PM_PSTATE_STEPSIZE_GETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::return0_uint8( VAL )
+#define ATTR_PM_EXTERNAL_VRM_STEPDELAY_RANGE_GETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::return0_uint8( VAL )
+#define ATTR_PM_EXTERNAL_VRM_STEPDELAY_VALUE_GETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::return0_uint8( VAL )
+#define ATTR_PM_PMC_HANGPULSE_DIVIDER_GETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::return0_uint8( VAL )
+#define ATTR_PM_PVSAFE_PSTATE_GETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::return0_uint8( VAL )
+#define ATTR_PM_SPIVID_FRAME_SIZE_GETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::return0_uint8( VAL )
+#define ATTR_PM_SPIVID_IN_DELAY_FRAME1_GETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::return0_uint8( VAL )
+#define ATTR_PM_SPIVID_IN_DELAY_FRAME2_GETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::return0_uint8( VAL )
+#define ATTR_PM_SPIVID_CLOCK_POLARITY_GETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::return0_uint8( VAL )
+#define ATTR_PM_SPIVID_CLOCK_PHASE_GETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::return0_uint8( VAL )
+#define ATTR_PM_SPIVID_CLOCK_DIVIDER_GETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::return0_uint32( VAL )
+#define ATTR_PM_SPIVID_INTERFRAME_DELAY_WRITE_STATUS_GETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::return0_uint32( VAL )
+#define ATTR_PM_SPIVID_INTERFRAME_DELAY_WRITE_STATUS_VALUE_GETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::return0_uint32( VAL )
+#define ATTR_PM_SPIVID_INTER_RETRY_DELAY_VALUE_GETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::return0_uint32( VAL )
+#define ATTR_PM_SPIVID_INTER_RETRY_DELAY_GETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::return0_uint32( VAL )
+#define ATTR_PM_SPIVID_CRC_GEN_ENABLE_GETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::return0_uint8( VAL )
+#define ATTR_PM_SPIVID_CRC_CHECK_ENABLE_GETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::return0_uint8( VAL )
+#define ATTR_PM_SPIVID_MAJORITY_VOTE_ENABLE_GETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::return0_uint8( VAL )
+#define ATTR_PM_SPIVID_MAX_RETRIES_GETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::return0_uint8( VAL )
+#define ATTR_PM_SPIVID_CRC_POLYNOMIAL_ENABLES_GETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::return0_uint8( VAL )
+#define ATTR_PM_OCC_HEARTBEAT_TIME_GETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::return0_uint32( VAL )
+#define ATTR_PM_SLEEP_WINKLE_REQUEST_TIMEOUT_GETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::return0_uint32( VAL )
+#define ATTR_PM_SLEEP_ENTRY_GETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::return0_uint8( VAL )
+#define ATTR_PM_SLEEP_EXIT_GETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::return0_uint8( VAL )
+#define ATTR_PM_SLEEP_TYPE_GETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::return0_uint8( VAL )
+#define ATTR_PM_WINKLE_TYPE_GETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::return0_uint8( VAL )
+#define ATTR_PM_PFET_POWERUP_CORE_DELAY0_GETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::return0_uint32( VAL )
+#define ATTR_PM_PFET_POWERUP_CORE_DELAY1_GETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::return0_uint32( VAL )
+#define ATTR_PM_PFET_POWERUP_CORE_DELAY0_VALUE_GETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::return0_uint8( VAL )
+#define ATTR_PM_PFET_POWERUP_CORE_DELAY1_VALUE_GETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::return0_uint8( VAL )
+#define ATTR_PM_PFET_POWERUP_CORE_SEQUENCE_DELAY_SELECT_GETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::return0_uint32( VAL )
+#define ATTR_PM_PFET_POWERDOWN_CORE_DELAY0_GETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::return0_uint32( VAL )
+#define ATTR_PM_PFET_POWERDOWN_CORE_DELAY1_GETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::return0_uint32( VAL )
+#define ATTR_PM_PFET_POWERDOWN_CORE_DELAY0_VALUE_GETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::return0_uint8( VAL )
+#define ATTR_PM_PFET_POWERDOWN_CORE_DELAY1_VALUE_GETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::return0_uint8( VAL )
+#define ATTR_PM_PFET_POWERDOWN_CORE_SEQUENCE_DELAY_SELECT_GETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::return0_uint32( VAL )
+#define ATTR_PM_PFET_POWERUP_ECO_DELAY0_GETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::return0_uint32( VAL )
+#define ATTR_PM_PFET_POWERUP_ECO_DELAY1_GETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::return0_uint32( VAL )
+#define ATTR_PM_PFET_POWERUP_ECO_DELAY0_VALUE_GETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::return0_uint8( VAL )
+#define ATTR_PM_PFET_POWERUP_ECO_DELAY1_VALUE_GETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::return0_uint8( VAL )
+#define ATTR_PM_PFET_POWERUP_ECO_SEQUENCE_DELAY_SELECT_GETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::return0_uint32( VAL )
+#define ATTR_PM_PFET_POWERDOWN_ECO_DELAY0_GETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::return0_uint32( VAL )
+#define ATTR_PM_PFET_POWERDOWN_ECO_DELAY1_GETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::return0_uint32( VAL )
+#define ATTR_PM_PFET_POWERDOWN_ECO_DELAY0_VALUE_GETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::return0_uint8( VAL )
+#define ATTR_PM_PFET_POWERDOWN_ECO_DELAY1_VALUE_GETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::return0_uint8( VAL )
+#define ATTR_PM_PFET_POWERDOWN_ECO_SEQUENCE_DELAY_SELECT_GETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::return0_uint32( VAL )
+#define ATTR_PM_PSTATE0_FREQUENCY_GETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::return0_uint32( VAL )
+#define ATTR_PM_IVRMS_ENABLED_GETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::return0_uint8( VAL )
+#define ATTR_PM_SAFE_PSTATE_GETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::return0_uint8( VAL )
+#define ATTR_PM_RESONANT_CLOCK_ENABLE_GETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::return0_uint8( VAL )
+#define ATTR_PM_RESONANT_CLOCK_FULL_CSB_PSTATE_GETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::return0_uint8( VAL )
+#define ATTR_PM_RESONANT_CLOCK_LFRLOW_PSTATE_GETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::return0_uint8( VAL )
+#define ATTR_PM_RESONANT_CLOCK_LFRUPPER_PSTATE_GETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::return0_uint8( VAL )
+#define ATTR_PM_RESONANT_CLOCK_HFRLOW_PSTATE_GETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::return0_uint8( VAL )
+#define ATTR_PM_RESONANT_CLOCK_HFRHIGH_PSTATE_GETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::return0_uint8( VAL )
+#define ATTR_PM_SPIPSS_FRAME_SIZE_GETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::return0_uint8( VAL )
+#define ATTR_PM_SPIPSS_OUT_COUNT_GETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::return0_uint8( VAL )
+#define ATTR_PM_SPIPSS_IN_DELAY_GETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::return0_uint8( VAL )
+#define ATTR_PM_SPIPSS_IN_COUNT_GETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::return0_uint8( VAL )
+#define ATTR_PM_SPIPSS_CLOCK_POLARITY_GETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::return0_uint8( VAL )
+#define ATTR_PM_SPIPSS_CLOCK_PHASE_GETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::return0_uint8( VAL )
+#define ATTR_PM_SPIPSS_CLOCK_DIVIDER_GETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::return0_uint8( VAL )
+#define ATTR_PM_SPIPSS_INTER_FRAME_DELAY_SETTING_GETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::return0_uint32( VAL )
+#define ATTR_PM_SPIPSS_INTER_FRAME_DELAY_GETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::return0_uint32( VAL )
+#define ATTR_PM_PBAX_RCV_RESERV_TIMEOUT_GETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::return0_uint8( VAL )
+#define ATTR_PM_PBAX_SND_RETRY_COUNT_OVERCOMMIT_ENABLE_GETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::return0_uint8( VAL )
+#define ATTR_PM_PBAX_SND_RETRY_THRESHOLD_GETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::return0_uint8( VAL )
+#define ATTR_PM_PBAX_SND_RESERV_TIMEOUT_GETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::return0_uint8( VAL )
+#define ATTR_PM_SPWUP_FSP_GETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::return0_uint32( VAL )
+#define ATTR_PM_SPWUP_OCC_GETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::return0_uint32( VAL )
+#define ATTR_PM_SPWUP_PHYP_GETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::return0_uint32( VAL )
+
+#define ATTR_PM_POWER_PROXY_TRACE_TIMER_SETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::set_ignore()
+#define ATTR_PM_PPT_TIMER_MATCH_VALUE_SETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::set_ignore()
+#define ATTR_PM_PPT_TIMER_TICK_SETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::set_ignore()
+#define ATTR_PM_AISS_TIMEOUT_SETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::set_ignore()
+#define ATTR_PM_PSTATE_STEPSIZE_SETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::set_ignore()
+#define ATTR_PM_EXTERNAL_VRM_STEPDELAY_RANGE_SETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::set_ignore()
+#define ATTR_PM_EXTERNAL_VRM_STEPDELAY_VALUE_SETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::set_ignore()
+#define ATTR_PM_PMC_HANGPULSE_DIVIDER_SETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::set_ignore()
+#define ATTR_PM_PVSAFE_PSTATE_SETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::set_ignore()
+#define ATTR_PM_SPIVID_FRAME_SIZE_SETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::set_ignore()
+#define ATTR_PM_SPIVID_IN_DELAY_FRAME1_SETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::set_ignore()
+#define ATTR_PM_SPIVID_IN_DELAY_FRAME2_SETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::set_ignore()
+#define ATTR_PM_SPIVID_CLOCK_POLARITY_SETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::set_ignore()
+#define ATTR_PM_SPIVID_CLOCK_PHASE_SETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::set_ignore()
+#define ATTR_PM_SPIVID_CLOCK_DIVIDER_SETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::set_ignore()
+#define ATTR_PM_SPIVID_INTERFRAME_DELAY_WRITE_STATUS_SETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::set_ignore()
+#define ATTR_PM_SPIVID_INTERFRAME_DELAY_WRITE_STATUS_VALUE_SETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::set_ignore()
+#define ATTR_PM_SPIVID_INTER_RETRY_DELAY_VALUE_SETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::set_ignore()
+#define ATTR_PM_SPIVID_INTER_RETRY_DELAY_SETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::set_ignore()
+#define ATTR_PM_SPIVID_CRC_GEN_ENABLE_SETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::set_ignore()
+#define ATTR_PM_SPIVID_CRC_CHECK_ENABLE_SETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::set_ignore()
+#define ATTR_PM_SPIVID_MAJORITY_VOTE_ENABLE_SETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::set_ignore()
+#define ATTR_PM_SPIVID_MAX_RETRIES_SETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::set_ignore()
+#define ATTR_PM_SPIVID_CRC_POLYNOMIAL_ENABLES_SETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::set_ignore()
+#define ATTR_PM_SLEEP_WINKLE_REQUEST_TIMEOUT_SETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::set_ignore()
+#define ATTR_PM_SLEEP_ENTRY_SETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::set_ignore()
+#define ATTR_PM_SLEEP_EXIT_SETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::set_ignore()
+#define ATTR_PM_SLEEP_TYPE_SETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::set_ignore()
+#define ATTR_PM_WINKLE_TYPE_SETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::set_ignore()
+#define ATTR_PM_PFET_POWERUP_CORE_DELAY0_SETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::set_ignore()
+#define ATTR_PM_PFET_POWERUP_CORE_DELAY1_SETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::set_ignore()
+#define ATTR_PM_PFET_POWERUP_CORE_SEQUENCE_DELAY_SELECT_SETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::set_ignore()
+#define ATTR_PM_PFET_POWERDOWN_CORE_DELAY0_SETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::set_ignore()
+#define ATTR_PM_PFET_POWERDOWN_CORE_DELAY1_SETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::set_ignore()
+#define ATTR_PM_PFET_POWERDOWN_CORE_SEQUENCE_DELAY_SELECT_SETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::set_ignore()
+#define ATTR_PM_PFET_POWERUP_ECO_DELAY0_SETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::set_ignore()
+#define ATTR_PM_PFET_POWERUP_ECO_DELAY1_SETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::set_ignore()
+#define ATTR_PM_PFET_POWERUP_ECO_SEQUENCE_DELAY_SELECT_SETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::set_ignore()
+#define ATTR_PM_PFET_POWERDOWN_ECO_DELAY0_SETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::set_ignore()
+#define ATTR_PM_PFET_POWERDOWN_ECO_DELAY1_SETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::set_ignore()
+#define ATTR_PM_PFET_POWERDOWN_ECO_SEQUENCE_DELAY_SELECT_SETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::set_ignore()
+#define ATTR_PM_IVRMS_ENABLED_SETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::set_ignore()
+#define ATTR_PM_SAFE_PSTATE_SETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::set_ignore()
+#define ATTR_PM_RESONANT_CLOCK_ENABLE_SETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::set_ignore()
+#define ATTR_PM_RESONANT_CLOCK_FULL_CSB_PSTATE_SETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::set_ignore()
+#define ATTR_PM_RESONANT_CLOCK_LFRLOW_PSTATE_SETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::set_ignore()
+#define ATTR_PM_RESONANT_CLOCK_LFRUPPER_PSTATE_SETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::set_ignore()
+#define ATTR_PM_RESONANT_CLOCK_HFRLOW_PSTATE_SETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::set_ignore()
+#define ATTR_PM_RESONANT_CLOCK_HFRHIGH_PSTATE_SETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::set_ignore()
+#define ATTR_PM_SPIPSS_FRAME_SIZE_SETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::set_ignore()
+#define ATTR_PM_SPIPSS_OUT_COUNT_SETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::set_ignore()
+#define ATTR_PM_SPIPSS_IN_DELAY_SETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::set_ignore()
+#define ATTR_PM_SPIPSS_IN_COUNT_SETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::set_ignore()
+#define ATTR_PM_SPIPSS_CLOCK_POLARITY_SETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::set_ignore()
+#define ATTR_PM_SPIPSS_CLOCK_PHASE_SETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::set_ignore()
+#define ATTR_PM_SPIPSS_CLOCK_DIVIDER_SETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::set_ignore()
+#define ATTR_PM_SPIPSS_INTER_FRAME_DELAY_SETTING_SETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::set_ignore()
+#define ATTR_PM_SPIPSS_INTER_FRAME_DELAY_SETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::set_ignore()
+#define ATTR_PM_SPWUP_FSP_SETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::set_ignore()
+#define ATTR_PM_SPWUP_OCC_SETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::set_ignore()
+#define ATTR_PM_SPWUP_PHYP_SETMACRO( ID, PTARGET, VAL )    \
+    fapi::platAttrSvc::set_ignore()
+
 
 #endif // FAPIPLATATTRIBUTESERVICE_H_
diff --git a/src/include/usr/runtime/runtime.H b/src/include/usr/runtime/runtime.H
new file mode 100644
index 000000000..f638d9762
--- /dev/null
+++ b/src/include/usr/runtime/runtime.H
@@ -0,0 +1,44 @@
+/* IBM_PROLOG_BEGIN_TAG                                                   */
+/* This is an automatically generated prolog.                             */
+/*                                                                        */
+/* $Source: src/include/usr/runtime/runtime.H $                           */
+/*                                                                        */
+/* IBM CONFIDENTIAL                                                       */
+/*                                                                        */
+/* COPYRIGHT International Business Machines Corp. 2012                   */
+/*                                                                        */
+/* p1                                                                     */
+/*                                                                        */
+/* Object Code Only (OCO) source materials                                */
+/* Licensed Internal Code Source Materials                                */
+/* IBM HostBoot Licensed Internal Code                                    */
+/*                                                                        */
+/* The source code for this program is not published or otherwise         */
+/* divested of its trade secrets, irrespective of what has been           */
+/* deposited with the U.S. Copyright Office.                              */
+/*                                                                        */
+/* Origin: 30                                                             */
+/*                                                                        */
+/* IBM_PROLOG_END_TAG                                                     */
+
+#ifndef __RUNTIME_H
+#define __RUNTIME_H
+
+#include <stdint.h>
+#include <builtins.h>
+#include <errl/errlentry.H>
+
+namespace RUNTIME
+{
+
+/**
+ * @brief Populate attributes in mainstore for HostServices
+ *
+ * @return errlHndl_t  NULL on success
+ */
+errlHndl_t populate_attributes( void );
+
+
+}
+
+#endif 
diff --git a/src/include/usr/runtime/runtime_reasoncodes.H b/src/include/usr/runtime/runtime_reasoncodes.H
new file mode 100644
index 000000000..3c81ac54b
--- /dev/null
+++ b/src/include/usr/runtime/runtime_reasoncodes.H
@@ -0,0 +1,43 @@
+/* IBM_PROLOG_BEGIN_TAG                                                   */
+/* This is an automatically generated prolog.                             */
+/*                                                                        */
+/* $Source: src/include/usr/runtime/runtime_reasoncodes.H $               */
+/*                                                                        */
+/* IBM CONFIDENTIAL                                                       */
+/*                                                                        */
+/* COPYRIGHT International Business Machines Corp. 2012                   */
+/*                                                                        */
+/* p1                                                                     */
+/*                                                                        */
+/* Object Code Only (OCO) source materials                                */
+/* Licensed Internal Code Source Materials                                */
+/* IBM HostBoot Licensed Internal Code                                    */
+/*                                                                        */
+/* The source code for this program is not published or otherwise         */
+/* divested of its trade secrets, irrespective of what has been           */
+/* deposited with the U.S. Copyright Office.                              */
+/*                                                                        */
+/* Origin: 30                                                             */
+/*                                                                        */
+/* IBM_PROLOG_END_TAG                                                     */
+#ifndef __RUNTIME_REASONCODES_H
+#define __RUNTIME_REASONCODES_H
+
+#include <hbotcompid.H>
+
+namespace RUNTIME
+{
+    enum RuntimeModuleId
+    {
+        MOD_RUNTIME_INVALID             = 0x00, /**< Zero is an invalid module id */
+        MOD_RUNTIME_POP_SYS_ATTR        = 0x01, 
+        MOD_RUNTIME_POP_NODE_ATTR       = 0x02,
+    };
+
+    enum RuntimeReasonCode
+    {
+        RC_ATTR_GET_FAIL            = RUNTIME_COMP_ID | 0x01,
+    };
+};
+
+#endif
diff --git a/src/makefile b/src/makefile
index e11d441fe..1da89aa4d 100644
--- a/src/makefile
+++ b/src/makefile
@@ -58,14 +58,14 @@ EXTENDED_MODULES = targeting ecmddatabuffer fapi hwp plat	\
                    core_activate dram_initialization edi_ei_initialization \
                    establish_system_smp \
                    nest_chiplets start_payload thread_activate slave_sbe \
-                   attn
+                   attn runtime
 
 TESTCASE_MODULES = cxxtest testerrl testdevicefw testsyslib \
                    testscom testxscom testtargeting testinitservice testkernel \
                    testhwpf testecmddatabuffer initsvctesttask testcxxtest \
                    testpnor testi2c testfsi testvfs testhwas testintr testspd \
                    testpore testutil testmbox testmdia testmvpd testprdf testattn \
-                   testscan
+                   testscan testruntime
 
 RELOCATABLE_IMAGE_LDFLAGS = -pie --export-dynamic
 
diff --git a/src/usr/fsi/test/makefile b/src/usr/fsi/test/makefile
index 4c3fd7e8d..165f7fb02 100644
--- a/src/usr/fsi/test/makefile
+++ b/src/usr/fsi/test/makefile
@@ -1,25 +1,25 @@
-#  IBM_PROLOG_BEGIN_TAG
-#  This is an automatically generated prolog.
+# IBM_PROLOG_BEGIN_TAG
+# This is an automatically generated prolog.
 #
-#  $Source: src/usr/fsi/test/makefile $
+# $Source: src/usr/fsi/test/makefile $
 #
-#  IBM CONFIDENTIAL
+# IBM CONFIDENTIAL
 #
-#  COPYRIGHT International Business Machines Corp. 2011
+# COPYRIGHT International Business Machines Corp. 2011,2012
 #
-#  p1
+# p1
 #
-#  Object Code Only (OCO) source materials
-#  Licensed Internal Code Source Materials
-#  IBM HostBoot Licensed Internal Code
+# Object Code Only (OCO) source materials
+# Licensed Internal Code Source Materials
+# IBM HostBoot Licensed Internal Code
 #
-#  The source code for this program is not published or other-
-#  wise divested of its trade secrets, irrespective of what has
-#  been deposited with the U.S. Copyright Office.
+# The source code for this program is not published or otherwise
+# divested of its trade secrets, irrespective of what has been
+# deposited with the U.S. Copyright Office.
 #
-#  Origin: 30
+# Origin: 30
 #
-#  IBM_PROLOG_END
+# IBM_PROLOG_END_TAG
 ROOTPATH = ../../../..
 
 MODULE = testfsi
diff --git a/src/usr/hwpf/hwp/runtime_attributes/pm_hwp_attributes.xml b/src/usr/hwpf/hwp/runtime_attributes/pm_hwp_attributes.xml
new file mode 100644
index 000000000..17ecc890c
--- /dev/null
+++ b/src/usr/hwpf/hwp/runtime_attributes/pm_hwp_attributes.xml
@@ -0,0 +1,797 @@
+<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
+<!-- This is an automatically generated prolog.                             -->
+<!--                                                                        -->
+<!-- $Source: src/usr/hwpf/hwp/runtime_attributes/pm_hwp_attributes.xml $   -->
+<!--                                                                        -->
+<!-- IBM CONFIDENTIAL                                                       -->
+<!--                                                                        -->
+<!-- COPYRIGHT International Business Machines Corp. 2012                   -->
+<!--                                                                        -->
+<!-- p1                                                                     -->
+<!--                                                                        -->
+<!-- Object Code Only (OCO) source materials                                -->
+<!-- Licensed Internal Code Source Materials                                -->
+<!-- IBM HostBoot Licensed Internal Code                                    -->
+<!--                                                                        -->
+<!-- The source code for this program is not published or otherwise         -->
+<!-- divested of its trade secrets, irrespective of what has been           -->
+<!-- deposited with the U.S. Copyright Office.                              -->
+<!--                                                                        -->
+<!-- Origin: 30                                                             -->
+<!--                                                                        -->
+<!-- IBM_PROLOG_END_TAG                                                     -->
+<!--
+    XML file specifying Power Management HWPF attributes.
+    These attributes are initialized to zero by the platform and set to a
+    meaningful value by a HWP
+-->
+
+<attributes>
+<!-- *********************************************************************** -->
+
+<attribute>
+    <id>ATTR_PM_POWER_PROXY_TRACE_TIMER</id>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+    <description>The  Power Proxy Trace timer (binary in microseconds) defines the time between Power Proxy Trace records when no other event that would otherwise produce a record has occured.  Values must be within a range of 32us to 64ms.</description>
+    <valueType>uint32</valueType>
+    <writeable/>
+</attribute>
+
+<attribute>
+    <id>ATTR_PM_PPT_TIMER_MATCH_VALUE</id>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+    <description>The delay is 32us * ATTR_PM_PPT_TIMER_MATCH_VALUE</description>
+    <valueType>uint32</valueType>
+    <writeable/>
+</attribute>
+
+<attribute>
+    <id>ATTR_PM_PPT_TIMER_TICK</id>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+    <description>Defines the Power Proxy Trace interval timer tick (0=25us, 1=0.5us, 2=1us, and 3=2us)</description>
+    <valueType>uint32</valueType>
+    <writeable/>
+</attribute>
+
+<attribute>
+    <id>ATTR_PM_AISS_TIMEOUT</id>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+    <description>Defines the timeout value for the Architected Idle State Sequencer (AISS).</description>
+    <valueType>uint8</valueType>
+    <enum>1MS=0,  2MS=1,  4MS=2,  8MS=3, 16MS=4, 32MS=5, 64MS=6, 128MS=7, 256MS=8, 512MS=9</enum>
+    <writeable/>
+</attribute>
+
+<attribute>
+    <id>ATTR_PM_PSTATE_STEPSIZE</id>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+    <description>Unsigned 7 bit (baby-) stepsize for Pstate transitions between the Global Pstate Actual and the Global Pstate Target. Only non-zero values are supported for this dial.
+
+Used to setup the PMC voltage controller
+
+Producer: proc_build_pstate_tables.C
+
+Consumer: OCC pstate_init()</description>
+    <valueType>uint8</valueType>
+    <writeable/>
+</attribute>
+
+<attribute>
+    <id>ATTR_PM_EXTERNAL_VRM_STEPDELAY_RANGE</id>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+    <description>Selects the resolution for the step delay count after a voltage change (decimal value N for this field divides the prv clock by 2^(N+3))
+
+A 4 bit field  selects one of the the upper 16bit of a 19bit counter (16+3) incremented in the nest/4 domain
+
+Consumer: proc_pm.scominit</description>
+    <valueType>uint8</valueType>
+    <writeable/>
+</attribute>
+
+<attribute>
+    <id>ATTR_PM_EXTERNAL_VRM_STEPDELAY_VALUE</id>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+    <description>Step delay after a voltage change in increments of vrm_stepdelay_range.  Setting this dial to a value N causes a delay of N cycles of the divided nest clk (see dial vrm_stepdelay_range). The closed formula is as follows: Delay_seconds = vrm_stepdelay_value * ( 2^(3 + vrm_stepdelay_range) / (Nest_frequency_Hz/4))
+
+Consumer: proc_pm.scominit</description>
+    <valueType>uint8</valueType>
+    <writeable/>
+</attribute>
+
+<attribute>
+    <id>ATTR_PM_PMC_HANGPULSE_DIVIDER</id>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+    <description>Divides the hang pulse to PMC to achieve XXXX. Note that this needs to be set according to the description of dial pmc_occ_heartbeat_time
+
+Producer:  prc_pm_effective
+
+Consumer: proc_pm.scominit</description>
+    <valueType>uint8</valueType>
+    <writeable/>
+</attribute>
+
+<attribute>
+    <id>ATTR_PM_PVSAFE_PSTATE</id>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+    <description>
+Pstate that is invoked in the PMC voltage controller upon the loss of the OCC Heartbeat..
+
+Producer:  proc_pm_effective.C
+
+Consumer: proc_pm.scominit</description>
+    <valueType>uint8</valueType>
+    <writeable/>
+</attribute>
+
+<attribute>
+    <id>ATTR_PM_SPIVID_FRAME_SIZE</id>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+    <description>Number of data bits per individual SPIVID transaction (also referred to as frame) during chip select assertion
+
+Supported values: 0x20 (32d)
+
+Chip Select assertion duration is spi_frame_size + 2</description>
+    <valueType>uint8</valueType>
+    <writeable/>
+</attribute>
+
+<attribute>
+    <id>ATTR_PM_SPIVID_IN_DELAY_FRAME1</id>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+    <description>Number of SPIVID clocks after chip select to wait before capturing MISO input in frame 1
+
+Supported values: 0x00 to spi_frame_size.  Values beyond spi_frame_size result in the input never being captured</description>
+    <valueType>uint8</valueType>
+    <writeable/>
+</attribute>
+
+<attribute>
+    <id>ATTR_PM_SPIVID_IN_DELAY_FRAME2</id>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+    <description>Number of SPI clocks after chip select to wait before capturing MISO input in frame 2
+
+Supported values: 0x00 to spi_frame_size.  Values beyond spi_frame_size result in the input never being captured</description>
+    <valueType>uint8</valueType>
+    <writeable/>
+</attribute>
+
+<attribute>
+    <id>ATTR_PM_SPIVID_CLOCK_POLARITY</id>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+    <description>SPVID Clock Polarity  (CPOL=0 means that clk idle is deasserted, CPOL=1 means that clk idle is asserted)</description>
+    <valueType>uint8</valueType>
+    <enum>IDLELOW=0, IDLEHIGH = 1</enum>
+    <writeable/>
+</attribute>
+
+<attribute>
+    <id>ATTR_PM_SPIVID_CLOCK_PHASE</id>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+    <description>SPI clock phase (CPHA=0 means to change/sample values of data signals on first edge, otherwise on 2nd)</description>
+    <valueType>uint8</valueType>
+    <enum>FIRSTEDGE=0, 
+SECONDEDGE=1</enum>
+    <writeable/>
+</attribute>
+
+<attribute>
+    <id>ATTR_PM_SPIVID_CLOCK_DIVIDER</id>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+    <description>SPIVID clock speed divider to divide the nest_nclk/4 mesh clock, which results in a divider = (nest_freq/ (SPI_freq*8))-1
+For a 2.4GHz nest clock, this means that the SPI clk can be theoretically adjusted between 600MHz and 0.29MHz (cycle time 1.66ns...3.41us, in 1.66ns steps). However, a practical range is 0.5...25MHz.</description>
+    <valueType>uint32</valueType>
+    <writeable/>
+</attribute>
+
+<attribute>
+    <id>ATTR_PM_SPIVID_INTERFRAME_DELAY_WRITE_STATUS</id>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+    <description>Delay between command and status frames of a SPIVID WRITE operation (binary in nanoseconds)
+Consumer: proc_pmc_init</description>
+    <valueType>uint32</valueType>
+    <writeable/>
+</attribute>
+
+<attribute>
+    <id>ATTR_PM_SPIVID_INTERFRAME_DELAY_WRITE_STATUS_VALUE</id>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+    <description>Delay between two frames of a Write command as measured from the end of the last bit of the first frame until the chip select of the second frame, which contains the status, is asserted.  This delay allows for the checking and status data production in the SPIVID chip.
+
+Delay is computed as:  (value * ~100ns_hang_pulse)  +0/-~100ns_hang_pulse time
+
+0x00000: Wait 1 SPI Clock
+0x00001 - 0x1FFFF: value = number of ~100ns_hang_pulses
+
+For values greater than 0x00000, the actual delay is 1 SPI Clock + the time delay designated by the value defined. Max. delay at 0x1FFFF: 13.1ms + 1 SPI clock cycle.</description>
+    <valueType>uint32</valueType>
+    <writeable/>
+</attribute>
+
+<attribute>
+    <id>ATTR_PM_SPIVID_INTER_RETRY_DELAY_VALUE</id>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+    <description>Delay between command retry attempts.
+
+Delay is computed as:  (value * ~100ns_hang_pulse)  +0/-~100ns_hang_pulse time
+
+0x0000: Wait 1 SPI Clock
+0x0001 - 0xFFFF: value = number of ~100ns_hang_pulses
+
+For values greater than 0x00000, the actual delay is 1 SPI Clock + the time delay designated by the value defined. Max. delay at 0x1FFFF: 13.1ms + 1 SPI clock cycle.</description>
+    <valueType>uint32</valueType>
+    <writeable/>
+</attribute>
+
+<attribute>
+    <id>ATTR_PM_SPIVID_INTER_RETRY_DELAY</id>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+    <description>Delay between SPIVID reture attempts when WRITE command status indicates an error (binary in nanoseconds)
+Consumer: proc_pmc_init</description>
+    <valueType>uint32</valueType>
+    <writeable/>
+</attribute>
+
+<attribute>
+    <id>ATTR_PM_SPIVID_CRC_GEN_ENABLE</id>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+    <description>EnableS CRC generation from processor to VRM device. This will produce an 8b CRC per the enabled polynomial. If CRC generation is disabled, the full 32 bits at the data input of the SPI master are transmitted.</description>
+    <valueType>uint8</valueType>
+    <enum>TRUE = 1, FALSE = 0</enum>
+    <writeable/>
+</attribute>
+
+<attribute>
+    <id>ATTR_PM_SPIVID_CRC_CHECK_ENABLE</id>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+    <description>Enables CRC checking in the processor of frames from the VRM device.</description>
+    <valueType>uint8</valueType>
+    <enum>TRUE = 1, FALSE = 0</enum>
+    <writeable/>
+</attribute>
+
+<attribute>
+    <id>ATTR_PM_SPIVID_MAJORITY_VOTE_ENABLE</id>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+    <description>enables the a majority vote on the 3B of status payload on a frame received by the master as each of these have a 1 byte status field replicated three (3) times by the slave.</description>
+    <valueType>uint8</valueType>
+    <enum>TRUE = 1, FALSE = 0</enum>
+    <writeable/>
+</attribute>
+
+<attribute>
+    <id>ATTR_PM_SPIVID_MAX_RETRIES</id>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+    <description>Number retries upon detected errors.
+
+0x00: No retry
+0x01 to 0x1F: 1 to 31 respectively</description>
+    <valueType>uint8</valueType>
+    <writeable/>
+</attribute>
+
+<attribute>
+    <id>ATTR_PM_SPIVID_CRC_POLYNOMIAL_ENABLES</id>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+    <description>CRC8 Polynomial Enables
+
+An 8 bit mask vector to enable XORs in the CRC generation and checking LFSRs at the respective bit position. MSB (x^8) is omitted since it is always enabled, so the mask layout is (x^7,x^6,x^5,x^4,x^3,x^2,x^1,1)
+
+Planned CRC8 polynomial: x^8 + x^7 + x^6 + x^4 + x^2 + 1
+Value to enable planned polynomial: 0b1101_0101 (=0xD5)</description>
+    <valueType>uint8</valueType>
+    <writeable/>
+</attribute>
+
+<attribute>
+    <id>ATTR_PM_OCC_HEARTBEAT_TIME</id>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+    <description>Time within which the OCC firmware must access the PMC or the OCC will be considered faulty whereby  FIRs and malfunction alerts will be produced . (binary in nanoseconds)
+Consumer: OCC FW</description>
+    <valueType>uint32</valueType>
+</attribute>
+
+<attribute>
+    <id>ATTR_PM_SLEEP_WINKLE_REQUEST_TIMEOUT</id>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+    <description>Time (binary in ns) that will be the threshold value for the PMC PORE request timeout.
+
+Consumer: proc_pmc_init.C.  Will be translated to a DYNAMIC ATTRIBUTE for use by proc_pm..scominit  as a multiple of PM hang pulses.. Counter starts at 0, is increased with every tp_pmc_hang_pulse as long as PORE is busy and set the PMC local FIR bit 19 when count = threshold.</description>
+    <valueType>uint32</valueType>
+    <writeable/>
+</attribute>
+
+<attribute>
+    <id>ATTR_PM_SLEEP_ENTRY</id>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+    <description>Setting depends on di/dt charateristics of the system.
+
+Set Assisted if power off serialization is needed and SLEEP_TYPE=Fast;  Set to Hardware if the system can handle the unrelated powering off between cores.  Hardware setting decreases entry latency
+
+Producer: MRWB
+
+Consumer:  proc_pm_effective and proc_pcbs_init</description>
+    <valueType>uint8</valueType>
+    <enum>HARDWARE=0, ASSISTED=1</enum>
+    <writeable/>
+</attribute>
+
+<attribute>
+    <id>ATTR_PM_SLEEP_EXIT</id>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+    <description>Setting depends on di/dt charateristics of the system and the setting of ATTR_PM_SLEEP_TYPE.
+
+Set to Assisted if power on serialization is needed and SLEEP_TYPE=Fast;  Set to Hardware if the system can handle the unrelated powering off between cores.  Hardware setting decreases entry latency
+Must be set to Assisted if ATTR_PM_SLEEP_TYPE=Deep as this necessary for restore.
+
+Setting to Hardware is a test mode for Fast only.
+
+Producer: MRWB
+
+Consumer:  proc_pm_effective and proc_pcbs_init.</description>
+    <valueType>uint8</valueType>
+    <enum>HARDWARE=0, ASSISTED=1</enum>
+    <writeable/>
+</attribute>
+
+<attribute>
+    <id>ATTR_PM_SLEEP_TYPE</id>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+    <description>Sleep Power Off Select:
+Selects which voltage level to place the Core domain PFETs upon Sleep entry. 0 = Vret (Fast Sleep Mode), 1 = Voff (Deep Sleep Mode)
+
+Producer: MRWB
+
+Consumer:  proc_pm_effective and proc_pcbs_init</description>
+    <valueType>uint8</valueType>
+    <enum>FAST=0, DEEP=1</enum>
+    <writeable/>
+</attribute>
+
+<attribute>
+    <id>ATTR_PM_WINKLE_TYPE</id>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+    <description>Winkle Power Off Select:
+Selects which voltage level to place the Core and ECO domain PFETs upon Winkle entry. 0 = Vret (Fast Winkle Mode), 1 = Voff (Deep Winkle Mode)</description>
+    <valueType>uint8</valueType>
+    <enum>FAST=0, DEEP=1</enum>
+    <writeable/>
+</attribute>
+
+<attribute>
+    <id>ATTR_PM_PFET_POWERUP_CORE_DELAY0</id>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+    <description>Delay (binary in nanoseconds) after a step in the Core power-up  PFET sequence.  Enabled per step by the vector defined in ATTR_PM_PFET_POWERUP_CORE_SEQUENCE_DELAY_SELECT</description>
+    <valueType>uint32</valueType>
+    <writeable/>
+</attribute>
+
+<attribute>
+    <id>ATTR_PM_PFET_POWERUP_CORE_DELAY1</id>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+    <description>Delay (binary in nanoseconds) after a step in the Core power-up  PFET sequence.  Enabled per step by the vector defined in ATTR_PM_PFET_POWERUP_CORE_SEQUENCE_DELAY_SELECT</description>
+    <valueType>uint32</valueType>
+    <writeable/>
+</attribute>
+
+<attribute>
+    <id>ATTR_PM_PFET_POWERUP_CORE_DELAY0_VALUE</id>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+    <description>Delay value 0  between any step in the Core power-up  PFET sequence.</description>
+    <valueType>uint8</valueType>
+</attribute>
+
+<attribute>
+    <id>ATTR_PM_PFET_POWERUP_CORE_DELAY1_VALUE</id>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+    <description>Delay value 1  between any step in the Core power-up  PFET sequence.</description>
+    <valueType>uint8</valueType>
+</attribute>
+
+<attribute>
+    <id>ATTR_PM_PFET_POWERUP_CORE_SEQUENCE_DELAY_SELECT</id>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+    <description>Binary vector where the most significant bits (0:11) identify the delay to be used for that step of the sequence.  Power up goes from 11, then 10, then 9,.... then 0.
+
+0 in the bit position:  use ATTR_PM_PFET_POWERUP_CORE_DELAY0;
+
+1 in the bit position:  use ATTR_PM_PFET_POWERUP_CORE_DELAY1</description>
+    <valueType>uint32</valueType>
+    <writeable/>
+</attribute>
+
+<attribute>
+    <id>ATTR_PM_PFET_POWERDOWN_CORE_DELAY0</id>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+    <description>Delay (binary in nanoseconds) between a step in the Core power-down  PFET sequence.  Enabled per step by the vector defined in ATTR_PM_PFET_POWERDOWN_CORE_SEQUENCE_DELAY_SELECT</description>
+    <valueType>uint32</valueType>
+    <writeable/>
+</attribute>
+
+<attribute>
+    <id>ATTR_PM_PFET_POWERDOWN_CORE_DELAY1</id>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+    <description>Delay (binary in nanoseconds) between a step in the Core power-down  PFET sequence.  Enabled per step by the vector defined in ATTR_PM_PFET_POWERDOWN_CORE_SEQUENCE_DELAY_SELECT</description>
+    <valueType>uint32</valueType>
+    <writeable/>
+</attribute>
+
+<attribute>
+    <id>ATTR_PM_PFET_POWERDOWN_CORE_DELAY0_VALUE</id>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+    <description>Delay value 0  between any step in the Core power-up  PFET sequence.</description>
+    <valueType>uint8</valueType>
+</attribute>
+
+<attribute>
+    <id>ATTR_PM_PFET_POWERDOWN_CORE_DELAY1_VALUE</id>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+    <description>Delay value 1  between any step in the Core power-up  PFET sequence.</description>
+    <valueType>uint8</valueType>
+</attribute>
+
+<attribute>
+    <id>ATTR_PM_PFET_POWERDOWN_CORE_SEQUENCE_DELAY_SELECT</id>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+    <description>Binary vector where the most significant bits (0:11) identify the delay to be used for that step of the sequence.  Power up goes from 11, then 10, then 9,.... then 0.
+
+0 in the bit position:  use ATTR_PM_PFET_POWERUP_CORE_DELAY0;
+
+1 in the bit position:  use ATTR_PM_PFET_POWERUP_CORE_DELAY1</description>
+    <valueType>uint32</valueType>
+    <writeable/>
+</attribute>
+
+<attribute>
+    <id>ATTR_PM_PFET_POWERUP_ECO_DELAY0</id>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+    <description>Delay (binary in nanoseconds) after a step in the ECO power-up  PFET sequence.  Enabled per step by the vector defined in ATTR_PM_PFET_POWERUP_ECO_SEQUENCE_DELAY_SELECT</description>
+    <valueType>uint32</valueType>
+    <writeable/>
+</attribute>
+
+<attribute>
+    <id>ATTR_PM_PFET_POWERUP_ECO_DELAY1</id>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+    <description>Delay (binary in nanoseconds) after a step in the ECO power-up  PFET sequence.  Enabled per step by the vector defined in ATTR_PM_PFET_POWERUP_ECO_SEQUENCE_DELAY_SELECT</description>
+    <valueType>uint32</valueType>
+    <writeable/>
+</attribute>
+
+<attribute>
+    <id>ATTR_PM_PFET_POWERUP_ECO_DELAY0_VALUE</id>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+    <description>Delay value 0  between any step in the ECO power-up  PFET sequence.</description>
+    <valueType>uint8</valueType>
+</attribute>
+
+<attribute>
+    <id>ATTR_PM_PFET_POWERUP_ECO_DELAY1_VALUE</id>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+    <description>Delay value 1  between any step in the ECO power-up  PFET sequence.</description>
+    <valueType>uint8</valueType>
+</attribute>
+
+<attribute>
+    <id>ATTR_PM_PFET_POWERUP_ECO_SEQUENCE_DELAY_SELECT</id>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+    <description>Binary vector where the most significant bits (0:11) identify the delay to be used for that step of the sequence.  Power up goes from 11, then 10, then 9,.... then 0.
+
+0 in the bit position:  use ATTR_PM_PFET_POWERUP_ECO_DELAY0;
+
+1 in the bit position:  use ATTR_PM_PFET_POWERUP_ECO_DELAY1</description>
+    <valueType>uint32</valueType>
+    <writeable/>
+</attribute>
+
+<attribute>
+    <id>ATTR_PM_PFET_POWERDOWN_ECO_DELAY0</id>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+    <description>Delay (binary in nanoseconds) between a step in the ECO power-down  PFET sequence.  Enabled per step by the vector defined in ATTR_PM_PFET_POWERDOWN_ECO_SEQUENCE_DELAY_SELECT</description>
+    <valueType>uint32</valueType>
+    <writeable/>
+</attribute>
+
+<attribute>
+    <id>ATTR_PM_PFET_POWERDOWN_ECO_DELAY1</id>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+    <description>Delay (binary in nanoseconds) between a step in the ECO power-down  PFET sequence.  Enabled per step by the vector defined in ATTR_PM_PFET_POWERDOWN_ECO_SEQUENCE_DELAY_SELECT</description>
+    <valueType>uint32</valueType>
+    <writeable/>
+</attribute>
+
+<attribute>
+    <id>ATTR_PM_PFET_POWERDOWN_ECO_DELAY0_VALUE</id>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+    <description>Delay value 0  between any step in the ECO power-up  PFET sequence.</description>
+    <valueType>uint8</valueType>
+</attribute>
+
+<attribute>
+    <id>ATTR_PM_PFET_POWERDOWN_ECO_DELAY1_VALUE</id>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+    <description>Delay value 1  between any step in the ECO power-up  PFET sequence.</description>
+    <valueType>uint8</valueType>
+</attribute>
+
+<attribute>
+    <id>ATTR_PM_PFET_POWERDOWN_ECO_SEQUENCE_DELAY_SELECT</id>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+    <description>Binary vector where the most significant bits (0:11) identify the delay to be used for that step of the ECO power up sequence.  Power up goes from 11, then 10, then 9,.... then 0.  0 in the bit position:  use ATTR_PM_PFET_POWERUP_ECO_DELAY0;  1 in the bit position:  use ATTR_PM_PFET_POWERUP_ECO_DELAY1</description>
+    <valueType>uint32</valueType>
+    <writeable/>
+</attribute>
+
+<attribute>
+    <id>ATTR_PM_PSTATE0_FREQUENCY</id>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+    <description>Defines the center point of the Pstate space in the frequency domain.  Binary in Khz.
+
+Producer: proc_build_gpstate.C
+
+Consumers: proc_pcbs_init.C, proc_pcbs_lpst_init.C, </description>
+    <valueType>uint32</valueType>
+</attribute>
+
+<attribute>
+    <id>ATTR_PM_IVRMS_ENABLED</id>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+    <description>Indicates whether available internal voltage regulation macros (iVRMs) are to enabled.  This indicates that module VPD has valid #M keywords available.</description>
+    <valueType>uint8</valueType>
+    <enum>TRUE = 1, FALSE = 0</enum>
+    <writeable/>
+</attribute>
+
+<attribute>
+    <id>ATTR_PM_SAFE_PSTATE</id>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+    <description>Safe Pstate
+
+Valid Values:-128 thru 127
+
+Producer: proc_pm_effective.C
+
+DYNAMIC_ATTRIBUTE
+
+Consumer: proc_pcbs_init.C
+
+Establishes the Pstate that the core chiplet will take on if:
+psafe less-than-or-equal PMSR[global_actual_pstate]
+AND any of the following conditions are true:
+Loss of OCC Heartbeat if occ_heartbeat_en is set
+PMGP0[force_safe_mode] is set
+
+If psafe greater-than PMSR[global_actual_pstate], the  global_actual_pstate is forced.
+
+The value of Psafe needs to be at or below the nominal Pstate to make sure safe operation of all chiplets.</description>
+    <valueType>uint8</valueType>
+    <writeable/>
+</attribute>
+
+<attribute>
+    <id>ATTR_PM_RESONANT_CLOCK_ENABLE</id>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+    <description>Resonant Clock Enable</description>
+    <valueType>uint8</valueType>
+    <writeable/>
+</attribute>
+
+<attribute>
+    <id>ATTR_PM_RESONANT_CLOCK_FULL_CSB_PSTATE</id>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+    <description>FCSB  Full Clock Sector Buffer (8b in terms of Pstate)
+Defines the Pstate for the point at which clock sector buffers should be at full strength.  This is to support Vmin operation.
+</description>
+    <valueType>uint8</valueType>
+    <writeable/>
+</attribute>
+
+<attribute>
+    <id>ATTR_PM_RESONANT_CLOCK_LFRLOW_PSTATE</id>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+    <description>LFRLower  Low Frequency Resonant Lower.  Defines the Pstate for the lower end of the Low Frequency Resonant band</description>
+    <valueType>uint8</valueType>
+    <writeable/>
+</attribute>
+
+<attribute>
+    <id>ATTR_PM_RESONANT_CLOCK_LFRUPPER_PSTATE</id>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+    <description>LFRUpper  Low Frequency Resonant Upper. Defines the Pstate for the upper end of the Low Frequency Resonant band</description>
+    <valueType>uint8</valueType>
+    <writeable/>
+</attribute>
+
+<attribute>
+    <id>ATTR_PM_RESONANT_CLOCK_HFRLOW_PSTATE</id>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+    <description>HFRLower  High Frequency Resonant Low. Defines the Pstate for the lower end of the High Frequency Resonant band</description>
+    <valueType>uint8</valueType>
+    <writeable/>
+</attribute>
+
+<attribute>
+    <id>ATTR_PM_RESONANT_CLOCK_HFRHIGH_PSTATE</id>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+    <description>HFRUpper  High Frequency Resonant Upper. Defines the Pstate for the upper end of the High Frequency Resonant band</description>
+    <valueType>uint8</valueType>
+    <writeable/>
+</attribute>
+
+<attribute>
+    <id>ATTR_PM_SPIPSS_FRAME_SIZE</id>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+    <description>Number of data bits per individual SPIPSS transaction (also referred to as frame) during chip select assertion
+
+Supported values: 0x10 (16d),
+
+Chip Select assertion duration is spi_frame_size + 2</description>
+    <valueType>uint8</valueType>
+    <writeable/>
+</attribute>
+
+<attribute>
+    <id>ATTR_PM_SPIPSS_OUT_COUNT</id>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+    <description>Number of bits sent out MOSI of the frame
+
+Supported values: 0x000 to spi_frame_size.  Values beyond spi_frame_size are ignored.</description>
+    <valueType>uint8</valueType>
+    <writeable/>
+</attribute>
+
+<attribute>
+    <id>ATTR_PM_SPIPSS_IN_DELAY</id>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+    <description>Number of SPI clocks after chip select to wait before capturing MISO input
+
+Supported values: 0x000 to spi_frame_size.  Values beyond spi_frame_size result in the input never being captured</description>
+    <valueType>uint8</valueType>
+    <writeable/>
+</attribute>
+
+<attribute>
+    <id>ATTR_PM_SPIPSS_IN_COUNT</id>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+    <description>Number of bits captured on MISO input
+
+Supported values: 0x000 to spi_frame_size.  The actual number of bits captured is spi_frame_size - spi_in_delay</description>
+    <valueType>uint8</valueType>
+    <writeable/>
+</attribute>
+
+<attribute>
+    <id>ATTR_PM_SPIPSS_CLOCK_POLARITY</id>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+    <description>SPIPSS Clock Polarity  (CPOL=0 means that clk idle is deasserted, CPOH=1 means that clk idle is asserted)</description>
+    <valueType>uint8</valueType>
+    <enum>CPOL=0, CPOH=1</enum>
+    <writeable/>
+</attribute>
+
+<attribute>
+    <id>ATTR_PM_SPIPSS_CLOCK_PHASE</id>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+    <description>SPIPSS clock phase (CPHA=0 means to change/sample values of data signals on first edge, otherwise on 2nd)</description>
+    <valueType>uint8</valueType>
+    <enum>FIRSTEDGE=0, SECONDEDGE=1</enum>
+    <writeable/>
+</attribute>
+
+<attribute>
+    <id>ATTR_PM_SPIPSS_CLOCK_DIVIDER</id>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+    <description>SPI clock speed divider to divide the nest_nclk/4 mesh clock, which results in a divider = (nest_freq/ (SPI_freq*8))-1</description>
+    <valueType>uint8</valueType>
+    <writeable/>
+</attribute>
+
+<attribute>
+    <id>ATTR_PM_SPIPSS_INTER_FRAME_DELAY_SETTING</id>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+    <description>
+Delay is computed as:  (value * ~100ns_hang_pulse)  +0/-~100ns_hang_pulse time
+
+0x00000: Wait 1 PSS Clock
+0x00001 - 0x1FFFF: value = number of ~100ns_hang_pulses
+
+For values greater than 0x00000, the actual delay is 1 PSS Clock + the time delay designated by the value defined. Max. delay at 0x1FFFF: 13.1ms + 1 PSSI clock cycle.
+
+Producer: proc_pm_effective
+
+Consumer: proc_pss_init</description>
+    <valueType>uint32</valueType>
+    <writeable/>
+</attribute>
+
+<attribute>
+    <id>ATTR_PM_SPIPSS_INTER_FRAME_DELAY</id>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+    <description>Delay between two frames of a P2S command as measured from the end of the last bit of the first frame until the chip select of the second frame.  (binary in nanoseconds)
+
+Consumer: proc_pm_effective
+
+Produces ATTR_PM_SPIPSS_INTER_FRAME_DELAY_SETTING</description>
+    <valueType>uint32</valueType>
+    <writeable/>
+</attribute>
+
+<attribute>
+    <id>ATTR_PM_PBAX_RCV_RESERV_TIMEOUT</id>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+    <description>PBAX Data Timeout Divider
+Divider for the 1us PBAX hang pulse.  A hang is detected after two divided hang pulses are received under the following conditions:
+ Data Hi packet accepted and timeout waiting for Data Lo packet.
+ Reservation aquired and timeout waiting for Data Hi packet.
+
+00000  Data Timeout is Disabled
+00001  divided hang pulse = PBAX hang pulse
+00010  divided hang pulse = PBAX hang pulse/2
+00011  divided hang pulse = PBAX hang pulse/3
+. . .
+11111   divided hang pulse = PBAX hang pulse/31</description>
+    <valueType>uint8</valueType>
+</attribute>
+
+<attribute>
+    <id>ATTR_PM_PBAX_SND_RETRY_COUNT_OVERCOMMIT_ENABLE</id>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+    <description>PBAX Send Retry count overcommit
+Mode bit to count overcommit retries for the send retry threshold when sending PBAX commands on the powerbus.</description>
+    <valueType>uint8</valueType>
+</attribute>
+
+<attribute>
+    <id>ATTR_PM_PBAX_SND_RETRY_THRESHOLD</id>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+    <description>PBAX Send Retry Threshold
+Defines the maximum number of retry attempts by the Send Engine for any phase of the PBAX transaction set before the operation is dropped and status bit are set.  This does not count PowerBus overcommit retries unless snd_retry_count_overcom bit is set.
+
+0x00 :  No Timeout
+0x01 :  1 attempt
+0x02 :   2 attempts
+.etc.
+0xFF :  255 attempts</description>
+    <valueType>uint8</valueType>
+</attribute>
+
+<attribute>
+    <id>ATTR_PM_PBAX_SND_RESERV_TIMEOUT</id>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+    <description>PBAX Send Reservation Timeout Divider
+Divider for the 1us PBAX hang pulse.  A hang is detected after two divided hang pulses are received after attempting to acquire a reservation with the PBAX Receive engine before declaring a Send Reservation Timeout error.
+
+00000  Send Reservation Timeout is Disabled
+00001  divided hang pulse = PBAX hang pulse
+00010  divided hang pulse = PBAX hang pulse/2
+00011  divided hang pulse = PBAX hang pulse/3
+. . .
+11111   divided hang pulse = PBAX hang pulse/31</description>
+    <valueType>uint8</valueType>
+</attribute>
+
+<attribute>
+    <id>ATTR_PM_SPWUP_FSP</id>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+    <description>Arbitration Attribute for FSP special wakeups:  upon set, increment, upon clear, decrement;   hardware bit only cleared upon attribute being 0.</description>
+    <valueType>uint32</valueType>
+    <writeable/>
+</attribute>
+
+<attribute>
+    <id>ATTR_PM_SPWUP_OCC</id>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+    <description>Arbitration Attribute for OCC special wakeups:  upon set, increment, upon clear, decrement;   hardware bit only cleared upon attribute being 0.</description>
+    <valueType>uint32</valueType>
+    <writeable/>
+</attribute>
+
+<attribute>
+    <id>ATTR_PM_SPWUP_PHYP</id>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+    <description>Arbitration Attribute for PHUP special wakeups:  upon set, increment, upon clear, decrement;   hardware bit only cleared upon attribute being 0.</description>
+    <valueType>uint32</valueType>
+    <writeable/>
+</attribute>
+
+</attributes>
+
diff --git a/src/usr/hwpf/hwp/runtime_attributes/pm_plat_attributes.xml b/src/usr/hwpf/hwp/runtime_attributes/pm_plat_attributes.xml
new file mode 100644
index 000000000..9d4c44c17
--- /dev/null
+++ b/src/usr/hwpf/hwp/runtime_attributes/pm_plat_attributes.xml
@@ -0,0 +1,352 @@
+<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
+<!-- This is an automatically generated prolog.                             -->
+<!--                                                                        -->
+<!-- $Source: src/usr/hwpf/hwp/runtime_attributes/pm_plat_attributes.xml $  -->
+<!--                                                                        -->
+<!-- IBM CONFIDENTIAL                                                       -->
+<!--                                                                        -->
+<!-- COPYRIGHT International Business Machines Corp. 2012                   -->
+<!--                                                                        -->
+<!-- p1                                                                     -->
+<!--                                                                        -->
+<!-- Object Code Only (OCO) source materials                                -->
+<!-- Licensed Internal Code Source Materials                                -->
+<!-- IBM HostBoot Licensed Internal Code                                    -->
+<!--                                                                        -->
+<!-- The source code for this program is not published or otherwise         -->
+<!-- divested of its trade secrets, irrespective of what has been           -->
+<!-- deposited with the U.S. Copyright Office.                              -->
+<!--                                                                        -->
+<!-- Origin: 30                                                             -->
+<!--                                                                        -->
+<!-- IBM_PROLOG_END_TAG                                                     -->
+<!--
+    XML file specifying Power Management HWPF attributes.
+    These attributes are initialized by the platform.
+-->
+
+<attributes>
+  <!-- ********************************************************************* -->
+  <attribute>
+    <id>ATTR_PM_EXTERNAL_VRM_STEPSIZE</id>
+    <targetType>TARGET_TYPE_SYSTEM</targetType>
+    <description>
+      Step size (binary in microvolts) to take upon external VRM voltage
+      transitions. The value set here must take into account where internal
+      VRMs are enabled or not as, when they are enabled, the step size must
+      account for the tracking (eg PFET strength recalculation) for the step.
+
+      Consumer: proc_build_pstate_tables.C, proc_pmc_init.C -config
+
+      Provided by the Machine Readable Workbook after system characterization.
+    </description>
+    <valueType>uint8</valueType>
+    <platInit/>
+  </attribute>
+  <!-- ********************************************************************* -->
+  <attribute>
+    <id>ATTR_PM_EXTERNAL_VRM_STEPDELAY</id>
+    <targetType>TARGET_TYPE_SYSTEM</targetType>
+    <description>
+      Step delay (binary in microseconds) after a voltage change
+
+      Consumer: proc_pmc_init -config
+
+      Provided by the Machine Readable Workbook after system characterization.
+    </description>
+    <valueType>uint32</valueType>
+    <platInit/>
+  </attribute>
+  <!-- ********************************************************************* -->
+  <attribute>
+    <id>ATTR_PM_PSTATE_UNDERVOLTING_MINIMUM</id>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+    <description>
+      Minimum frequency for which undervolting is allowed.  Will be internally
+      rounded to the nearest ATTR_PROC_REFCLK_FREQUENCY / 8 value.
+
+      Consumer: OCC FW; OCC Lab Tools
+
+      Provided by the Machine Readable Workbook.
+    </description>
+    <valueType>uint8</valueType>
+    <platInit/>
+  </attribute>
+  <!-- ********************************************************************* -->
+  <attribute>
+    <id>ATTR_PM_PSTATE_UNDERVOLTING_MAXIMUM</id>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+    <description>
+      Maximum frequency for which undervolting is allowed.  Will be internally
+      rounded to the nearest ATTR_PROC_REFCLK_FREQUENCY / 8 value.
+
+      Consumer: OCC FW; OCC Lab Tools
+
+      Provided by the Machine Readable Workbook.
+    </description>
+    <valueType>uint8</valueType>
+    <platInit/>
+  </attribute>
+  <!-- ********************************************************************* -->
+  <attribute>
+    <id>ATTR_PM_SPIVID_FREQUENCY</id>
+    <targetType>TARGET_TYPE_SYSTEM</targetType>
+    <description>
+      SPI Clock Frequency (binary in MHz)
+
+      Consumer: proc_pm_effective
+
+      Produces ATTR_PM_SPIVID_CLOCK_DIVIDER
+
+      Provided by the Machine Readable Workbook.
+    </description>
+    <valueType>uint32</valueType>
+    <platInit/>
+  </attribute>
+  <!-- ********************************************************************* -->
+  <attribute>
+    <id>ATTR_PM_SPIVID_PORT_ENABLE</id>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+    <description>
+      Defines the configuration of the SPIVID ports from the target.
+      - NONE means that no VRM is attached.
+      - PORTxNONRED means that the indicated port is used in a non-redundant
+                    configuration.
+      - REDUNDANT means that all three are connected and considered redundant.
+
+      Provided by the Machine Readable Workbook.
+    </description>
+    <valueType>uint8</valueType>
+    <enum>NONE = 0x00, PORT0NONRED = 0x04, PORT1NONRED = 0x02, PORT2NONRED = 0x01, REDUNDANT = 0x07</enum>
+    <platInit/>
+  </attribute>
+  <!-- ********************************************************************* -->
+  <attribute>
+    <id>ATTR_PM_SAFE_FREQUENCY</id>
+    <targetType>TARGET_TYPE_SYSTEM</targetType>
+    <description>
+      Indicates the frequency that the cores will be moved to in the event of
+      the loss of the OCC Heartbead.  This value needs to be at or below the
+      nominal frequency to make sure safe operation of all chiplets.
+
+      Valid Values:-128 thru 127
+
+      The value is translated to the Pstate space.
+
+      Consumer: proc_pm_effective.C
+
+      DYNAMIC_ATTRIBUTE: ATTR_PM_SAFE_PSTATE
+
+      Consumer: proc_pcbs_init.C
+
+      TODO: Dean said this may either be provided by the Machine Readable
+            Workbook or Todd R's power management def file.
+    </description>
+    <valueType>uint8</valueType>
+    <platInit/>
+  </attribute>
+  <!-- ********************************************************************* -->
+  <attribute>
+    <id>ATTR_PM_RESONANT_CLOCK_FULL_CLOCK_SECTOR_BUFFER_FREQUENCY</id>
+    <targetType>TARGET_TYPE_SYSTEM</targetType>
+    <description>
+      Frequency (binary in MHz) for the point at which clock sector buffers
+      should be at full strength.  This is to support Vmin operation.
+      Setting cannot overlap the Low or High bands.
+
+      Provided by the Machine Readable Workbook after system characterization.
+    </description>
+    <valueType>uint32</valueType>
+    <platInit/>
+  </attribute>
+  <!-- ********************************************************************* -->
+  <attribute>
+    <id>ATTR_PM_RESONANT_CLOCK_LOW_BAND_LOWER_FREQUENCY</id>
+    <targetType>TARGET_TYPE_SYSTEM</targetType>
+    <description>
+      Frequency (binary in MHz)) for the lower end of the Low Frequency
+      Resonant band
+
+      Provided by the Machine Readable Workbook after system characterization.
+    </description>
+    <valueType>uint32</valueType>
+    <platInit/>
+  </attribute>
+  <!-- ********************************************************************* -->
+  <attribute>
+    <id>ATTR_PM_RESONANT_CLOCK_LOW_BAND_UPPER_FREQUENCY</id>
+    <targetType>TARGET_TYPE_SYSTEM</targetType>
+    <description>
+      Frequency (binary in MHz) for the upper end of the Low Frequency
+      Resonant band
+
+      Provided by the Machine Readable Workbook after system characterization.
+    </description>
+    <valueType>uint32</valueType>
+    <platInit/>
+  </attribute>
+  <!-- ********************************************************************* -->
+  <attribute>
+    <id>ATTR_PM_RESONANT_CLOCK_HIGH_BAND_LOWER_FREQUENCY</id>
+    <targetType>TARGET_TYPE_SYSTEM</targetType>
+    <description>
+      Frequency (binary in MHz) for the lower end of the High Frequency
+      Resonant band
+
+      Provided by the Machine Readable Workbook after system characterization.
+    </description>
+    <valueType>uint32</valueType>
+    <platInit/>
+  </attribute>
+  <!-- ********************************************************************* -->
+  <attribute>
+    <id>ATTR_PM_RESONANT_CLOCK_HIGH_BAND_UPPER_FREQUENCY</id>
+    <targetType>TARGET_TYPE_SYSTEM</targetType>
+    <description>
+      Frequency (binary in MHz)) for the upper end of the High Frequency
+      Resonant band
+
+      Provided by the Machine Readable Workbook after system characterization.
+    </description>
+    <valueType>uint32</valueType>
+    <platInit/>
+  </attribute>
+  <!-- ********************************************************************* -->
+  <attribute>
+    <id>ATTR_PM_SPIPSS_FREQUENCY</id>
+    <targetType>TARGET_TYPE_SYSTEM</targetType>
+    <description>
+      SPIPSS Clock Frequency (binary in MHz)
+
+      Valid range: 0.5MHz to 25MHz
+
+      Consumer: proc_pmc_init
+
+      Provided by the Machine Readable Workbook.
+    </description>
+    <valueType>uint32</valueType>
+    <platInit/>
+  </attribute>
+  <!-- ********************************************************************* -->
+  <attribute>
+    <id>ATTR_PM_APSS_CHIP_SELECT</id>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+    <description>
+      Defines which of the PSS chip selects that the APSS is connected
+
+      Provided by the Machine Readable Workbook.
+    </description>
+    <valueType>uint8</valueType>
+    <enum>NONE = 0xFF, CS0 = 0x00, CS1 = 0x01</enum>
+    <platInit/>
+  </attribute>
+  <!-- ********************************************************************* -->
+  <attribute>
+    <id>ATTR_PM_PBAX_NODEID</id>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+    <description>
+      Receive PBAX Nodeid. Value that indicates this PBA's PBAX Node affinity.
+      This is matched to pbax_nodeid of the PMISC Address phase.
+
+      Provided by the Machine Readable Workbook.
+    </description>
+    <valueType>uint8</valueType>
+    <platInit/>
+  </attribute>
+  <!-- ********************************************************************* -->
+  <attribute>
+    <id>ATTR_PM_PBAX_CHIPID</id>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+    <description>
+      Receive PBAX Chipid. Value that indicates this PBA's PBAX Chipid within
+      the PBAX node.  Is matched to pbax_chipid of the Address phase if
+      pbax_type=unicast.
+
+      Provided by the Machine Readable Workbook.
+    </description>
+    <valueType>uint8</valueType>
+    <platInit/>
+  </attribute>
+  <!-- ********************************************************************* -->
+  <attribute>
+    <id>ATTR_PM_PBAX_BRDCST_ID_VECTOR</id>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+    <description>
+      Receive PBAX Broadcast Group. Vector that is indexed when decoded PMISC
+      pbax_type=broadcast with the decoded PMISC pbax_chipid value.  If the
+      bit in this vector at the decoded bit location is a 1, then this receive
+      engine will participate in the broadcast operation.
+
+      Provided by the Machine Readable Workbook.
+    </description>
+    <valueType>uint8</valueType>
+    <platInit/>
+  </attribute>
+  <!-- ********************************************************************* -->
+  <attribute>
+    <id>ATTR_PROC_R_LOADLINE</id>
+    <targetType>TARGET_TYPE_SYSTEM</targetType>
+    <description>
+      Impedance (binary microOhms) of the load line from a processor VRM to the
+      Processor Module pins.  This value is applied to each processor instance.
+
+      Consumers: proc_build_gpstate_table.C
+
+      Provided by the Machine Readable Workbook (via the power subsystem design
+      per system)
+    </description>
+    <valueType>uint32</valueType>
+    <platInit/>
+  </attribute>
+  <!-- ********************************************************************* -->
+  <attribute>
+    <id>ATTR_PROC_R_DISTLOSS</id>
+    <targetType>TARGET_TYPE_SYSTEM</targetType>
+    <description>
+      Impedance (binary in microOhms) of the distribution loss the sense point
+      to the circuit. This value is applied to each processor instance.
+
+      Consumers: proc_build_gpstate_table.C
+
+      Provided by the Machine Readable Workbook (via the power subsystem design
+      per system)
+    </description>
+    <valueType>uint32</valueType>
+    <platInit/>
+  </attribute>
+  <!-- ********************************************************************* -->
+  <attribute>
+    <id>ATTR_PROC_VRM_VOFFSET</id>
+    <targetType>TARGET_TYPE_SYSTEM</targetType>
+    <description>
+      Offset voltage (binary in microvolts) to apply to the VRM distribution to
+      the processor module.  This value is applied to each processor instance.
+
+      Consumers: proc_build_gpstate_table.C
+
+      Provided by the Machine Readable Workbook (via the power subsystem design
+      per system)
+    </description>
+    <valueType>uint32</valueType>
+    <platInit/>
+  </attribute>
+  <!-- ********************************************************************* -->
+  <attribute>
+    <id>ATTR_FREQ_CORE_MAX</id>
+    <targetType>TARGET_TYPE_SYSTEM</targetType>
+    <description>
+      Maximum frequency (binary in MHz) that any processor in the system will
+      run. Used to define the top end of the PState range in the frequency space.
+      From this, the ATTR_PROCPM_PSTATE0_FREQUENCY is computed using
+      ATTR_SYSTEM_REFCLK_FREQUENCY to determine the step size.
+
+      Consumers: proc_build_gpstate_table.C (among others)
+
+      TODO: Dean's proposal is that each platform will iterate over all chips,
+            reading the super-turbo frequency from MVPD #V and set this attribute
+            to the lowest value.
+    </description>
+    <valueType>uint32</valueType>
+    <platInit/>
+  </attribute>
+</attributes>
diff --git a/src/usr/hwpf/hwp/start_payload/start_payload.C b/src/usr/hwpf/hwp/start_payload/start_payload.C
index 80f58ede0..c1e9327e9 100644
--- a/src/usr/hwpf/hwp/start_payload/start_payload.C
+++ b/src/usr/hwpf/hwp/start_payload/start_payload.C
@@ -62,6 +62,7 @@
 #include    <fapiPlatHwpInvoker.H>
 
 #include    "start_payload.H"
+#include    <runtime/runtime.H>
 
 //  Uncomment these files as they become available:
 // #include    "host_start_payload/host_start_payload.H"
@@ -114,6 +115,21 @@ void    call_host_start_payload( void    *io_pArgs )
         // Need to wait here until Fsp tells us go
         INITSERVICE::waitForSyncPoint();
 
+        // Need to load up the runtime module if it isn't already loaded
+        if (  !VFS::module_is_loaded( "libruntime.so" ) )
+        {
+            l_errl = VFS::module_load( "libruntime.so" );
+            if ( l_errl )
+            {
+                //  load module returned with errl set
+                TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+                           "Could not load runtime module" );
+
+                //  break out of do block
+                break;
+            }
+        }
+
         // Host Start Payload procedure, per documentation from Patrick.
         //  - Verify target image
         //      - TODO - Done via call to Secure Boot ROM.
@@ -122,6 +138,14 @@ void    call_host_start_payload( void    *io_pArgs )
         //  - Update HDAT with updated SLW images
         //      - TODO - Once we know where they go in the HDAT
 
+        //@todo : Move this to new sub-step with RTC:49501
+        // Write the HostServices attributes into mainstore
+        l_errl = RUNTIME::populate_attributes();
+        if( l_errl )
+        {
+            break;
+        }
+
         //  - Run CXX testcases
         l_errl = INITSERVICE::executeUnitTests();
 
diff --git a/src/usr/hwpf/makefile b/src/usr/hwpf/makefile
index 0cab1a5a9..5a2671e0a 100644
--- a/src/usr/hwpf/makefile
+++ b/src/usr/hwpf/makefile
@@ -69,7 +69,9 @@ HWP_ATTR_XML_FILES = hwp/memory_attributes.xml \
                      hwp/dram_initialization/proc_setup_bars/proc_setup_bars_memory_attributes.xml \
                      hwp/dram_initialization/proc_setup_bars/proc_setup_bars_l3_attributes.xml \
                      hwp/dram_initialization/proc_setup_bars/proc_setup_bars_mmio_attributes.xml \
-                     hwp/activate_powerbus/proc_build_smp/proc_fab_smp_fabric_attributes.xml
+                     hwp/activate_powerbus/proc_build_smp/proc_fab_smp_fabric_attributes.xml \
+                     hwp/runtime_attributes/pm_plat_attributes.xml \
+                     hwp/runtime_attributes/pm_hwp_attributes.xml 
 
 #------------------------------------------------------------------------------
 # Initfiles
diff --git a/src/usr/hwpf/plat/fapiPlatAttributeService.C b/src/usr/hwpf/plat/fapiPlatAttributeService.C
index 2fc351d78..c0c9aa296 100644
--- a/src/usr/hwpf/plat/fapiPlatAttributeService.C
+++ b/src/usr/hwpf/plat/fapiPlatAttributeService.C
@@ -1,26 +1,25 @@
-/*  IBM_PROLOG_BEGIN_TAG
- *  This is an automatically generated prolog.
- *
- *  $Source: src/usr/hwpf/plat/fapiPlatAttributeService.C $
- *
- *  IBM CONFIDENTIAL
- *
- *  COPYRIGHT International Business Machines Corp. 2011-2012
- *
- *  p1
- *
- *  Object Code Only (OCO) source materials
- *  Licensed Internal Code Source Materials
- *  IBM HostBoot Licensed Internal Code
- *
- *  The source code for this program is not published or other-
- *  wise divested of its trade secrets, irrespective of what has
- *  been deposited with the U.S. Copyright Office.
- *
- *  Origin: 30
- *
- *  IBM_PROLOG_END_TAG
- */
+/* IBM_PROLOG_BEGIN_TAG                                                   */
+/* This is an automatically generated prolog.                             */
+/*                                                                        */
+/* $Source: src/usr/hwpf/plat/fapiPlatAttributeService.C $                */
+/*                                                                        */
+/* IBM CONFIDENTIAL                                                       */
+/*                                                                        */
+/* COPYRIGHT International Business Machines Corp. 2011,2012              */
+/*                                                                        */
+/* p1                                                                     */
+/*                                                                        */
+/* Object Code Only (OCO) source materials                                */
+/* Licensed Internal Code Source Materials                                */
+/* IBM HostBoot Licensed Internal Code                                    */
+/*                                                                        */
+/* The source code for this program is not published or otherwise         */
+/* divested of its trade secrets, irrespective of what has been           */
+/* deposited with the U.S. Copyright Office.                              */
+/*                                                                        */
+/* Origin: 30                                                             */
+/*                                                                        */
+/* IBM_PROLOG_END_TAG                                                     */
 /**
  *  @file fapiPlatAttributeService.C
  *
@@ -56,6 +55,22 @@ namespace fapi
 
 namespace platAttrSvc
 {
+//@fixme begin  RTC:42293
+fapi::ReturnCode return0_uint8( uint8_t &o_data ) {
+    fapi::ReturnCode l_rc;
+    o_data = 0;
+    return l_rc;
+}
+fapi::ReturnCode return0_uint32( uint32_t &o_data ) {
+    fapi::ReturnCode l_rc;
+    o_data = 0;
+    return l_rc;
+}
+fapi::ReturnCode set_ignore( void ) {
+    fapi::ReturnCode l_rc;
+    return l_rc;
+}
+//@fixme end
 
 //******************************************************************************
 // fapi::platAttrSvc::getHostbootTarget
diff --git a/src/usr/makefile b/src/usr/makefile
index e4ae0117d..191419605 100644
--- a/src/usr/makefile
+++ b/src/usr/makefile
@@ -29,6 +29,7 @@ OBJS = module_init.o
 SUBDIRS = example.d trace.d cxxtest.d testcore.d errl.d devicefw.d  \
           scom.d xscom.d targeting.d initservice.d hwpf.d \
           ecmddatabuffer.d pnor.d i2c.d vfs.d fsi.d hwas.d fsiscom.d \
-          intr.d spd.d pore.d util.d mbox.d diag.d mvpd.d scan.d
+          intr.d spd.d pore.d util.d mbox.d diag.d mvpd.d scan.d \
+          runtime.d
 
 include ${ROOTPATH}/config.mk
diff --git a/src/usr/runtime/common/hsvc_attribute_structs.H b/src/usr/runtime/common/hsvc_attribute_structs.H
new file mode 100644
index 000000000..19f12ddcd
--- /dev/null
+++ b/src/usr/runtime/common/hsvc_attribute_structs.H
@@ -0,0 +1,77 @@
+/* IBM_PROLOG_BEGIN_TAG                                                   */
+/* This is an automatically generated prolog.                             */
+/*                                                                        */
+/* $Source: src/usr/runtime/attribute_structs.H $                         */
+/*                                                                        */
+/* IBM CONFIDENTIAL                                                       */
+/*                                                                        */
+/* COPYRIGHT International Business Machines Corp. 2012                   */
+/*                                                                        */
+/* p1                                                                     */
+/*                                                                        */
+/* Object Code Only (OCO) source materials                                */
+/* Licensed Internal Code Source Materials                                */
+/* IBM HostBoot Licensed Internal Code                                    */
+/*                                                                        */
+/* The source code for this program is not published or otherwise         */
+/* divested of its trade secrets, irrespective of what has been           */
+/* deposited with the U.S. Copyright Office.                              */
+/*                                                                        */
+/* Origin: 30                                                             */
+/*                                                                        */
+/* IBM_PROLOG_END_TAG                                                     */
+/**
+ *  @file attribute_structs.H
+ *
+ *  @brief Shared structures with the HostServices code
+ */
+
+struct hsvc_proc_header_t {
+    uint64_t procid; //=NNNCCC
+    uint64_t offset; //offset to attribute header relative to start of node_data
+    uint64_t numAttr; //number of populated attributes
+    static const uint64_t NO_PROC = 0xFFFFFFFFFFFFFFFF;
+};
+
+struct hsvc_ex_header_t {
+    uint64_t parent_procid; //=NNNCCC
+    uint64_t chiplet; //physical ex number (0..15)
+    uint64_t offset; //offset to attribute header relative to start of node_data
+    uint64_t numAttr; //number of populated attributes
+    static const uint64_t NO_PROC = 0xFFFFFFFFFFFFFFFF;
+    static const uint64_t NO_CHIPLET = 0xFFFFFFFFFFFFFFFF;
+};
+
+struct hsvc_attr_header_t {
+    uint64_t id; // attribute id
+    uint64_t sizeBytes; // size of attribute data
+    uint64_t offset; // offset to attribute data relative to start of node_data/sys_data
+    static const uint64_t NO_ATTRIBUTE = 0x0;
+};
+
+// This is the data that will be in the 'System Attribute Data'
+//  section of HDAT
+struct hsvc_system_data_t
+{
+    uint64_t nodePresent; //bitstring of populated nodes, bit0=node0, etc
+    uint64_t numAttr; //number of populated attributes
+    uint64_t offset; //offset to attribute headers relative to start of system_data
+    //blob of data...
+};
+
+// This is the data that will be in the 'Node Attribute Data'
+//  section of HDAT, there will be 1 of these per physical
+//  drawer/book/octant/blade
+struct hsvc_node_data_t
+{
+    uint64_t procOffset; //offset to proc headers relative to start of node_data
+    uint64_t exOffset; //offset to ex headers relative to start of node_data
+    uint64_t numTargets; //number of proc+ex targets present in this node
+    //blob of data...
+};
+
+// Custom Attribute IDs
+//  Note: Standard fapi::AttributeId are only 32-bits so we can use the top
+//        32-bits of the 64-bit value for our own numbers
+static const uint64_t HSVC_HUID      = 0xFF000001FFFFFFFF;
+static const uint64_t HSVC_PHYS_PATH = 0xFF000002FFFFFFFF;
diff --git a/src/usr/runtime/common/hsvc_exdata.C b/src/usr/runtime/common/hsvc_exdata.C
new file mode 100644
index 000000000..ce9b042c1
--- /dev/null
+++ b/src/usr/runtime/common/hsvc_exdata.C
@@ -0,0 +1,27 @@
+/* IBM_PROLOG_BEGIN_TAG                                                   */
+/* This is an automatically generated prolog.                             */
+/*                                                                        */
+/* $Source: src/usr/runtime/hsvc_exdata.C $                               */
+/*                                                                        */
+/* IBM CONFIDENTIAL                                                       */
+/*                                                                        */
+/* COPYRIGHT International Business Machines Corp. 2012                   */
+/*                                                                        */
+/* p1                                                                     */
+/*                                                                        */
+/* Object Code Only (OCO) source materials                                */
+/* Licensed Internal Code Source Materials                                */
+/* IBM HostBoot Licensed Internal Code                                    */
+/*                                                                        */
+/* The source code for this program is not published or otherwise         */
+/* divested of its trade secrets, irrespective of what has been           */
+/* deposited with the U.S. Copyright Office.                              */
+/*                                                                        */
+/* Origin: 30                                                             */
+/*                                                                        */
+/* IBM_PROLOG_END_TAG                                                     */
+//@todo - This file will be autogenerated by the HostServices build RTC:48350
+// This file was generated on MM/DD/YYYY by username from build xxxxx
+
+HSVC_LOAD_ATTR( ATTR_CHIP_UNIT_POS ); 
+HSVC_LOAD_ATTR( ATTR_FUNCTIONAL );
diff --git a/src/usr/runtime/common/hsvc_procdata.C b/src/usr/runtime/common/hsvc_procdata.C
new file mode 100644
index 000000000..21f24af68
--- /dev/null
+++ b/src/usr/runtime/common/hsvc_procdata.C
@@ -0,0 +1,98 @@
+/* IBM_PROLOG_BEGIN_TAG                                                   */
+/* This is an automatically generated prolog.                             */
+/*                                                                        */
+/* $Source: src/usr/runtime/hsvc_procdata.C $                             */
+/*                                                                        */
+/* IBM CONFIDENTIAL                                                       */
+/*                                                                        */
+/* COPYRIGHT International Business Machines Corp. 2012                   */
+/*                                                                        */
+/* p1                                                                     */
+/*                                                                        */
+/* Object Code Only (OCO) source materials                                */
+/* Licensed Internal Code Source Materials                                */
+/* IBM HostBoot Licensed Internal Code                                    */
+/*                                                                        */
+/* The source code for this program is not published or otherwise         */
+/* divested of its trade secrets, irrespective of what has been           */
+/* deposited with the U.S. Copyright Office.                              */
+/*                                                                        */
+/* Origin: 30                                                             */
+/*                                                                        */
+/* IBM_PROLOG_END_TAG                                                     */
+//@todo - This file will be autogenerated by the HostServices build RTC:48350
+// This file was generated on MM/DD/YYYY by username from build xxxxx
+
+HSVC_LOAD_ATTR( ATTR_CHIP_ID ); 
+HSVC_LOAD_ATTR( ATTR_FUNCTIONAL ); 
+HSVC_LOAD_ATTR_P( ATTR_EC ); 
+HSVC_LOAD_ATTR( ATTR_PM_AISS_TIMEOUT ); 
+HSVC_LOAD_ATTR( ATTR_PM_APSS_CHIP_SELECT ); 
+HSVC_LOAD_ATTR( ATTR_PM_EXTERNAL_VRM_STEPDELAY_RANGE ); 
+HSVC_LOAD_ATTR( ATTR_PM_EXTERNAL_VRM_STEPDELAY_VALUE ); 
+HSVC_LOAD_ATTR( ATTR_PM_IVRMS_ENABLED ); 
+HSVC_LOAD_ATTR( ATTR_PM_OCC_HEARTBEAT_TIME ); 
+HSVC_LOAD_ATTR( ATTR_PM_PFET_POWERDOWN_CORE_DELAY0 ); 
+HSVC_LOAD_ATTR( ATTR_PM_PFET_POWERDOWN_CORE_DELAY0_VALUE ); 
+HSVC_LOAD_ATTR( ATTR_PM_PFET_POWERDOWN_CORE_DELAY1 ); 
+HSVC_LOAD_ATTR( ATTR_PM_PFET_POWERDOWN_CORE_DELAY1_VALUE ); 
+HSVC_LOAD_ATTR( ATTR_PM_PFET_POWERDOWN_CORE_SEQUENCE_DELAY_SELECT ); 
+HSVC_LOAD_ATTR( ATTR_PM_PFET_POWERDOWN_ECO_DELAY0 ); 
+HSVC_LOAD_ATTR( ATTR_PM_PFET_POWERDOWN_ECO_DELAY0_VALUE ); 
+HSVC_LOAD_ATTR( ATTR_PM_PFET_POWERDOWN_ECO_DELAY1 ); 
+HSVC_LOAD_ATTR( ATTR_PM_PFET_POWERDOWN_ECO_DELAY1_VALUE ); 
+HSVC_LOAD_ATTR( ATTR_PM_PFET_POWERDOWN_ECO_SEQUENCE_DELAY_SELECT ); 
+HSVC_LOAD_ATTR( ATTR_PM_PFET_POWERUP_CORE_DELAY0 ); 
+HSVC_LOAD_ATTR( ATTR_PM_PFET_POWERUP_CORE_DELAY0_VALUE ); 
+HSVC_LOAD_ATTR( ATTR_PM_PFET_POWERUP_CORE_DELAY1 ); 
+HSVC_LOAD_ATTR( ATTR_PM_PFET_POWERUP_CORE_DELAY1_VALUE ); 
+HSVC_LOAD_ATTR( ATTR_PM_PFET_POWERUP_CORE_SEQUENCE_DELAY_SELECT ); 
+HSVC_LOAD_ATTR( ATTR_PM_PFET_POWERUP_ECO_DELAY0 ); 
+HSVC_LOAD_ATTR( ATTR_PM_PFET_POWERUP_ECO_DELAY0_VALUE ); 
+HSVC_LOAD_ATTR( ATTR_PM_PFET_POWERUP_ECO_DELAY1 ); 
+HSVC_LOAD_ATTR( ATTR_PM_PFET_POWERUP_ECO_DELAY1_VALUE ); 
+HSVC_LOAD_ATTR( ATTR_PM_PFET_POWERUP_ECO_SEQUENCE_DELAY_SELECT ); 
+HSVC_LOAD_ATTR( ATTR_PM_PMC_HANGPULSE_DIVIDER ); 
+HSVC_LOAD_ATTR( ATTR_PM_POWER_PROXY_TRACE_TIMER );
+HSVC_LOAD_ATTR( ATTR_PM_PPT_TIMER_MATCH_VALUE ); 
+HSVC_LOAD_ATTR( ATTR_PM_PPT_TIMER_TICK );
+HSVC_LOAD_ATTR( ATTR_PM_PSTATE_STEPSIZE ); 
+HSVC_LOAD_ATTR( ATTR_PM_PSTATE_UNDERVOLTING_MAXIMUM ); 
+HSVC_LOAD_ATTR( ATTR_PM_PSTATE_UNDERVOLTING_MINIMUM ); 
+HSVC_LOAD_ATTR( ATTR_PM_PVSAFE_PSTATE ); 
+HSVC_LOAD_ATTR( ATTR_PM_SAFE_PSTATE ); 
+HSVC_LOAD_ATTR( ATTR_PM_SLEEP_ENTRY ); 
+HSVC_LOAD_ATTR( ATTR_PM_SLEEP_EXIT ); 
+HSVC_LOAD_ATTR( ATTR_PM_SLEEP_TYPE ); 
+HSVC_LOAD_ATTR( ATTR_PM_SPIPSS_CLOCK_DIVIDER ); 
+HSVC_LOAD_ATTR( ATTR_PM_SPIPSS_CLOCK_PHASE ); 
+HSVC_LOAD_ATTR( ATTR_PM_SPIPSS_CLOCK_POLARITY ); 
+HSVC_LOAD_ATTR( ATTR_PM_SPIPSS_FRAME_SIZE ); 
+HSVC_LOAD_ATTR( ATTR_PM_SPIPSS_FREQUENCY ); 
+HSVC_LOAD_ATTR( ATTR_PM_SPIPSS_IN_COUNT ); 
+HSVC_LOAD_ATTR( ATTR_PM_SPIPSS_IN_DELAY ); 
+HSVC_LOAD_ATTR( ATTR_PM_SPIPSS_INTER_FRAME_DELAY ); 
+//HSVC_LOAD_ATTR( ATTR_PM_SPIPSS_INTER_FRAME_DELAY_WRITE_SETTNG ); 
+//HSVC_LOAD_ATTR( ATTR_PM_SPIPSS_INTERFRAME_DELAY_WRITE_STATUS_VALUE ); 
+HSVC_LOAD_ATTR( ATTR_PM_SPIPSS_OUT_COUNT ); 
+HSVC_LOAD_ATTR( ATTR_PM_SPIVID_CLOCK_DIVIDER ); 
+HSVC_LOAD_ATTR( ATTR_PM_SPIVID_CLOCK_PHASE ); 
+HSVC_LOAD_ATTR( ATTR_PM_SPIVID_CLOCK_POLARITY ); 
+HSVC_LOAD_ATTR( ATTR_PM_SPIVID_CRC_CHECK_ENABLE ); 
+HSVC_LOAD_ATTR( ATTR_PM_SPIVID_CRC_GEN_ENABLE ); 
+HSVC_LOAD_ATTR( ATTR_PM_SPIVID_CRC_POLYNOMIAL_ENABLES ); 
+HSVC_LOAD_ATTR( ATTR_PM_SPIVID_FRAME_SIZE ); 
+HSVC_LOAD_ATTR( ATTR_PM_SPIVID_IN_DELAY_FRAME1 ); 
+HSVC_LOAD_ATTR( ATTR_PM_SPIVID_IN_DELAY_FRAME2 ); 
+//HSVC_LOAD_ATTR( ATTR_PM_SPIVID_INTER_FRAME_DELAY ); 
+//HSVC_LOAD_ATTR( ATTR_PM_SPIVID_INTER_FRAME_DELAY_WRITE_STATUS ); 
+HSVC_LOAD_ATTR( ATTR_PM_SPIVID_INTERFRAME_DELAY_WRITE_STATUS ); 
+HSVC_LOAD_ATTR( ATTR_PM_SPIVID_INTERFRAME_DELAY_WRITE_STATUS_VALUE ); 
+HSVC_LOAD_ATTR( ATTR_PM_SPIVID_INTER_RETRY_DELAY ); 
+HSVC_LOAD_ATTR( ATTR_PM_SPIVID_INTER_RETRY_DELAY_VALUE ); 
+HSVC_LOAD_ATTR( ATTR_PM_SPIVID_MAJORITY_VOTE_ENABLE ); 
+HSVC_LOAD_ATTR( ATTR_PM_SPIVID_MAX_RETRIES ); 
+HSVC_LOAD_ATTR( ATTR_PM_SPIVID_PORT_ENABLE ); 
+//"HSVC_LOAD_ATTR( ATTR_PM_WINKLE_ENTRY" ); 
+//"HSVC_LOAD_ATTR( ATTR_PM_WINKLE_EXIT" ); 
+HSVC_LOAD_ATTR( ATTR_PM_WINKLE_TYPE );      
diff --git a/src/usr/runtime/common/hsvc_sysdata.C b/src/usr/runtime/common/hsvc_sysdata.C
new file mode 100644
index 000000000..590c5fb3c
--- /dev/null
+++ b/src/usr/runtime/common/hsvc_sysdata.C
@@ -0,0 +1,38 @@
+/* IBM_PROLOG_BEGIN_TAG                                                   */
+/* This is an automatically generated prolog.                             */
+/*                                                                        */
+/* $Source: src/usr/runtime/hsvc_sysdata.C $                              */
+/*                                                                        */
+/* IBM CONFIDENTIAL                                                       */
+/*                                                                        */
+/* COPYRIGHT International Business Machines Corp. 2012                   */
+/*                                                                        */
+/* p1                                                                     */
+/*                                                                        */
+/* Object Code Only (OCO) source materials                                */
+/* Licensed Internal Code Source Materials                                */
+/* IBM HostBoot Licensed Internal Code                                    */
+/*                                                                        */
+/* The source code for this program is not published or otherwise         */
+/* divested of its trade secrets, irrespective of what has been           */
+/* deposited with the U.S. Copyright Office.                              */
+/*                                                                        */
+/* Origin: 30                                                             */
+/*                                                                        */
+/* IBM_PROLOG_END_TAG                                                     */
+//@todo - This file will be autogenerated by the HostServices build RTC:48350
+// This file was generated on MM/DD/YYYY by username from build xxxxx
+
+HSVC_LOAD_ATTR( ATTR_FREQ_PB );
+HSVC_LOAD_ATTR( ATTR_PM_SPIVID_FREQUENCY ); 
+HSVC_LOAD_ATTR( ATTR_PM_SPIVID_CLOCK_POLARITY ); 
+HSVC_LOAD_ATTR( ATTR_PM_SPIVID_CLOCK_PHASE ); 
+HSVC_LOAD_ATTR( ATTR_PM_SPIVID_PORT_ENABLE ); 
+//HSVC_LOAD_ATTR( ATTR_PM_SPIVID_INTER_FRAME_DELAY_WRITE_STATUS );
+HSVC_LOAD_ATTR( ATTR_PM_SPIVID_INTER_RETRY_DELAY );
+HSVC_LOAD_ATTR( ATTR_PM_SPIVID_CRC_GEN_ENABLE ); 
+HSVC_LOAD_ATTR( ATTR_PM_SPIVID_CRC_CHECK_ENABLE ); 
+HSVC_LOAD_ATTR( ATTR_PM_SPIVID_MAX_RETRIES );
+HSVC_LOAD_ATTR( ATTR_PM_SPIVID_CRC_POLYNOMIAL_ENABLES );
+HSVC_LOAD_ATTR( ATTR_PM_SPIVID_IN_DELAY_FRAME1 );
+HSVC_LOAD_ATTR( ATTR_PM_SPIVID_IN_DELAY_FRAME2 );
diff --git a/src/usr/runtime/makefile b/src/usr/runtime/makefile
new file mode 100644
index 000000000..54342e751
--- /dev/null
+++ b/src/usr/runtime/makefile
@@ -0,0 +1,43 @@
+# IBM_PROLOG_BEGIN_TAG 
+# This is an automatically generated prolog. 
+#  
+# $Source: src/usr/runtime/makefile $ 
+#  
+# IBM CONFIDENTIAL 
+#  
+# COPYRIGHT International Business Machines Corp. 2012 
+#  
+# p1 
+#  
+# Object Code Only (OCO) source materials 
+# Licensed Internal Code Source Materials 
+# IBM HostBoot Licensed Internal Code 
+#  
+# The source code for this program is not published or otherwise 
+# divested of its trade secrets, irrespective of what has been 
+# deposited with the U.S. Copyright Office. 
+#  
+# Origin: 30 
+#  
+# IBM_PROLOG_END_TAG 
+
+#
+# The runtime module provides code to handle manipulating data
+#  for the host.  For example, verifying HDAT fields and writing
+#  attribute data for HostServices.
+#
+
+ROOTPATH = ../../..
+MODULE = runtime
+
+OBJS = populate_attributes.o 
+
+SUBDIRS = test.d
+
+##      support for fapi
+EXTRAINCDIR += ${ROOTPATH}/src/include/usr/ecmddatabuffer
+EXTRAINCDIR += ${ROOTPATH}/src/include/usr/hwpf/fapi
+EXTRAINCDIR += ${ROOTPATH}/src/include/usr/hwpf/plat
+EXTRAINCDIR += ${ROOTPATH}/src/include/usr/hwpf/hwp
+
+include ${ROOTPATH}/config.mk
diff --git a/src/usr/runtime/populate_attributes.C b/src/usr/runtime/populate_attributes.C
new file mode 100644
index 000000000..ed100dd9b
--- /dev/null
+++ b/src/usr/runtime/populate_attributes.C
@@ -0,0 +1,456 @@
+/*  IBM_PROLOG_BEGIN_TAG
+ *  This is an automatically generated prolog.
+ *
+ *  $Source: src/usr/runtime/populate_attributes.C $
+ *
+ *  IBM CONFIDENTIAL
+ *
+ *  COPYRIGHT International Business Machines Corp. 2012
+ *
+ *  p1
+ *
+ *  Object Code Only (OCO) source materials
+ *  Licensed Internal Code Source Materials
+ *  IBM HostBoot Licensed Internal Code
+ *
+ *  The source code for this program is not published or other-
+ *  wise divested of its trade secrets, irrespective of what has
+ *  been deposited with the U.S. Copyright Office.
+ *
+ *  Origin: 30
+ *
+ *  IBM_PROLOG_END_TAG
+ */
+
+/**
+ *  @file populate_attributes.C
+ *
+ *  @brief Populate attributes for runtime HostServices code
+ */
+
+#include <trace/interface.H>
+#include <errl/errlentry.H>
+#include <fapi.H>
+#include <fapiAttributeIds.H>
+#include <targeting/common/target.H>
+#include <targeting/common/targetservice.H>
+#include <targeting/common/utilFilter.H>
+#include <runtime/runtime_reasoncodes.H>
+#include "common/hsvc_attribute_structs.H"
+//#include <arch/ppc.H> //for MAGIC_INSTRUCTION
+
+trace_desc_t *g_trac_runtime = NULL;
+TRAC_INIT(&g_trac_runtime, "RUNTIME", 4096);
+
+/**
+ * @brief Read a FAPI attribute and stick it into mainstore
+ */
+#define HSVC_LOAD_ATTR(__fid) \
+    fapi::__fid##_Type result_##__fid; \
+    _rc = FAPI_ATTR_GET( __fid, _target, result_##__fid ); \
+    if( _rc ) { \
+        TRACFCOMP( g_trac_runtime, "Error reading %d, rc=0x%X", fapi::__fid, _rc ); \
+        _failed_attribute = fapi::__fid; \
+        break; \
+    } \
+    TRACFCOMP( g_trac_runtime, "> %d: 0x%x=%X @ %p", *_num_attr, fapi::__fid, result_##__fid, _output_ptr ); \
+    _cur_header = &(_all_headers[(*_num_attr)]); \
+    _cur_header->id = fapi::__fid; \
+    _cur_header->sizeBytes = sizeof(fapi::__fid##_Type); \
+    _cur_header->offset = (_output_ptr - _beginning); \
+    memcpy( _output_ptr, &result_##__fid, sizeof(fapi::__fid##_Type) ); \
+    _output_ptr += sizeof(fapi::__fid##_Type); \
+    (*_num_attr)++; 
+
+/**
+ * @brief Read a Privileged FAPI attribute and stick it into mainstore
+ */
+#define HSVC_LOAD_ATTR_P(__fid) \
+    fapi::__fid##_Type result_##__fid; \
+    _rc = FAPI_ATTR_GET_PRIVILEGED( __fid, _target, result_##__fid ); \
+    if( _rc ) { \
+        TRACFCOMP( g_trac_runtime, "Error reading %d, rc=0x%X", fapi::__fid, _rc ); \
+        _failed_attribute = fapi::__fid; \
+        break; \
+    } \
+    TRACFCOMP( g_trac_runtime, "> %d: 0x%x=%X @ %p", *_num_attr, fapi::__fid, result_##__fid, _output_ptr ); \
+    _cur_header = &(_all_headers[(*_num_attr)]); \
+    _cur_header->id = fapi::__fid; \
+    _cur_header->sizeBytes = sizeof(fapi::__fid##_Type); \
+    _cur_header->offset = (_output_ptr - _beginning); \
+    memcpy( _output_ptr, &result_##__fid, sizeof(fapi::__fid##_Type) ); \
+    _output_ptr += sizeof(fapi::__fid##_Type); \
+    (*_num_attr)++; 
+
+/**
+ * @brief Read the HUID attribute from targeting and stick it into mainstore
+ */
+#define ADD_HUID(__targ) \
+    _huid_temp = TARGETING::get_huid(__targ); \
+    TRACFCOMP( g_trac_runtime, "> HUID=%.8X @ %p", _huid_temp, _output_ptr ); \
+    _cur_header = &(_all_headers[(*_num_attr)]); \
+    _cur_header->id = HSVC_HUID; \
+    _cur_header->sizeBytes = sizeof(uint32_t); \
+    _cur_header->offset = (_output_ptr - _beginning); \
+    memcpy( _output_ptr, &_huid_temp, sizeof(uint32_t) ); \
+    _output_ptr += sizeof(uint32_t); \
+    (*_num_attr)++; 
+
+/**
+ * @brief Read the PHYS_PATH attribute from targeting and stick it into mainstore
+ */
+#define ADD_PHYS_PATH(__targ) \
+   { TARGETING::AttributeTraits<TARGETING::ATTR_PHYS_PATH>::Type pathPhys; \
+    _rc = !(__targ->tryGetAttr<TARGETING::ATTR_PHYS_PATH>(pathPhys)); \
+    _cur_header = &(_all_headers[(*_num_attr)]); \
+    _cur_header->id = HSVC_PHYS_PATH; \
+    _cur_header->sizeBytes = sizeof(uint8_t) + (sizeof(pathPhys[0]) * pathPhys.size()); \
+    _cur_header->offset = (_output_ptr - _beginning); \
+    memcpy( _output_ptr, &pathPhys,  _cur_header->sizeBytes ); \
+    _output_ptr +=  _cur_header->sizeBytes; \
+    (*_num_attr)++; }
+
+/**
+ * @brief Insert a terminator into the attribute list
+ */
+#define EMPTY_ATTRIBUTE \
+    _cur_header = &(_all_headers[(*_num_attr)]); \
+    _cur_header->id = hsvc_attr_header_t::NO_ATTRIBUTE; \
+    _cur_header->sizeBytes = 0; \
+    _cur_header->offset = 0; 
+
+
+namespace RUNTIME
+{
+
+// This is the data that will be in the 'System Attribute Data'
+//  section of HDAT
+struct system_data_t
+{
+    enum {
+        MAX_ATTRIBUTES = 20
+    };
+
+    // header data that HostServices uses
+    hsvc_system_data_t hsvc;
+
+    // actual data content 
+    hsvc_attr_header_t attrHeaders[MAX_ATTRIBUTES];
+    char attributes[MAX_ATTRIBUTES*sizeof(uint32_t)];
+};
+
+// This is the data that will be in the 'Node Attribute Data'
+//  section of HDAT, there will be 1 of these per physical
+//  drawer/book/octant/blade
+struct node_data_t
+{
+    enum {
+        MAX_PROCS = 8,
+        MAX_PROCS_RSV = 16, //leave space for double
+        MAX_EX_PER_PROC = 16,
+        MAX_EX_RSV = MAX_PROCS_RSV*MAX_EX_PER_PROC,
+        NUM_PROC_ATTRIBUTES = 100,
+        NUM_EX_ATTRIBUTES = 10,
+        MAX_ATTRIBUTES = MAX_PROCS_RSV*NUM_PROC_ATTRIBUTES +
+                         MAX_PROCS_RSV*MAX_EX_PER_PROC*NUM_EX_ATTRIBUTES
+    };
+
+    // header data that HostServices uses
+    hsvc_node_data_t hsvc;
+
+    // actual data content 
+    hsvc_proc_header_t procs[MAX_PROCS_RSV];
+    hsvc_ex_header_t ex[MAX_PROCS_RSV*MAX_EX_PER_PROC];    
+    hsvc_attr_header_t procAttrHeaders[MAX_PROCS_RSV][NUM_PROC_ATTRIBUTES];
+    hsvc_attr_header_t exAttrHeaders[MAX_PROCS_RSV*MAX_EX_PER_PROC][NUM_EX_ATTRIBUTES];
+    char attributes[MAX_ATTRIBUTES*sizeof(uint32_t)];
+};
+
+
+//@fixme  RTC:49509
+// Steal the unused fake pnor space until we have mainstore
+#define SYSTEM_DATA_POINTER (5*MEGABYTE)
+#define NODE_DATA_POINTER (5*MEGABYTE+512*KILOBYTE)
+
+
+/**
+ * @brief Populate system attributes for HostServices
+ */
+errlHndl_t populate_system_attributes( void )
+{
+    errlHndl_t errhdl = NULL;
+
+    // These variables are used by the HSVC_LOAD_ATTR macros directly
+    uint64_t _failed_attribute = 0; //attribute we failed on
+    int _rc = 0; //result from FAPI_ATTR_GET
+
+    do {
+        TRACFCOMP( g_trac_runtime, "-SYSTEM-" );
+
+        // allocate memory and fill it with some junk data
+        system_data_t* sys_data = reinterpret_cast<system_data_t*>(SYSTEM_DATA_POINTER);
+        memset( sys_data, 'A', sizeof(system_data_t) );
+
+        // These variables are used by the HSVC_LOAD_ATTR macros directly
+        uint64_t* _num_attr = NULL; //pointer to numAttr in struct
+        char* _output_ptr = NULL; //next memory location to copy attr data into
+        char* _beginning = NULL; //position zero for offset calculation
+        hsvc_attr_header_t* _all_headers = NULL; //array of attribute headers
+        fapi::Target* _target = NULL; //target for FAPI_ATTR_GET
+        hsvc_attr_header_t* _cur_header = NULL; //temp variable
+        uint32_t _huid_temp = 0; //temp variable
+
+        // Prepare the vars for the HSVC_LOAD_ATTR macros
+        _beginning = reinterpret_cast<char*>(sys_data);
+        _output_ptr = sys_data->attributes;
+        _all_headers = sys_data->attrHeaders;
+        _num_attr = &(sys_data->hsvc.numAttr);
+        _target = NULL; //system queries use NULL target
+
+        // Grab a system object to work with
+        TARGETING::Target* sys = NULL;
+        TARGETING::targetService().getTopLevelTarget(sys);
+
+        // Fill in the metadata
+        sys_data->hsvc.offset = reinterpret_cast<uint64_t>(sys_data->attrHeaders)
+          - reinterpret_cast<uint64_t>(sys_data);
+        sys_data->hsvc.nodePresent = 0x8000000000000000;
+        sys_data->hsvc.numAttr = 0;
+
+        // Fill up the attributes
+        ADD_HUID( sys ); // for debug
+        ADD_PHYS_PATH( sys );
+        // Use a generated file for the list of attributes to load
+        #include "common/hsvc_sysdata.C"
+
+        // Add an empty attribute header to signal the end
+        EMPTY_ATTRIBUTE;
+
+        TRACFCOMP( g_trac_runtime, "Run: system_cmp0.memory_ln4->image.save attributes.sys.bin 0x%X %d", sys_data,  sizeof(system_data_t) );
+
+        //@todo - Walk through attribute headers to look for duplicates?
+    } while(0);
+
+    // Handle any errors from FAPI_ATTR_GET
+    if( _rc )
+    {
+        /*@
+         * @errortype
+         * @reasoncode       RUNTIME::RC_ATTR_GET_FAIL
+         * @moduleid         RUNTIME::MOD_RUNTIME_POP_SYS_ATTR
+         * @userdata1        Return code from FAPI_ATTR_GET
+         * @userdata2        FAPI Attribute Id that failed
+         * @devdesc          Error retrieving FAPI attribute
+         */
+        errhdl = new ERRORLOG::ErrlEntry( ERRORLOG::ERRL_SEV_UNRECOVERABLE,
+                                          RUNTIME::MOD_RUNTIME_POP_SYS_ATTR,
+                                          RUNTIME::RC_ATTR_GET_FAIL,
+                                          _rc,
+                                          _failed_attribute );
+
+    }
+
+    return errhdl;
+}
+
+/**
+ * @brief Populate node attributes for HostServices
+ */
+errlHndl_t populate_node_attributes( uint64_t i_nodeNum )
+{
+    errlHndl_t errhdl = NULL;
+
+    // These variables are used by the HSVC_LOAD_ATTR macros directly
+    uint64_t _failed_attribute = 0; //attribute we failed on
+    int _rc = 0; //result from FAPI_ATTR_GET
+
+    do {
+        TRACFCOMP( g_trac_runtime, "-NODE-" );
+
+        // allocate memory and fill it with some junk data
+        node_data_t* node_data = reinterpret_cast<node_data_t*>(NODE_DATA_POINTER);
+        memset( node_data, 'A', sizeof(node_data) );
+
+        // These variables are used by the HSVC_LOAD_ATTR macros directly
+        uint64_t* _num_attr = NULL; //pointer to numAttr in struct
+        char* _output_ptr = NULL; //next memory location to copy attr data into
+        char* _beginning = NULL; //position zero for offset calculation
+        hsvc_attr_header_t* _all_headers = NULL; //array of attribute headers
+        fapi::Target* _target = NULL; //target for FAPI_ATTR_GET
+        hsvc_attr_header_t* _cur_header = NULL; //temp variable
+        uint32_t _huid_temp = 0; //temp variable
+
+        // Prepare the vars for the HSVC_LOAD_ATTR macros
+        _beginning = reinterpret_cast<char*>(node_data);
+        _output_ptr = node_data->attributes;
+
+        // indices for ex_header and proc_header
+        size_t next_proc = 0;
+        size_t next_ex = 0;
+
+        // Fill in the metadat
+        node_data->hsvc.numTargets = 0;
+        node_data->hsvc.procOffset = reinterpret_cast<uint64_t>(node_data->procs) - reinterpret_cast<uint64_t>(node_data);
+
+        // Get the list of processors
+        TARGETING::TargetHandleList all_procs;
+        TARGETING::getAllChips( all_procs, TARGETING::TYPE_PROC, false );
+
+        // Loop around all of the proc chips
+        for( size_t p = 0; p < all_procs.size(); p++ )
+        {
+            // Cast to a FAPI type of target.
+            fapi::Target fapi_proc( fapi::TARGET_TYPE_PROC_CHIP,
+                         reinterpret_cast<void *>
+                         (const_cast<TARGETING::Target*>(all_procs[p])) );
+
+            // Compute the processor id to match what HDAT uses
+            uint64_t node_id = 
+              all_procs[p]->getAttr<TARGETING::ATTR_FABRIC_NODE_ID>();
+            uint64_t chip_id =
+              all_procs[p]->getAttr<TARGETING::ATTR_FABRIC_CHIP_ID>();
+            uint32_t procid = (node_id << 3) | (chip_id); //NNNCCC
+            TRACFCOMP( g_trac_runtime, "PROC:%d (%.8X)", procid, TARGETING::get_huid(all_procs[p]) );
+
+            // Fill in the metadata
+            node_data->procs[p].procid = procid;
+            node_data->procs[p].offset = reinterpret_cast<uint64_t>(&(node_data->procAttrHeaders[p][0])) - reinterpret_cast<uint64_t>(node_data);
+            node_data->procs[p].numAttr = 0;
+            (node_data->hsvc.numTargets)++;
+
+            // Prepare the variables for the HSVC_LOAD_ATTR calls
+            _all_headers = &(node_data->procAttrHeaders[p][0]);
+            _num_attr = &(node_data->procs[p].numAttr);
+            _target = &fapi_proc; 
+
+            // Fill up the attributes
+            ADD_HUID( (all_procs[p]) ); // for debug
+            ADD_PHYS_PATH( (all_procs[p]) );
+            // Use a generated file for the list of attributes to load
+            #include "common/hsvc_procdata.C"
+
+            // Add an empty attribute header to signal the end
+            EMPTY_ATTRIBUTE;
+
+            
+            // Loop around all of the EX chiplets for this proc
+            TARGETING::TargetHandleList all_ex;
+            TARGETING::getChildChiplets( all_ex, all_procs[p],
+                                         TARGETING::TYPE_EX, false );
+            for( size_t e = 0; e < all_ex.size(); e++ )
+            {
+                uint32_t chiplet = all_ex[e]->getAttr<TARGETING::ATTR_CHIP_UNIT>();
+                TRACFCOMP( g_trac_runtime, "EX:p%d c%d(%.8X)", procid, chiplet, get_huid(all_ex[e]) );
+
+                // Fill in the metadata
+                (node_data->hsvc.numTargets)++;
+                node_data->ex[next_ex].parent_procid = procid;
+                node_data->ex[next_ex].chiplet = chiplet;
+                node_data->ex[next_ex].offset = reinterpret_cast<uint64_t>(&(node_data->exAttrHeaders[next_ex][0])) - reinterpret_cast<uint64_t>(node_data);
+                node_data->hsvc.exOffset = reinterpret_cast<uint64_t>(node_data->ex) - reinterpret_cast<uint64_t>(node_data);
+                node_data->ex[next_ex].numAttr = 0;
+
+                // Cast to a FAPI type of target.
+                fapi::Target fapi_ex( fapi::TARGET_TYPE_EX_CHIPLET,
+                                      reinterpret_cast<void *>
+                                      (const_cast<TARGETING::Target*>(all_ex[e])) );
+
+                // Prepare the variables for the HSVC_LOAD_ATTR calls
+                _all_headers = &(node_data->exAttrHeaders[next_ex][0]);
+                _num_attr = &(node_data->ex[next_ex].numAttr);
+                _target = &fapi_ex; 
+
+                // Fill up the attributes
+                ADD_HUID( (all_ex[e]) ); // for debug
+                ADD_PHYS_PATH( (all_ex[e]) );
+                // Use a generated file for the list of attributes to load
+                #include "common/hsvc_exdata.C"
+
+                // Add an empty attribute header to signal the end
+                EMPTY_ATTRIBUTE;
+
+                next_ex++;
+            }
+
+            next_proc++;
+        }
+
+        // Add an empty Proc marker at the end
+        node_data->procs[next_proc].procid = hsvc_proc_header_t::NO_PROC;
+        node_data->procs[next_proc].offset = 0;
+        node_data->procs[next_proc].numAttr = 0;
+        (node_data->hsvc.numTargets)++;
+
+        // Add an empty EX marker at the end
+        node_data->ex[next_ex].parent_procid = hsvc_ex_header_t::NO_PROC;
+        node_data->ex[next_ex].chiplet = hsvc_ex_header_t::NO_CHIPLET;
+        node_data->ex[next_ex].numAttr = 0;
+
+        TRACFCOMP( g_trac_runtime, "Run: system_cmp0.memory_ln4->image.save attributes.node.bin 0x%X %d", node_data,  sizeof(node_data_t) );
+    } while(0);
+
+    // Handle any errors from FAPI_ATTR_GET
+    if( _rc )
+    {
+        /*@
+         * @errortype
+         * @reasoncode       RUNTIME::RC_ATTR_GET_FAIL
+         * @moduleid         RUNTIME::MOD_RUNTIME_POP_NODE_ATTR
+         * @userdata1        Return code from FAPI_ATTR_GET
+         * @userdata2        FAPI Attribute Id that failed
+         * @devdesc          Error retrieving FAPI attribute
+         */
+        errhdl = new ERRORLOG::ErrlEntry( ERRORLOG::ERRL_SEV_UNRECOVERABLE,
+                                          RUNTIME::MOD_RUNTIME_POP_NODE_ATTR,
+                                          RUNTIME::RC_ATTR_GET_FAIL,
+                                          _rc,
+                                          _failed_attribute );
+
+    }
+
+    return errhdl;
+}
+
+/**
+ * @brief Populate attributes for HostServices
+ */
+errlHndl_t populate_attributes( void )
+{
+    errlHndl_t errhdl = NULL;
+
+    do {
+        //@todo : Remove this before RTC:49137 is merged, fix with RTC:49509
+        // Skip this in VPO  
+        if( TARGETING::is_vpo() )
+        {
+            TRACFCOMP( g_trac_runtime, "Skipping RUNTIME::populate_attributes in VPO mode" );
+            break;
+        }
+
+        errhdl = populate_system_attributes();
+        if( errhdl )
+        {
+            break;
+        }
+
+        // Loop through all nodes
+        for( TARGETING::TargetService::iterator it = TARGETING::targetService().begin();
+             it != TARGETING::targetService().end(); ++it )
+        {
+            if( (*it)->getAttr<TARGETING::ATTR_TYPE>() == TARGETING::TYPE_NODE )
+            {
+                //@todo: RTC:50866 : Need an attribute for node position
+                errhdl = populate_node_attributes(0);
+                if( errhdl )
+                {
+                    break;
+                }
+            }
+        }
+
+    } while(0);
+
+    return errhdl;
+}
+
+} //namespace RUNTIME
diff --git a/src/usr/runtime/test/makefile b/src/usr/runtime/test/makefile
new file mode 100644
index 000000000..16f87433a
--- /dev/null
+++ b/src/usr/runtime/test/makefile
@@ -0,0 +1,36 @@
+# IBM_PROLOG_BEGIN_TAG 
+# This is an automatically generated prolog. 
+#  
+# $Source: src/usr/runtime/test/makefile $ 
+#  
+# IBM CONFIDENTIAL 
+#  
+# COPYRIGHT International Business Machines Corp. 2012 
+#  
+# p1 
+#  
+# Object Code Only (OCO) source materials 
+# Licensed Internal Code Source Materials 
+# IBM HostBoot Licensed Internal Code 
+#  
+# The source code for this program is not published or otherwise 
+# divested of its trade secrets, irrespective of what has been 
+# deposited with the U.S. Copyright Office. 
+#  
+# Origin: 30 
+#  
+# IBM_PROLOG_END_TAG 
+ROOTPATH = ../../../..
+
+MODULE = testruntime
+TESTS = *.H
+
+#@fixme - remove this after testing
+##      support for fapi
+EXTRAINCDIR += ${ROOTPATH}/src/include/usr/ecmddatabuffer
+EXTRAINCDIR += ${ROOTPATH}/src/include/usr/hwpf/fapi
+EXTRAINCDIR += ${ROOTPATH}/src/include/usr/hwpf/plat
+EXTRAINCDIR += ${ROOTPATH}/src/include/usr/hwpf/hwp
+
+
+include ${ROOTPATH}/config.mk
diff --git a/src/usr/runtime/test/runtimeattrstest.H b/src/usr/runtime/test/runtimeattrstest.H
new file mode 100644
index 000000000..e9e508c2e
--- /dev/null
+++ b/src/usr/runtime/test/runtimeattrstest.H
@@ -0,0 +1,464 @@
+/* IBM_PROLOG_BEGIN_TAG                                                   */
+/* This is an automatically generated prolog.                             */
+/*                                                                        */
+/* $Source: src/usr/runtime/test/runtimeattrstest.H $                     */
+/*                                                                        */
+/* IBM CONFIDENTIAL                                                       */
+/*                                                                        */
+/* COPYRIGHT International Business Machines Corp. 2012                   */
+/*                                                                        */
+/* p1                                                                     */
+/*                                                                        */
+/* Object Code Only (OCO) source materials                                */
+/* Licensed Internal Code Source Materials                                */
+/* IBM HostBoot Licensed Internal Code                                    */
+/*                                                                        */
+/* The source code for this program is not published or otherwise         */
+/* divested of its trade secrets, irrespective of what has been           */
+/* deposited with the U.S. Copyright Office.                              */
+/*                                                                        */
+/* Origin: 30                                                             */
+/*                                                                        */
+/* IBM_PROLOG_END_TAG                                                     */
+#ifndef __TEST_RUNTIMETEST_H
+#define __TEST_RUNTIMETEST_H
+
+/**
+ *  @file runtimetest.H
+ *
+ */
+
+#include <cxxtest/TestSuite.H>
+
+#include <fapi.H>
+#include <fapiAttributeIds.H>
+#include <targeting/common/target.H>
+#include <targeting/common/targetservice.H>
+#include <targeting/common/utilFilter.H>
+#include <arch/ppc.H> //for MAGIC
+#include <attributeenums.H>
+#include <errl/errlmanager.H>
+#include <hwpf/plat/fapiPlatHwpInvoker.H>
+#include "../common/hsvc_attribute_structs.H"
+
+extern trace_desc_t* g_trac_runtime;
+
+using namespace fapi;
+
+class RuntimeTest: public CxxTest::TestSuite
+{
+  public:
+    void testVerifySystemAttributes(void)
+    {
+        TRACFCOMP( g_trac_runtime, "testVerifySystemAttributes> start" );
+        hsvc_system_data_t* sysdata = getSysPtr();
+
+        //Look for a valid node number
+        if( sysdata->nodePresent != 0x8000000000000000 )
+        {
+            TRACFCOMP( g_trac_runtime, "nodePresent=%.16X", sysdata->nodePresent );
+            TS_FAIL("testVerifySystemAttributes> nodePresent is invalid");
+        }
+
+        //Make sure we have some attributes out there
+        if( sysdata->numAttr == 0 )
+        {
+            TS_FAIL("testVerifySystemAttributes> numAttr is zero");
+        }
+
+        //Make sure that the offset is what we expect
+        if( sysdata->offset != 24 ) //3 words from the start
+        {
+            TRACFCOMP( g_trac_runtime, "offset=%.16X", sysdata->offset );
+            TS_FAIL("testVerifySystemAttributes> offset is invalid");
+        }
+
+        char* beginning = reinterpret_cast<char*>(sysdata);
+        hsvc_attr_header_t* headers = reinterpret_cast<hsvc_attr_header_t*>
+          ((beginning+sysdata->offset));
+
+        //Grab a couple of arbitrary attributes        
+        ReturnCode l_rc;
+
+        fapi::ATTR_FREQ_PB_Type freq = 0;
+        l_rc = FAPI_ATTR_GET(ATTR_FREQ_PB,NULL,freq);
+        if( l_rc )
+        {
+            TS_FAIL("Error getting fapi::ATTR_FREQ_PB");
+        }
+
+        fapi::ATTR_PM_SPIVID_CRC_GEN_ENABLE_Type crc_gen_enable = 0;
+        l_rc = FAPI_ATTR_GET(ATTR_PM_SPIVID_CRC_GEN_ENABLE,NULL,crc_gen_enable);
+        if( l_rc )
+        {
+            TS_FAIL("Error getting fapi::ATTR_PM_SPIVID_CRC_GEN_ENABLE");
+        }
+
+        uint64_t attr = 0;
+        while( headers[attr].id != hsvc_attr_header_t::NO_ATTRIBUTE )
+        {
+            if( headers[attr].id == fapi::ATTR_FREQ_PB )
+            {
+                if( headers[attr].sizeBytes !=
+                    sizeof(fapi::ATTR_FREQ_PB_Type) )
+                {
+                    TRACFCOMP( g_trac_runtime, "size=%.16X", headers[attr].sizeBytes );
+                    TS_FAIL("Size of fapi::ATTR_FREQ_PB data is wrong");
+                }
+                else
+                {
+                    fapi::ATTR_FREQ_PB_Type* freq_act =
+                      reinterpret_cast<fapi::ATTR_FREQ_PB_Type*>
+                      (beginning+headers[attr].offset);
+                    if( *freq_act != freq )
+                    {
+                        TRACFCOMP( g_trac_runtime, "Expected=%X, Actual=%X", freq, *freq_act );
+                        TS_FAIL("fapi::ATTR_FREQ_PB data is wrong");
+                    }
+                }
+            }
+            else if( headers[attr].id == fapi::ATTR_PM_SPIVID_CRC_GEN_ENABLE )
+            {
+                if( headers[attr].sizeBytes !=
+                    sizeof(fapi::ATTR_PM_SPIVID_CRC_GEN_ENABLE_Type) )
+                {
+                    TRACFCOMP( g_trac_runtime, "size=%.16X", headers[attr].sizeBytes );
+                    TS_FAIL("Size of fapi::ATTR_PM_SPIVID_CRC_GEN_ENABLE data is wrong");
+                }
+                else
+                {
+                    fapi::ATTR_PM_SPIVID_CRC_GEN_ENABLE_Type* crc_gen_enable_act =
+                      reinterpret_cast<fapi::ATTR_PM_SPIVID_CRC_GEN_ENABLE_Type*>
+                      (beginning+headers[attr].offset);
+                    if( *crc_gen_enable_act != crc_gen_enable )
+                    {
+                        TRACFCOMP( g_trac_runtime, "Expected=%X, Actual=%X", crc_gen_enable, *crc_gen_enable_act );
+                        TS_FAIL("fapi::ATTR_PM_SPIVID_CRC_GEN_ENABLE data is wrong");
+                    }
+                }
+            }
+            attr++;
+        }
+
+        if( attr != sysdata->numAttr )
+        {
+            TRACFCOMP( g_trac_runtime, "numAttr=%d, found attr=%d", sysdata->numAttr, attr );
+            TS_FAIL("Number of attributes found doesn't match expected value");
+        }
+
+        TRACFCOMP( g_trac_runtime, "testVerifySystemAttributes> finish" );
+    }
+
+    void testVerifyNodeAttributes(void)
+    {
+        TRACFCOMP( g_trac_runtime, "testVerifyNodeAttributes> start" );
+        hsvc_node_data_t* nodedata = getNodePtr();
+
+        //Make sure we have some targets out there (at least 1 proc and 1 ex)
+        if( nodedata->numTargets < 2 )
+        {
+            TS_FAIL("testVerifyNodeAttributes> numTargets is zero");
+        }
+
+        //Make sure that the offsets are reasonable
+        if( nodedata->procOffset == 0 ) 
+        {
+            TS_FAIL("testVerifyNodeAttributes> procOffset is invalid");
+        }
+        if( nodedata->exOffset == 0 ) 
+        {
+            TS_FAIL("testVerifyNodeAttributes> exOffset is invalid");
+        }
+        if( nodedata->procOffset == nodedata->exOffset ) 
+        {
+            TS_FAIL("testVerifyNodeAttributes> offsets are equal - that is bad");
+        }
+
+        char* beginning = reinterpret_cast<char*>(nodedata);
+
+        //Look at the procs
+        hsvc_proc_header_t* procs = reinterpret_cast<hsvc_proc_header_t*>
+          ((beginning+nodedata->procOffset));
+
+        //Verify the header data is okay
+        hsvc_proc_header_t* curproc = procs;
+        TRACDCOMP( g_trac_runtime, "procs=%p", procs );
+        while( curproc->procid != hsvc_proc_header_t::NO_PROC )
+        {
+            //Verify we have some attributes
+            if( curproc->numAttr == 0 )
+            {
+                TRACFCOMP(g_trac_runtime,"Proc %d has zero attributes",curproc->procid);
+                TS_FAIL("testVerifyNodeAttributes> no attributes for proc");
+            }
+
+            //Find a target to match this one
+            fapi::Target* proc = getProcTarget( curproc->procid );
+            TRACDCOMP( g_trac_runtime, "procid = %d", curproc->procid );
+
+            //Grab a couple of arbitrary attributes        
+            hsvc_attr_header_t* headers = reinterpret_cast<hsvc_attr_header_t*>
+              ((beginning+curproc->offset));
+            ReturnCode l_rc;
+
+            fapi::ATTR_CHIP_ID_Type tmp1 = 0;
+            l_rc = FAPI_ATTR_GET(ATTR_CHIP_ID,proc,tmp1);
+            if( l_rc )
+            {
+                TS_FAIL("Error getting fapi::ATTR_CHIP_ID");
+            }
+
+            fapi::ATTR_PM_PVSAFE_PSTATE_Type tmp2 = 0;
+            l_rc = FAPI_ATTR_GET(ATTR_PM_PVSAFE_PSTATE,proc,tmp2);
+            if( l_rc )
+            {
+                TS_FAIL("Error getting fapi::ATTR_PM_PVSAFE_PSTATE");
+            }
+
+            uint64_t attr = 0;
+            while( headers[attr].id != hsvc_attr_header_t::NO_ATTRIBUTE )
+            {
+                if( headers[attr].id == fapi::ATTR_CHIP_ID )
+                {
+                    if( headers[attr].sizeBytes !=
+                        sizeof(fapi::ATTR_CHIP_ID_Type) )
+                    {
+                        TRACFCOMP( g_trac_runtime, "size=%.16X", headers[attr].sizeBytes );
+                        TS_FAIL("Size of fapi::ATTR_CHIP_ID data is wrong");
+                    }
+                    else
+                    {
+                        fapi::ATTR_CHIP_ID_Type* tmp1_act =
+                          reinterpret_cast<fapi::ATTR_CHIP_ID_Type*>
+                          (beginning+headers[attr].offset);
+                        if( *tmp1_act != tmp1 )
+                        {
+                            TRACFCOMP( g_trac_runtime, "Expected=%X, Actual=%X", tmp1, *tmp1_act );
+                            TS_FAIL("fapi::ATTR_CHIP_ID data is wrong");
+                        }
+                    }
+                }
+                else if( headers[attr].id == fapi::ATTR_PM_PVSAFE_PSTATE )
+                {
+                    if( headers[attr].sizeBytes !=
+                        sizeof(fapi::ATTR_PM_PVSAFE_PSTATE_Type) )
+                    {
+                        TRACFCOMP( g_trac_runtime, "size=%.16X", headers[attr].sizeBytes );
+                        TS_FAIL("Size of fapi::ATTR_PM_PVSAFE_PSTATE data is wrong");
+                    }
+                    else
+                    {
+                        fapi::ATTR_PM_PVSAFE_PSTATE_Type* tmp2_act =
+                          reinterpret_cast<fapi::ATTR_PM_PVSAFE_PSTATE_Type*>
+                          (beginning+headers[attr].offset);
+                        if( *tmp2_act != tmp2 )
+                        {
+                            TRACFCOMP( g_trac_runtime, "Expected=%X, Actual=%X", tmp2, *tmp2_act );
+                            TS_FAIL("fapi::ATTR_PM_PVSAFE_PSTATE data is wrong");
+                        }
+                    }
+                }
+                attr++;
+            }
+            if( attr != curproc->numAttr )
+            {
+                TRACFCOMP( g_trac_runtime, "numAttr=%d, found attr=%d", curproc->numAttr, attr );
+                TS_FAIL("Number of attributes found doesn't match expected value");
+            }
+
+            delete proc;
+            curproc++;
+            TRACFCOMP( g_trac_runtime, "curproc=%p", curproc );
+        }
+
+
+        //Look at the EXs
+        hsvc_ex_header_t* exs = reinterpret_cast<hsvc_ex_header_t*>
+          ((beginning+nodedata->exOffset));
+
+        //Verify the header data is okay
+        hsvc_ex_header_t* curex = exs;
+        while( curex->parent_procid != hsvc_proc_header_t::NO_PROC )
+        {
+            //Verify we have some attributes
+            if( curex->numAttr == 0 )
+            {
+                TRACFCOMP(g_trac_runtime,"Proc %d has zero attributes",curproc->procid);
+                TS_FAIL("testVerifyNodeAttributes> no attributes for proc");
+            }
+
+            //Find a target to match this one
+            fapi::Target* ex = getExTarget( curex->parent_procid,
+                                            curex->chiplet );
+            TRACDCOMP( g_trac_runtime, "procid = %d, chiplet = %d", curex->parent_procid, curex->chiplet );
+
+            //Grab a couple of arbitrary attributes        
+            hsvc_attr_header_t* headers = reinterpret_cast<hsvc_attr_header_t*>
+              ((beginning+curex->offset));
+            ReturnCode l_rc;
+
+            fapi::ATTR_CHIP_UNIT_POS_Type tmp1 = 0;
+            l_rc = FAPI_ATTR_GET(ATTR_CHIP_UNIT_POS,ex,tmp1);
+            if( l_rc )
+            {
+                TS_FAIL("Error getting fapi::ATTR_CHIP_UNIT_POS");
+                errlHndl_t errhdl = fapiRcToErrl(l_rc);
+                errlCommit(errhdl,CXXTEST_COMP_ID);
+            }
+
+            fapi::ATTR_FUNCTIONAL_Type tmp2 = 0;
+            l_rc = FAPI_ATTR_GET(ATTR_FUNCTIONAL,ex,tmp2);
+            if( l_rc )
+            {
+                TS_FAIL("Error getting fapi::ATTR_FUNCTIONAL");
+                errlHndl_t errhdl = fapiRcToErrl(l_rc);
+                errlCommit(errhdl,CXXTEST_COMP_ID);
+            }
+
+            uint64_t attr = 0;
+            while( headers[attr].id != hsvc_attr_header_t::NO_ATTRIBUTE )
+            {
+                if( headers[attr].id == fapi::ATTR_CHIP_UNIT_POS )
+                {
+                    if( headers[attr].sizeBytes !=
+                        sizeof(fapi::ATTR_CHIP_UNIT_POS_Type) )
+                    {
+                        TRACFCOMP( g_trac_runtime, "size=%.16X", headers[attr].sizeBytes );
+                        TS_FAIL("Size of fapi::ATTR_CHIP_UNIT_POS data is wrong");
+                    }
+                    else
+                    {
+                        fapi::ATTR_CHIP_UNIT_POS_Type* tmp1_act =
+                          reinterpret_cast<fapi::ATTR_CHIP_UNIT_POS_Type*>
+                          (beginning+headers[attr].offset);
+                        if( *tmp1_act != tmp1 )
+                        {
+                            TRACFCOMP( g_trac_runtime, "Expected=%X, Actual=%X", tmp1, *tmp1_act );
+                            TS_FAIL("fapi::ATTR_CHIP_UNIT_POS data is wrong");
+                        }
+                    }
+                }
+                else if( headers[attr].id == fapi::ATTR_FUNCTIONAL )
+                {
+                    if( headers[attr].sizeBytes !=
+                        sizeof(fapi::ATTR_FUNCTIONAL_Type) )
+                    {
+                        TRACFCOMP( g_trac_runtime, "size=%.16X", headers[attr].sizeBytes );
+                        TS_FAIL("Size of fapi::ATTR_FUNCTIONAL data is wrong");
+                    }
+                    else
+                    {
+                        fapi::ATTR_FUNCTIONAL_Type* tmp2_act =
+                          reinterpret_cast<fapi::ATTR_FUNCTIONAL_Type*>
+                          (beginning+headers[attr].offset);
+                        if( *tmp2_act != tmp2 )
+                        {
+                            TRACFCOMP( g_trac_runtime, "Expected=%X, Actual=%X", tmp2, *tmp2_act );
+                            TS_FAIL("fapi::ATTR_FUNCTIONAL data is wrong");
+                        }
+                    }
+                }
+                attr++;
+            }
+            if( attr != curex->numAttr )
+            {
+                TRACFCOMP( g_trac_runtime, "numAttr=%d, found attr=%d", curex->numAttr, attr );
+                TS_FAIL("Number of attributes found doesn't match expected value");
+            }
+
+            delete ex;
+            curex++;
+        }
+
+        TRACFCOMP( g_trac_runtime, "testVerifyNodeAttributes> finish" );
+    }
+
+  private:
+    //@fixme  RTC:49509
+    hsvc_system_data_t* getSysPtr(void)
+    {
+        return( (hsvc_system_data_t*)(5*MEGABYTE) );
+    };
+    hsvc_node_data_t* getNodePtr(void)
+    {
+        return( (hsvc_node_data_t*)(5*MEGABYTE+512*KILOBYTE) );
+    };
+
+    //utility to fetch a proc target based on a procid
+    TARGETING::Target* _getProcTarget( uint64_t i_procid )
+    {
+        // Grab a system object to work with
+        TARGETING::Target* sys = NULL;
+        TARGETING::targetService().getTopLevelTarget(sys);
+
+        // Loop through all of the procs
+        TARGETING::TargetHandleList all_procs;
+        TARGETING::getAllChips( all_procs, TARGETING::TYPE_PROC, false );
+        if( all_procs.empty() )
+        {
+            TRACDCOMP( g_trac_runtime, "all_procs is empty!!, type=%d", TARGETING::TYPE_PROC );
+
+            TARGETING::PredicateCTM predProc(TARGETING::CLASS_CHIP, TARGETING::TYPE_PROC);
+
+            TARGETING::PredicatePostfixExpr checkExpr;
+            checkExpr.push(&predProc);
+            TARGETING::targetService().getAssociated( all_procs, sys,
+                                     TARGETING::TargetService::CHILD,
+                            TARGETING::TargetService::ALL, &checkExpr );
+        }
+
+        TARGETING::Target* proc_target = NULL;
+        for( size_t p = 0; p < all_procs.size(); p++ )
+        {
+            uint64_t node_id = 
+              all_procs[p]->getAttr<TARGETING::ATTR_FABRIC_NODE_ID>();
+            uint64_t CHIP_UNIT_POS =
+              all_procs[p]->getAttr<TARGETING::ATTR_FABRIC_CHIP_ID>();
+            uint32_t procid = (node_id << 3) | (CHIP_UNIT_POS); //NNNCCC
+            if( procid == i_procid )
+            {
+                proc_target = all_procs[p];
+                break;
+            }
+        }
+
+        return proc_target;
+    }
+
+    //utility to fetch a proc target based on a procid
+    fapi::Target* getProcTarget( uint64_t i_procid )
+    {
+        TARGETING::Target* proc = _getProcTarget(i_procid);
+        if( proc != NULL )
+        {
+            return( new fapi::Target( fapi::TARGET_TYPE_PROC_CHIP,
+                          reinterpret_cast<void *>
+                          (const_cast<TARGETING::Target*>(proc)) ) );
+        }
+        return NULL;
+    };
+
+    //utility to fetch an ex target based on a procid and chiplet number
+    fapi::Target* getExTarget( uint64_t i_procid, uint64_t i_chiplet )
+    {
+        TARGETING::Target* proc = _getProcTarget(i_procid);
+        TARGETING::TargetHandleList all_ex;
+        TARGETING::getChildChiplets( all_ex, proc,
+                                     TARGETING::TYPE_EX, false );
+        for( size_t e = 0; e < all_ex.size(); e++ )
+        {
+            uint32_t chiplet = all_ex[e]->getAttr<TARGETING::ATTR_CHIP_UNIT>();
+            if( chiplet == i_chiplet )
+            {
+                return( new fapi::Target( fapi::TARGET_TYPE_PROC_CHIP,
+                                          reinterpret_cast<void *>
+                                          (const_cast<TARGETING::Target*>(all_ex[e])) ) );
+            }
+        }
+        return NULL;
+    }
+};
+
+
+#endif
+