Allow any address instance as input.

Change-Id: Ia8c015e381cd919608f4d35f316286319fd9fb63
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/21743
Dev-Ready: Brent Wieman <bwieman@us.ibm.com>
Tested-by: Jenkins Server
Tested-by: Auto Mirror
Reviewed-by: Brent Wieman <bwieman@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/21759
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>

2 files changed, 54 insertions, 8 deletions

diff --git a/src/import/chips/p9/common/scominfo/p9_scom_addr.H b/src/import/chips/p9/common/scominfo/p9_scom_addr.H
index bf5ad5b1c..90d9f65f7 100644
--- a/src/import/chips/p9/common/scominfo/p9_scom_addr.H
+++ b/src/import/chips/p9/common/scominfo/p9_scom_addr.H
@@ -102,6 +102,7 @@ extern "C"
     /// source: tpc_p9_core_top.vhdl
     typedef enum
     {
+        EC_PSCM_RING_ID = 0x0,      ///< PSCOM
         EC_PERV_RING_ID = 0x1,      ///< PERV
         EC_PC_0_RING_ID = 0x2,      ///< PC_0
         EC_PC_1_RING_ID = 0x3,      ///< PC_1
@@ -113,6 +114,7 @@ extern "C"
     /// source: tpc_p9_l3_top.vhdl
     typedef enum
     {
+        EQ_PSCM_RING_ID = 0x0,      ///< PSCOM
         EQ_PERV_RING_ID = 0x1,      ///< PERV
         EQ_L2_0_RING_ID = 0x2,      ///< L2_0
         EQ_L2_1_RING_ID = 0x3,      ///< L2_1
@@ -130,6 +132,7 @@ extern "C"
     /// source: tpc_p9_n0_top.vhdl
     typedef enum
     {
+        N0_PSCM_RING_ID = 0x0,      ///< PSCOM
         N0_PERV_RING_ID = 0x1,      ///< PERV
         N0_CXA0_0_RING_ID = 0x2,    ///< CXA0_0
         N0_NX_0_RING_ID = 0x4,      ///< NX_0
@@ -142,6 +145,7 @@ extern "C"
     /// source: tpc_p9_n1_top.vhdl
     typedef enum
     {
+        N1_PSCM_RING_ID = 0x0,      ///< PSCOM
         N1_PERV_RING_ID = 0x1,      ///< PERV
         N1_MC23_0_RING_ID = 0x2,    ///< MC23_0
         N1_MCD_0_RING_ID = 0x4,     ///< MCD_0
@@ -153,6 +157,7 @@ extern "C"
     /// source: tpc_p9_n2_top.vhdl
     typedef enum
     {
+        N2_PSCM_RING_ID = 0x0,      ///< PSCOM
         N2_PERV_RING_ID = 0x1,      ///< PERV
         N2_CXA1_0_RING_ID = 0x2,    ///< CXA1_0
         N2_PCIS0_0_RING_ID = 0x3,   ///< PCIS0_0
@@ -170,6 +175,7 @@ extern "C"
     /// source: tpc_p9_n3_top.vhdl
     typedef enum
     {
+        N3_PSCM_RING_ID = 0x0,      ///< PSCOM
         N3_PERV_RING_ID = 0x1,      ///< PERV
         N3_MC01_0_RING_ID = 0x2,    ///< MC01_0
         N3_NPU_0_RING_ID = 0x4,     ///< NPU_0
@@ -189,6 +195,7 @@ extern "C"
     /// source: tpc_p9_xb_top.vhdl
     typedef enum
     {
+        XB_PSCM_RING_ID = 0x0,      ///< PSCOM
         XB_PERV_RING_ID = 0x1,      ///< PERV
         XB_IOPPE_0_RING_ID = 0x2,   ///< IOPPE
         XB_IOX_0_RING_ID = 0x3,     ///< IOX_0
@@ -215,6 +222,7 @@ extern "C"
 #ifdef MC_E9022
     typedef enum
     {
+        MC_PSCM_RING_ID = 0x0,      ///< PSCOM
         MC_PERV_RING_ID = 0x1,      ///< PERV
         MC_MC01_0_RING_ID = 0x2,    ///< MC01_0 / MC23_0
         MC_MCTRA_0_RING_ID = 0x3,   ///< MCTRA01_0 / MCTRA23_0
@@ -230,6 +238,7 @@ extern "C"
 #else
     typedef enum
     {
+        MC_PSCM_RING_ID = 0x0,      ///< PSCOM
         MC_PERV_RING_ID = 0x1,      ///< PERV
         MC_MC01_0_RING_ID = 0x2,    ///< MC01_0 / MC23_0
         MC_MCTRA_0_RING_ID = 0x3,   ///< MCTRA01_0 / MCTRA23_0
@@ -269,6 +278,7 @@ extern "C"
     /// source: tpc_p9_ob_top.vhdl
     typedef enum
     {
+        OB_PSCM_RING_ID = 0x0,      ///< PSCOM
         OB_PERV_RING_ID = 0x1,      ///< PERV
         OB_PBIOA_0_RING_ID = 0x2,   ///< PBIOA_0
         OB_IOO_0_RING_ID = 0x3      ///< IOO_0
@@ -289,6 +299,7 @@ extern "C"
     /// source: tpc_p9_pci[012]_top.vhdl
     typedef enum
     {
+        PCI_PSCM_RING_ID = 0x0,      ///< PSCOM
         PCI_PERV_RING_ID = 0x1,      ///< TRA
         PCI_PE_0_RING_ID = 0x2,      ///< PE_0
         PCI_IOPCI_0_RING_ID = 0x3    ///< IOPCI_0
diff --git a/src/import/chips/p9/common/scominfo/p9_scominfo.C b/src/import/chips/p9/common/scominfo/p9_scominfo.C
index 727849239..17322d5cf 100644
--- a/src/import/chips/p9/common/scominfo/p9_scominfo.C
+++ b/src/import/chips/p9/common/scominfo/p9_scominfo.C
@@ -35,6 +35,7 @@
 
 extern "C"
 {
+
     uint64_t p9_scominfo_createChipUnitScomAddr(const p9ChipUnits_t i_p9CU, const uint8_t i_chipUnitNum,
             const uint64_t i_scomAddr, const uint32_t i_mode)
     {
@@ -52,14 +53,19 @@ extern "C"
                 break;
 
             case PU_EX_CHIPUNIT:
-                if (l_scom.get_chiplet_id() == EP00_CHIPLET_ID)
+                if (EP05_CHIPLET_ID >= l_scom.get_chiplet_id() &&
+                    l_scom.get_chiplet_id() >= EP00_CHIPLET_ID)
                 {
                     l_scom.set_chiplet_id(EP00_CHIPLET_ID + (i_chipUnitNum / 2));
-                    l_scom.set_ring(l_scom.get_ring() + (i_chipUnitNum % 2));
+                    l_scom.set_ring( ( l_scom.get_ring() - ( l_scom.get_ring() % 2 ) ) +
+                                     ( i_chipUnitNum % 2 ) );
                 }
-                else
+                else if (EC23_CHIPLET_ID >= l_scom.get_chiplet_id() &&
+                         l_scom.get_chiplet_id() >= EC00_CHIPLET_ID)
                 {
-                    l_scom.set_chiplet_id(l_scom.get_chiplet_id() + (i_chipUnitNum * 2));
+                    l_scom.set_chiplet_id( EC00_CHIPLET_ID +
+                                           (l_scom.get_chiplet_id() % 2) +
+                                           (i_chipUnitNum * 2));
                 }
 
                 break;
@@ -87,7 +93,8 @@ extern "C"
                 if (l_scom.get_ring() == MC_MC01_0_RING_ID)
                 {
                     // mc
-                    l_scom.set_sat_id(l_scom.get_sat_id() + (i_chipUnitNum % 4));
+                    l_scom.set_sat_id( ( l_scom.get_sat_id() - ( l_scom.get_sat_id() % 4 ) ) +
+                                       ( i_chipUnitNum % 4 ));
                 }
                 else
                 {
@@ -100,7 +107,8 @@ extern "C"
             case PU_NV_CHIPUNIT:
                 l_scom.set_ring(4 + (i_chipUnitNum / 4));
                 l_scom.set_sat_id(((i_chipUnitNum == 2) || (i_chipUnitNum == 3)) ? 7 : 3);
-                l_scom.set_sat_offset(l_scom.get_sat_offset() + (32 * (i_chipUnitNum % 2)));
+                l_scom.set_sat_offset( (l_scom.get_sat_offset() % 32) +
+                                       (32 * (i_chipUnitNum % 2)));
                 break;
 
             case PU_PEC_CHIPUNIT:
@@ -146,7 +154,18 @@ extern "C"
                 break;
 
             case PU_XBUS_CHIPUNIT:
-                l_scom.set_ring(l_scom.get_ring() + i_chipUnitNum);
+                if (XB_IOX_2_RING_ID >= l_scom.get_ring() &&
+                    l_scom.get_ring() >= XB_IOX_0_RING_ID)
+                {
+                    l_scom.set_ring(XB_IOX_0_RING_ID + i_chipUnitNum);
+                }
+
+                if (XB_PBIOX_2_RING_ID >= l_scom.get_ring() &&
+                    l_scom.get_ring() >= XB_PBIOX_0_RING_ID)
+                {
+                    l_scom.set_ring(XB_PBIOX_0_RING_ID + i_chipUnitNum);
+                }
+
                 break;
 
             default:
@@ -178,7 +197,8 @@ extern "C"
             // or by C/EX/EQ target types (by their associated pervasive chiplet instances)
             if (((l_port == GPREG_PORT_ID) ||
                  ((l_port >= CME_PORT_ID) && (l_port <= CPM_PORT_ID)) ||
-                 (l_port == PCBSLV_PORT_ID)))
+                 (l_port == PCBSLV_PORT_ID) ||
+                 (l_port == UNIT_PORT_ID && l_ring == EC_PSCM_RING_ID))) //Catches all PSCOM regs
             {
                 o_chipUnitRelated = true;
                 // PU_PERV_CHIPUNIT
@@ -203,6 +223,7 @@ extern "C"
             }
 
             // core registers which can be addressed by either C/EX target types
+            // c: 0..24
             if (((l_chiplet_id >= EC00_CHIPLET_ID) && (l_chiplet_id <= EC23_CHIPLET_ID)) &&
                 (l_port == UNIT_PORT_ID) &&
                 ((l_ring >= EC_PERV_RING_ID) && (l_ring <= EC_PC_3_RING_ID)))
@@ -217,6 +238,8 @@ extern "C"
             }
 
             // quad registers which can be addressed by either EQ/EX target types
+            // ex: 0..12
+            // eq: 0..6
             if (((l_chiplet_id >= EP00_CHIPLET_ID) && (l_chiplet_id <= EP05_CHIPLET_ID)) &&
                 (l_port == UNIT_PORT_ID) &&
                 (((l_ring >= EQ_PERV_RING_ID)  && (l_ring <= EQ_L3_1_RING_ID)) ||
@@ -244,6 +267,7 @@ extern "C"
             }
 
             // PU_CAPP_CHIPUNIT
+            // capp: 0..1
             if ((((l_chiplet_id == N0_CHIPLET_ID) && (l_ring == N0_CXA0_0_RING_ID)) ||
                  ((l_chiplet_id == N2_CHIPLET_ID) && (l_ring == N2_CXA1_0_RING_ID))) &&
                 (l_port == UNIT_PORT_ID))
@@ -254,6 +278,7 @@ extern "C"
             }
 
             // PU_MCS_CHIPUNIT (nest)
+            // mcs: 0..3
             if (((l_chiplet_id == N3_CHIPLET_ID) || (l_chiplet_id == N1_CHIPLET_ID)) &&
                 (l_port == UNIT_PORT_ID) &&
                 (l_ring == N3_MC01_0_RING_ID) &&
@@ -266,6 +291,7 @@ extern "C"
             }
 
             // PU_MCBIST_CHIPUNIT (mc)
+            // mcbist: 0..1
             if (((l_chiplet_id == MC01_CHIPLET_ID) || (l_chiplet_id == MC23_CHIPLET_ID)) &&
                 (l_port == UNIT_PORT_ID) &&
                 (l_ring == MC_MC01_1_RING_ID) &&
@@ -277,6 +303,7 @@ extern "C"
             }
 
             // PU_MCA_CHIPUNIT (mc)
+            // mca: 0..7
             if (((l_chiplet_id == MC01_CHIPLET_ID) || (l_chiplet_id == MC23_CHIPLET_ID)) &&
                 (l_port == UNIT_PORT_ID) &&
                 (l_ring == MC_MC01_0_RING_ID) &&
@@ -289,6 +316,7 @@ extern "C"
             }
 
             // PU_MCA_CHIPUNIT (iomc)
+            // mca: 0..7
             if (((l_chiplet_id == MC01_CHIPLET_ID) || (l_chiplet_id == MC23_CHIPLET_ID)) &&
                 (l_port == UNIT_PORT_ID) &&
                 ((l_ring >= MC_IOM01_0_RING_ID) && (l_ring <= MC_IOM23_1_RING_ID)) &&
@@ -301,6 +329,7 @@ extern "C"
             }
 
             // PU_NV_CHIPUNIT
+            // nv: 0..5
             if ((l_chiplet_id == N3_CHIPLET_ID) &&
                 (l_port == UNIT_PORT_ID) &&
                 (((l_ring == N3_NPU_0_RING_ID) && ((l_sat_id == 3) || (l_sat_id == 7))) ||
@@ -314,6 +343,7 @@ extern "C"
             }
 
             // PU_PEC_CHIPUNIT (nest)
+            // pec: 0..2
             if ((l_chiplet_id == N2_CHIPLET_ID) &&
                 (l_port == UNIT_PORT_ID) &&
                 ((l_ring >= N2_PCIS0_0_RING_ID) && (l_ring <= N2_PCIS2_0_RING_ID)) &&
@@ -326,6 +356,7 @@ extern "C"
 
             // PU_PEC_CHIPUNIT (iopci/pci)
             // source: iop_scom_cntl_rlm_mac.vhdl
+            // pec: 0..2
             if (((l_chiplet_id >= PCI0_CHIPLET_ID) && (l_chiplet_id <= PCI2_CHIPLET_ID)) &&
                 (l_port == UNIT_PORT_ID) &&
                 ((l_ring == PCI_IOPCI_0_RING_ID) || (l_ring == PCI_PE_0_RING_ID)) &&
@@ -337,6 +368,7 @@ extern "C"
             }
 
             // PU_PHB_CHIPUNIT (nest)
+            // phb: 0..5
             if ((l_chiplet_id == N2_CHIPLET_ID) &&
                 (l_port == UNIT_PORT_ID) &&
                 ((l_ring >= N2_PCIS0_0_RING_ID) && (l_ring <= N2_PCIS2_0_RING_ID)) &&
@@ -351,6 +383,7 @@ extern "C"
             }
 
             // PU_PHB_CHIPUNIT (pci)
+            // phb: 0..5
             if (((l_chiplet_id >= PCI0_CHIPLET_ID) && (l_chiplet_id <= PCI2_CHIPLET_ID)) &&
                 (l_port == UNIT_PORT_ID) &&
                 (l_ring == PCI_PE_0_RING_ID) &&
@@ -367,6 +400,7 @@ extern "C"
             }
 
             // PU_OBUS_CHIPUNIT
+            // obus: 0..3
             if (((l_chiplet_id >= OB0_CHIPLET_ID) && (l_chiplet_id <= OB3_CHIPLET_ID)) &&
                 (l_port == UNIT_PORT_ID) &&
                 (((l_ring == OB_PBIOA_0_RING_ID) && (l_sat_id == OB_PB_SAT_ID)) ||
@@ -378,6 +412,7 @@ extern "C"
             }
 
             // PU_XBUS_CHIPUNIT
+            // xbus: 0..2
             if ((l_chiplet_id == XB_CHIPLET_ID) &&
                 (l_port == UNIT_PORT_ID) &&
                 (((l_ring >= XB_IOX_0_RING_ID) && (l_ring <= XB_IOX_2_RING_ID) && (l_sat_id == XB_IOF_SAT_ID)) ||