talos-hostboot/src/include/usr/intr, branch master

FFDC enhancements for core activate fails

2018-05-19T21:56:42+00:00

Adding some more traces to the error log we grab for core activation failures. Change-Id: I30c6985060fcffcb3382b775a52e59c08d2b51b7 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/57907 Tested-by: Jenkins Server Tested-by: FSP CI Jenkins Tested-by: Jenkins OP Build CI Tested-by: Jenkins OP HW Reviewed-by: Matt Derksen Reviewed-by: Daniel M. Crowell

Multi-Drawer (IPC) Interrupt/Messaging Support

2018-01-25T22:44:20+00:00

- Use doorbells instead of IPIs (no IPI support using LSI interupts in the XIVE intr architecture) - New message type from kernel to userspace so the kernel can notify the HB userspace Interrupt Resource Provider (INTRP) that an IPC message was sent to the particular HB instance (in P8 this happened automatically as that was part of the IPI architecture). - Re-enable testcase that validates that an IPC message can be successfully sent. Change-Id: Ic846f8dca45217205ed61d8381a573e995cb16f2 RTC: 150861 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/52004 Tested-by: Jenkins Server Tested-by: Jenkins OP Build CI Tested-by: Jenkins OP HW Reviewed-by: Christian R. Geddes Tested-by: FSP CI Jenkins Reviewed-by: Prachi Gupta Reviewed-by: Daniel M. Crowell

Interrupt Handling Flow Change to Prevent Deadlock

2018-01-16T02:31:09+00:00

- Previously the End of Interrupt (EOI) message was sent after the registered interrupt handler completed handling of the defect. Instead of this, now the INTRP will immediately mask the current interrupt source and issue the HW EOI to allow other interrupt sources to present. - Later when the registered interrupt handler sends INTRP its EOI message the INTRP will unmask the source and issue the necessary HW EOI to fully clear the interrupt Change-Id: I01c99ca9fdd0cedcf3d313127a8d56f5cda66bc7 CQ: SW413511 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/51691 Tested-by: Jenkins Server Tested-by: Jenkins OP Build CI Tested-by: Jenkins OP HW Reviewed-by: Daniel M. Crowell Tested-by: FSP CI Jenkins Reviewed-by: Christian R. Geddes

Fix race condition between INTR and SBEIO

2017-07-31T16:24:33+00:00

Fixed a race condition in clearing out the PSU interrupt register that existed between the INTR and SBEIO code. We can sometimes lose interrupts for SBE PSU operations which leads to a timeout. Also added code to look for SBE errors if a PSU operation times out Change-Id: I8cdcdcc08956b038bcc65ad7e00a34719bf14c61 CQ: SW396057 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/43339 Tested-by: Jenkins Server Reviewed-by: Elizabeth K. Liner Tested-by: Jenkins OP Build CI Tested-by: Jenkins OP HW Tested-by: FSP CI Jenkins Reviewed-by: Martin Gloff Reviewed-by: William G. Hoffa

Hostboot Base TCE Support

2017-03-08T16:06:34+00:00

This commit adds the base support for hostboot to enable/disable the use of TCEs. It allows for the creation and managment of a TCE table and also initializes the P9 processors to use this table. Change-Id: Idb40f9df5a90d8b7e87b2f5b745cbe7e66109df2 RTC:145071 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/32562 Tested-by: Jenkins Server Reviewed-by: Stephen M. Cprek Tested-by: FSP CI Jenkins Reviewed-by: Marshall J. Wilks Reviewed-by: Nicholas E. Bofferding Tested-by: Jenkins OP Build CI Reviewed-by: William G. Hoffa

Multi-Proc Interrupt Support with Remote LSIs

2016-10-07T19:29:39+00:00

Change-Id: I8a981628cd3adc54ba581deb0ce8afb183febef3 RTC: 150562 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/29719 Tested-by: Jenkins Server Tested-by: FSP CI Jenkins Reviewed-by: Dean Sanner Reviewed-by: Prachi Gupta Reviewed-by: Daniel M. Crowell

P9 PSIHB Base Interrupt Support

2016-03-30T20:24:17+00:00

This change includes the following: - Kernel Updates to handle hypervisor interrupt vector - Interrupt Resource Provider changes to setup and handle LSI Based interrupts - Kernel updates to handle modified interrupt flow for LSI Based interrupts - Attribute updates for Scom BAR Registers Change-Id: If63f246a0090ab8c81c3fa8ac3ab6871a0af2e31 RTC:137561 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/20692 Tested-by: Jenkins Server Tested-by: FSP CI Jenkins Reviewed-by: Andrew J. Geissler Reviewed-by: Prachi Gupta Reviewed-by: Daniel M. Crowell

Update constants and comments for P9 PIR format

2016-02-29T21:29:48+00:00

Implemented a set of macros and constants that can be used everywhere to translate a PIR into its component parts and pull out individual pieces of data from a complete PIR. Also added and updated the references to the old ATTR_FABRIC_NODE_ID with ATTR_FABRIC_GROUP_ID. Change-Id: If9735f53940e5849a648729e4bf8ca0cfbb09f6e RTC: 88055 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/706 Tested-by: Jenkins Server Reviewed-by: Daniel M. Crowell

Fix spelling mistakes using codespell.

2015-01-15T20:57:29+00:00

- See https://github.com/lucasdemarchi/codespell Change-Id: I03e102d1ebb9473b6226fa9b6edb684fa0218a2f Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/15031 Tested-by: Jenkins Server Reviewed-by: STEPHEN M. CPREK Reviewed-by: Zane Shelley Reviewed-by: Brian Silver Reviewed-by: A. Patrick Williams III

Use non blocking messages in intRP to prevent trace deadlock

2014-09-11T15:24:27+00:00

Change-Id: I14cd978a7a102f75e4829d5daa369946e766e874 CQ: SW274049 Backport: release-fips820 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/13025 Tested-by: Jenkins Server Reviewed-by: Douglas R. Gilbert Reviewed-by: Thi N. Tran Reviewed-by: A. Patrick Williams III