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<title>talos-hostboot/src/include/usr/fsi, branch 07-25-2019</title>
<subtitle>Talos™ II hostboot sources</subtitle>
<id>https://git.raptorcs.com/git/talos-hostboot/atom?h=07-25-2019</id>
<link rel='self' href='https://git.raptorcs.com/git/talos-hostboot/atom?h=07-25-2019'/>
<link rel='alternate' type='text/html' href='https://git.raptorcs.com/git/talos-hostboot/'/>
<updated>2018-08-08T21:05:56+00:00</updated>
<entry>
<title>Base targeting support for Axone memory complex</title>
<updated>2018-08-08T21:05:56+00:00</updated>
<author>
<name>Christian Geddes</name>
<email>crgeddes@us.ibm.com</email>
</author>
<published>2018-08-01T21:04:35+00:00</published>
<link rel='alternate' type='text/html' href='https://git.raptorcs.com/git/talos-hostboot/commit/?id=f8e8d7c203dcd6ff31459253ba42a3dbe970765e'/>
<id>urn:sha1:f8e8d7c203dcd6ff31459253ba42a3dbe970765e</id>
<content type='text'>
Added 3 new target types to start things off. These are the OMI
(open-capi memory interface), the OMIC (open-capi memory interface
controller), and the MCC (memory channel controller). These new
targets will help us represent the new memory complex we are using
for axone. The axone memory hiearchy will look like this:

             MI--MCC
           /         \
Proc--MC &lt;         __ OMI--OCMB--MEMPORT--DIMM
           \      /
             OMIC

**Note that OCMB/MEMPORT have not been implemented in hostboot yet

Change-Id: I3df4eb3e279f825f0bdee86448ea23cb975e5511
RTC:172969
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/63744
Tested-by: Jenkins Server &lt;pfd-jenkins+hostboot@us.ibm.com&gt;
Tested-by: Jenkins OP Build CI &lt;op-jenkins+hostboot@us.ibm.com&gt;
Tested-by: Jenkins OP HW &lt;op-hw-jenkins+hostboot@us.ibm.com&gt;
Tested-by: FSP CI Jenkins &lt;fsp-CI-jenkins+hostboot@us.ibm.com&gt;
Reviewed-by: ILYA SMIRNOV &lt;ismirno@us.ibm.com&gt;
Reviewed-by: Daniel M. Crowell &lt;dcrowell@us.ibm.com&gt;
Reviewed-by: Prachi Gupta &lt;pragupta@us.ibm.com&gt;
Reviewed-by: William G. Hoffa &lt;wghoffa@us.ibm.com&gt;
</content>
</entry>
<entry>
<title>Adding FSI and PNOR interfaces for PRD FIRDATA in HBRT</title>
<updated>2017-02-16T14:27:03+00:00</updated>
<author>
<name>Elizabeth Liner</name>
<email>eliner@us.ibm.com</email>
</author>
<published>2016-09-27T14:51:33+00:00</published>
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<id>urn:sha1:3b69a19abe72dffb47c5d088dc98d963d89f94e8</id>
<content type='text'>
Change-Id: I515a328e50536d92f0ab80229cd8d939f89412c7
RTC:127358
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/35008
Tested-by: Jenkins Server &lt;pfd-jenkins+hostboot@us.ibm.com&gt;
Tested-by: FSP CI Jenkins &lt;fsp-CI-jenkins+hostboot@us.ibm.com&gt;
Tested-by: Jenkins OP Build CI &lt;op-jenkins+hostboot@us.ibm.com&gt;
Reviewed-by: Daniel M. Crowell &lt;dcrowell@us.ibm.com&gt;
</content>
</entry>
<entry>
<title>Include MFSI offset for Centaur access from OCC</title>
<updated>2015-10-06T14:56:39+00:00</updated>
<author>
<name>Dan Crowell</name>
<email>dcrowell@us.ibm.com</email>
</author>
<published>2015-10-02T19:33:22+00:00</published>
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<id>urn:sha1:5b5bd5d08d4be9e262d69529a946b7b4655a1731</id>
<content type='text'>
Add the FSI offset for the MFSI master to the base address for
cascaded slaves, this allows access to the Centaurs hanging off
the non-master processors from the OCC FIR collection code.

Change-Id: I5b6c1d77e90f233cab99bb74f5374d0456093cbc
CQ: SW322919
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/20930
Tested-by: Jenkins Server
Tested-by: Jenkins OP Build CI
Tested-by: Jenkins OP HW
Tested-by: FSP CI Jenkins
Reviewed-by: Zane Shelley &lt;zshelle@us.ibm.com&gt;
Reviewed-by: MATTHEW A. PLOETZ &lt;maploetz@us.ibm.com&gt;
Reviewed-by: A. Patrick Williams III &lt;iawillia@us.ibm.com&gt;
</content>
</entry>
<entry>
<title>New interfaces to get FSI and PNOR info for Xstop code</title>
<updated>2015-02-18T21:06:42+00:00</updated>
<author>
<name>Dan Crowell</name>
<email>dcrowell@us.ibm.com</email>
</author>
<published>2015-02-11T17:04:51+00:00</published>
<link rel='alternate' type='text/html' href='https://git.raptorcs.com/git/talos-hostboot/commit/?id=79ea7abf6d31c146c680d39b9f3ae007e434a573'/>
<id>urn:sha1:79ea7abf6d31c146c680d39b9f3ae007e434a573</id>
<content type='text'>
Added new external interfaces to retrieve information
about the FSI topology and the PNOR characteristics
in order to enable the checkstop analysis code that
runs on the OCC.

RTC: 108820
Change-Id: Ibbe9bca8eee4c8ac86006b1ad881bd8b2c3b8280
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/15726
Tested-by: Jenkins Server
Reviewed-by: Zane Shelley &lt;zshelle@us.ibm.com&gt;
Reviewed-by: William H. Schwartz &lt;whs@us.ibm.com&gt;
Reviewed-by: A. Patrick Williams III &lt;iawillia@us.ibm.com&gt;
</content>
</entry>
<entry>
<title>BMC: VPD Caching in PNOR</title>
<updated>2014-10-17T19:12:26+00:00</updated>
<author>
<name>Corey Swenson</name>
<email>cswenson@us.ibm.com</email>
</author>
<published>2014-09-08T20:56:45+00:00</published>
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<id>urn:sha1:c9cf241bc97ff6aba866d6acf167fd910a0f39c5</id>
<content type='text'>
For MVPD CVPD SPD, during presence detect VPD part number and
serial number are compared between PNOR and SEEPROM.  Mismatch
triggers copy of VPD from SEEPROM to PNOR.

Change-Id: Ia0a7b3fdf80bc15aee05c1303efa406fffa318ce
RTC: 106885
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/13233
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell &lt;dcrowell@us.ibm.com&gt;
Reviewed-by: A. Patrick Williams III &lt;iawillia@us.ibm.com&gt;
</content>
</entry>
<entry>
<title>Reset all slaves during initial FSI setup</title>
<updated>2014-06-20T13:00:48+00:00</updated>
<author>
<name>Dan Crowell</name>
<email>dcrowell@us.ibm.com</email>
</author>
<published>2014-05-12T16:21:32+00:00</published>
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<id>urn:sha1:dded02bcf04e63b7af6b3e7f550bf4dc88ca3fd8</id>
<content type='text'>
Change-Id: I9652e3ef727e022e3462fb92d93d9569f7d0ee41
CQ: SW260037
Backport: release-fips811
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/11072
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III &lt;iawillia@us.ibm.com&gt;
</content>
</entry>
<entry>
<title>Change copyright prolog for all files to Apache.</title>
<updated>2014-05-22T03:16:32+00:00</updated>
<author>
<name>Patrick Williams</name>
<email>iawillia@us.ibm.com</email>
</author>
<published>2014-05-19T21:51:08+00:00</published>
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<id>urn:sha1:aa0446e9d1c2f0fb17a6ef40b689ec7281d65387</id>
<content type='text'>
Change-Id: I5664587b4f889099290ef50d50fa9ce5e580e1eb
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/11167
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III &lt;iawillia@us.ibm.com&gt;
</content>
</entry>
<entry>
<title>Set CMFSI fields correctly in the devtree for altmaster</title>
<updated>2014-05-21T22:33:37+00:00</updated>
<author>
<name>Dan Crowell</name>
<email>dcrowell@us.ibm.com</email>
</author>
<published>2014-04-17T22:28:31+00:00</published>
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<id>urn:sha1:3faeb6dd6cbc8929ac94d92525d1d4f5dcfe9156</id>
<content type='text'>
Change-Id: I4a36c70d36ec0603d053d5198a2aa78c07c63334
RTC: 35041
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/10626
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III &lt;iawillia@us.ibm.com&gt;
</content>
</entry>
<entry>
<title>FSI support for alt-master</title>
<updated>2014-04-25T21:18:24+00:00</updated>
<author>
<name>Dan Crowell</name>
<email>dcrowell@us.ibm.com</email>
</author>
<published>2014-03-11T21:52:24+00:00</published>
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<id>urn:sha1:67df4bac1d2515b982e529f35a504b68259bfedf</id>
<content type='text'>
Change-Id: I131ef80db728bde1218d6691219159b765a9c4d9
RTC: 35041
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/10043
Tested-by: Jenkins Server
Reviewed-by: Michael Baiocchi &lt;baiocchi@us.ibm.com&gt;
Reviewed-by: Corey V. Swenson &lt;cswenson@us.ibm.com&gt;
Reviewed-by: A. Patrick Williams III &lt;iawillia@us.ibm.com&gt;
</content>
</entry>
<entry>
<title>Fix FSI MRW Parsing</title>
<updated>2014-04-15T15:47:55+00:00</updated>
<author>
<name>Dan Crowell</name>
<email>dcrowell@us.ibm.com</email>
</author>
<published>2014-04-14T19:44:21+00:00</published>
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<id>urn:sha1:279d152e4d095884110de94e9510a8b7d86ced97</id>
<content type='text'>
Missed a case where the alt-master chip was pointing to the
wrong master.

Change-Id: I0e8010c5adb871344a7d1fd11fefd7f7f152ec72
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/10529
Reviewed-by: Andrew J. Geissler &lt;andrewg@us.ibm.com&gt;
Tested-by: Jenkins Server
Reviewed-by: Michael Baiocchi &lt;baiocchi@us.ibm.com&gt;
Reviewed-by: A. Patrick Williams III &lt;iawillia@us.ibm.com&gt;
</content>
</entry>
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