talos-hostboot/src/include/usr/fapi2, branch 07-25-2019

Automatically include config.h

2019-12-06T16:28:47+00:00

Rather than having to remember to include config.h anywhere we reference a CONFIG variable (and usually forgetting), this adds it to the default compiler flags so that it gets included in every source file we build. Change-Id: I53622ab4d46c55d942e98cae6ec03049fd5b3d08 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/87475 Tested-by: Jenkins Server Tested-by: Jenkins OP Build CI Tested-by: Jenkins OP HW Tested-by: FSP CI Jenkins Reviewed-by: Zachary Clark Reviewed-by: Roland Veloz Reviewed-by: Christian R Geddes Reviewed-by: Nicholas E Bofferding

Dynamically generate ocmb cmd/rsp seq id

2019-10-16T13:28:42+00:00

The current procedure code is using the sequence id portion of the FW message to indicate the type of the command rather than the command number. This makes error handling very difficult because we can't detect which ocmb we are accessing when we detect a failure. Create a function backed ekb attribute to hold the sequence id so that every time we retrieve this attribute, we increment the valuwe on the next get. Change-Id: I93e0e7062d01ddf7ba6a69f89411a5b6bcf01471 RTC: 210371 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/78767 Tested-by: Jenkins Server Tested-by: Jenkins OP Build CI Tested-by: Jenkins OP HW Tested-by: FSP CI Jenkins Reviewed-by: Daniel M Crowell

Hostboot platform support for Explorer inband commands via i2c

2019-09-30T20:35:10+00:00

Inband SRAM can be accessed via scom i2c commands. To Explorer, a register address and an internal memory address are the same thing. That allows us to execute the inband command set even if the OMI link is not active. A new attribute determinds when this inband i2c is required so it can be an easy override for lab use. By default, this i2c path will not execute when OMI links are working. Change-Id: I3f18cf78d2e88e33935f1bd241ef4e2796d36d93 RTC: 208447 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/83787 Tested-by: Jenkins Server Reviewed-by: Christian R Geddes Tested-by: Jenkins OP Build CI Tested-by: Jenkins OP HW Tested-by: FSP CI Jenkins Reviewed-by: Daniel M Crowell Reviewed-by: William G Hoffa

Only compare a proc's omi freq if it has functional OCMB children

2019-08-09T16:21:36+00:00

There are checks we do during the memory intialization where we check to make sure that both processors have the same frequence set for their OMI traffic. If a processor has no OCMB targets then its OMI frequence will not get set so we should ignore those processors for this comparison. Change-Id: Id00f01756b431695e92a15872ebe00fd18306c4f Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/81462 Tested-by: Jenkins Server Tested-by: FSP CI Jenkins Reviewed-by: Matt Derksen Tested-by: Jenkins OP Build CI Tested-by: Jenkins OP HW Reviewed-by: Roland Veloz Reviewed-by: Daniel M Crowell

Change return size of the DDR4 DDIMM SPD

2019-08-08T22:08:12+00:00

Change-Id: If531b0ce88692f6900e414012c44de578acea2b7 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/80826 Reviewed-by: Christian R Geddes Tested-by: Jenkins Server Tested-by: FSP CI Jenkins Tested-by: Jenkins OP Build CI Tested-by: Jenkins OP HW Reviewed-by: Daniel M Crowell

Add functions to back ATTR_FREQ_MCA_MHZ and ATTR_MC_PLL_BUCKET in P9A

2019-06-28T20:56:25+00:00

The FREQ_MCA_MHZ is being used differently in Axone than previously in P9 systems. Now this attribute is now tied in a relationship with the MC_PLL_BUCKET and OMI_PLL_VCO attributes which is defined in the OMI_PLL_FREQ_LIST in the EKB. Hostboot will use the FREQ_OMI_MHZ, which was determined from the parsing DDIMM's VPD, to tell if we have decided that a different PLL bucket than what we booted with is more optimal. At least one scominit procedure is also looking up these values. This commit provides that functions that will allow the Hostboot platform to easily lookup these values. Change-Id: I8e8d970c682d11a73f9fd1962782b613f55bee48 RTC: 207596 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/78542 Tested-by: Jenkins Server Reviewed-by: Matt Derksen Reviewed-by: Roland Veloz Tested-by: FSP CI Jenkins Tested-by: Jenkins OP Build CI Tested-by: Jenkins OP HW Reviewed-by: Daniel M. Crowell

Add OCMB_CHIP support for ROW_REPAIR getters/setters

2019-05-30T19:48:01+00:00

Change-Id: I4e3ca9f998bb6e80c219054a67275738a76fe181 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/77938 Tested-by: Jenkins Server Tested-by: FSP CI Jenkins Tested-by: Jenkins OP Build CI Tested-by: Jenkins OP HW Reviewed-by: Brian J. Stegmiller Reviewed-by: Benjamen G. Tyner Reviewed-by: Zane C. Shelley

Updates to compile new pmic fields in p9a eff_config

2019-05-29T21:54:49+00:00

Added to support updates to p9a_eff_config.C Change-Id: I7424447a57b65ccdc2835dfdb2ec5dcef72b0f53 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/77810 Tested-by: Jenkins Server Tested-by: Jenkins OP Build CI Tested-by: Jenkins OP HW Reviewed-by: Glenn Miles Reviewed-by: Christian R. Geddes Tested-by: FSP CI Jenkins Reviewed-by: Daniel M. Crowell

Combine 'generic' and 'explorer' OCMB chip targets

2019-05-16T16:07:15+00:00

This commit moves the Explorer-specific OCMB_CHIP target into the 'generic' OCMB_CHIP target so that there is only one target. This target will also be used for Gemini. Changes were also made to look for Gemini vs Explorer where appropriate based on ATTR_CHIP_ID. Change-Id: I91b79195bf997a6af4e2ae0a3326ed5a1c7887ec RTC:205563 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/77220 Tested-by: Jenkins Server Tested-by: Jenkins OP Build CI Tested-by: FSP CI Jenkins Tested-by: Jenkins OP HW Reviewed-by: Glenn Miles Reviewed-by: William G. Hoffa Reviewed-by: Christian R. Geddes

Add OCMB_CHIP support for BAD_DQ_BITMAP getters/setters

2019-05-16T15:48:12+00:00

Change-Id: I67225be7e72f7a5194e6a47412ef0895683b8329 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/77217 Tested-by: Jenkins Server Tested-by: Jenkins OP Build CI Tested-by: Jenkins OP HW Tested-by: FSP CI Jenkins Reviewed-by: Brian J. Stegmiller Reviewed-by: Zane C. Shelley