talos-hostboot/src/build/citest/etc/workarounds.postsimsetup, branch 07-25-2019

Remove workaround setting EFUSE3 power-on value

2020-01-14T20:40:01+00:00

We can remove this workaround as it is now correct in the simics copy of the power on values. Change-Id: I7a37e17595b8932406dbc98342107a0a04d66c3d RTC: 244050 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/89264 Tested-by: Jenkins Server Tested-by: Jenkins OP Build CI Tested-by: Jenkins OP HW Tested-by: FSP CI Jenkins Reviewed-by: Matt Derksen Reviewed-by: Roland Veloz Reviewed-by: Daniel M Crowell

Update dimmspd used by explorers in axone simics

2019-10-07T18:56:35+00:00

We want the explorer's SPD to contain valid i2c addresses for the PMIC for simics. Currently simics has these as 0x90 and 0xC0. Normally we ould just update simics directly and then update the simics relase but there has been issues in the last few weeks getting onto a newer simics release and we need these changes to test functionality that is being added to aid with hardware bringup. Change-Id: I1e29205cef59da986092bc8b609ebe27a89c5611 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/84682 Tested-by: Jenkins Server Reviewed-by: Daniel M Crowell

Add call to fapi wrapper of exp_getidec into hwasPlat code

2019-10-03T19:15:15+00:00

The file hwasPlat.C contains the code we use to lookup and compare the IDEC information of a given OCMB when read from the card's SPD versus what is read from the card's defined registers. Recently the code that looks up the IDEC from the card's registers was made into a HWP so it could be leveraged by multiple platforms. A new wrapper has been created on the hostboot side in src/usr/fapiwrap/ that provides an interface for the hostboot platform to call in order to leverage the new EKB hwp. Change-Id: I9155767b199c9b197c010521f33cc0d418901628 RTC: 214627 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/83109 Tested-by: Jenkins Server Tested-by: Jenkins OP Build CI Tested-by: Jenkins OP HW Tested-by: FSP CI Jenkins Reviewed-by: Ilya Smirnov Reviewed-by: Daniel M Crowell Reviewed-by: William G Hoffa

Account for Explorer's DMB_REVISION format in its SPD

2019-09-11T15:52:05+00:00

We have been told that the field we are reading to figure out the EC level of the OCMB via its SPD (offset 0x200) is going to say 0xA0 for the first version of the card, at IBM we would call this EC 0x10. The Explorer manufacture has stated that they will increment the 1st nibble when they do match card revisions, and the 2nd nibble on minor revisions. This commit adds the logic to convert the manufacture's revision format into IBM's EC level format. It also updates the prebuilt cache we use in simics for axone to have the expected 0xA0 value for the explorer SPD stored in the prebuilt cache Change-Id: I10e9523a8fbea847e3124c256fab7bee850cb29d RTC: 214627 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/82873 Tested-by: Jenkins Server Tested-by: Jenkins OP Build CI Tested-by: Jenkins OP HW Tested-by: FSP CI Jenkins Reviewed-by: Matt Derksen Reviewed-by: Daniel M Crowell

Create and allow for PNOR SBE Partition to have DD2.3 Images

2019-01-23T14:23:42+00:00

Include DD2.3 image in SBE pnor partition Extend pnor layout SBE section size Update NIMBUS Simics config to DD2.2 Change-Id: I1f36fd4d122c521d51ea15f68947fde8bd9361be Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/70206 Tested-by: Jenkins Server Tested-by: Jenkins OP Build CI Tested-by: Jenkins OP HW Tested-by: FSP CI Jenkins Reviewed-by: Daniel M. Crowell

Adding prereqs to fix simics fails

2018-10-07T15:32:05+00:00

Change-Id: I184cd19ce0cb2ed013103e69fe6e7684b8a3444f CMVC-Prereq: 1067370 CMVC-Prereq: 1067512 CQ: SW447854 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/67123 Tested-by: Jenkins Server Tested-by: Jenkins OP Build CI Tested-by: Jenkins OP HW Tested-by: FSP CI Jenkins Reviewed-by: Daniel M. Crowell

SW427193 / HW461448: Enable memory controller wat

2018-09-14T21:39:54+00:00

Change-Id: I2fc4cf0dda43d4eba543024605c8f358e22e1bae CQ:SW427193 CQ:HW461448 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/65476 Tested-by: Jenkins Server Tested-by: HWSV CI Reviewed-by: Adam S. Hale Tested-by: PPE CI Tested-by: Hostboot CI Reviewed-by: Thi N. Tran Reviewed-by: Joseph J. McGill Reviewed-by: Jennifer A. Stofer Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/65510 Tested-by: Jenkins OP Build CI Tested-by: Jenkins OP HW Tested-by: FSP CI Jenkins Reviewed-by: Christian R. Geddes

Move bbuild to b0813a_1832.930

2018-08-28T17:02:20+00:00

Change-Id: I26cda4212af7aaee0d85e38faa268625df0922ef Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/65382 Reviewed-by: Daniel M. Crowell Tested-by: Daniel M. Crowell

Use Cumulus DD1.3 SBE image instead of DD1.0

2018-08-20T18:13:37+00:00

Adding support for Cumulus DD1.3 SBE images in the FSP PNOR Dropping support for Cumulus DD1.0 SBE image from FSP PNOR CMVC-Prereq: 1060757 CMVC-Prereq: 1063108 CMVC-Prereq: 1061378 Change-Id: Ia315c6f786ef6c522acf4e580ad435b0180513b3 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/62636 Tested-by: Jenkins Server Tested-by: Jenkins OP Build CI Tested-by: FSP CI Jenkins Reviewed-by: Daniel M. Crowell

Fix simics P9C RCD timeout issues

2018-07-19T16:03:23+00:00

-Move bb level to b0702a_1827.920 -Remove workarounds which are no longer required with the new bb level -add a patch for centaur_memory.act to restore several lines commented out during debug, change will be made in cmvc with SW434517 -Update dimmspd.dat to newer version CQ:SW428846 Change-Id: Ib028f25f944489d860361de96ac75af2adf8d8ef Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/62479 Tested-by: Jenkins Server Tested-by: Jenkins OP Build CI Tested-by: Jenkins OP HW Tested-by: FSP CI Jenkins Reviewed-by: Daniel M. Crowell