From d1fa10f046cdc1f6ba78634fbbff37fd62ed5889 Mon Sep 17 00:00:00 2001 From: Rahul Batra Date: Mon, 9 May 2016 18:47:53 -0500 Subject: Updated TPC Registers names and addresses for P9 Updated TPC_GP0 to TPC_CPLT_CONF0, PERV_GP3 to PERV_CTRL. Change-Id: Ic552bedd228fdb135b67fcdaf80e88bfb796fbb1 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24358 Tested-by: Jenkins Server Reviewed-by: Douglas R. Gilbert Reviewed-by: YUE DU Reviewed-by: Gregory S. Still --- .../include/registers/tpc_firmware_registers.h | 100 ++++++++++++--------- .../include/registers/tpc_register_addresses.h | 8 +- 2 files changed, 60 insertions(+), 48 deletions(-) diff --git a/import/chips/p9/common/pmlib/include/registers/tpc_firmware_registers.h b/import/chips/p9/common/pmlib/include/registers/tpc_firmware_registers.h index 7eb0b702..a69cc20d 100644 --- a/import/chips/p9/common/pmlib/include/registers/tpc_firmware_registers.h +++ b/import/chips/p9/common/pmlib/include/registers/tpc_firmware_registers.h @@ -45,7 +45,7 @@ -typedef union tpc_perv_gp3 +typedef union tpc_perv_ctrl0 { uint64_t value; @@ -63,21 +63,23 @@ typedef union tpc_perv_gp3 { #ifdef _BIG_ENDIAN uint64_t tp_chiplet_chiplet_en_dc : 1; - uint64_t put_in_later0 : 25; + uint64_t put_in_later0 : 24; uint64_t tp_chiplet_fence_pcb_dc : 1; - uint64_t put_in_later1 : 37; + uint64_t put_in_later1 : 6; + uint64_t reserved : 32; #else - uint64_t put_in_later1 : 37; + uint64_t reserved : 32; + uint64_t put_in_later1 : 6; uint64_t tp_chiplet_fence_pcb_dc : 1; - uint64_t put_in_later0 : 25; + uint64_t put_in_later0 : 24; uint64_t tp_chiplet_chiplet_en_dc : 1; #endif // _BIG_ENDIAN } fields; -} tpc_perv_gp3_t; +} tpc_perv_ctrl0_t; -typedef union tpc_gp0 +typedef union tpc_cplt_conf0 { uint64_t value; @@ -94,22 +96,22 @@ typedef union tpc_gp0 struct { #ifdef _BIG_ENDIAN - uint64_t put_in_later0 : 40; - uint64_t tc_node_id_dc : 3; - uint64_t tc_chip_id_dc : 3; - uint64_t put_in_later1 : 18; + uint64_t put_in_later0 : 48; + uint64_t tc_unit_group_id_dc : 4; + uint64_t tc_unit_chip_id_dc : 3; + uint64_t put_in_later1 : 9; #else - uint64_t put_in_later1 : 18; - uint64_t tc_chip_id_dc : 3; - uint64_t tc_node_id_dc : 3; - uint64_t put_in_later0 : 40; + uint64_t put_in_later1 : 9; + uint64_t tc_unit_chip_id_dc : 3; + uint64_t tc_unit_group_id_dc : 4; + uint64_t put_in_later0 : 48; #endif // _BIG_ENDIAN } fields; -} tpc_gp0_t; +} tpc_cplt_conf0_t; -typedef union tpc_gp0_and +typedef union tpc_cplt_conf0_and { uint64_t value; @@ -126,22 +128,22 @@ typedef union tpc_gp0_and struct { #ifdef _BIG_ENDIAN - uint64_t put_in_later0 : 40; - uint64_t tc_node_id_dc : 3; - uint64_t tc_chip_id_dc : 3; - uint64_t put_in_later1 : 18; + uint64_t put_in_later0 : 48; + uint64_t tc_unit_group_id_dc : 4; + uint64_t tc_unit_chip_id_dc : 3; + uint64_t put_in_later1 : 9; #else - uint64_t put_in_later1 : 18; - uint64_t tc_chip_id_dc : 3; - uint64_t tc_node_id_dc : 3; - uint64_t put_in_later0 : 40; + uint64_t put_in_later1 : 9; + uint64_t tc_unit_chip_id_dc : 3; + uint64_t tc_unit_group_id_dc : 4; + uint64_t put_in_later0 : 48; #endif // _BIG_ENDIAN } fields; -} tpc_gp0_and_t; +} tpc_cplt_conf0_and_t; -typedef union tpc_gp0_or +typedef union tpc_cplt_conf0_or { uint64_t value; @@ -158,18 +160,18 @@ typedef union tpc_gp0_or struct { #ifdef _BIG_ENDIAN - uint64_t put_in_later0 : 40; - uint64_t tc_node_id_dc : 3; - uint64_t tc_chip_id_dc : 3; - uint64_t put_in_later1 : 18; + uint64_t put_in_later0 : 48; + uint64_t tc_unit_group_id_dc : 4; + uint64_t tc_unit_chip_id_dc : 3; + uint64_t put_in_later1 : 9; #else - uint64_t put_in_later1 : 18; - uint64_t tc_chip_id_dc : 3; - uint64_t tc_node_id_dc : 3; - uint64_t put_in_later0 : 40; + uint64_t put_in_later1 : 9; + uint64_t tc_unit_chip_id_dc : 3; + uint64_t tc_unit_group_id_dc : 4; + uint64_t put_in_later0 : 48; #endif // _BIG_ENDIAN } fields; -} tpc_gp0_or_t; +} tpc_cplt_conf0_or_t; @@ -221,21 +223,31 @@ typedef union tpc_device_id { #ifdef _BIG_ENDIAN uint64_t cfam_id : 32; + uint64_t constant : 4; + uint64_t socket_id : 3; + uint64_t chippos_id : 1; + uint64_t io_tp_vsb_chip_pos : 1; + uint64_t constant1 : 7; uint64_t fuse_nx_allow_crypto : 1; uint64_t fuse_vmx_crypto_dis : 1; uint64_t fuse_fp_throttle_en : 1; - uint64_t reserved32 : 1; - uint64_t socket_id : 3; - uint64_t chippos_id : 1; - uint64_t _reserved0 : 24; + uint64_t tp_np_nvlink_disable : 1; + uint64_t fuse_topology_2chip : 1; + uint64_t fuse_topology_group : 2; + uint64_t constant2 : 9; #else - uint64_t _reserved0 : 24; - uint64_t chippos_id : 1; - uint64_t socket_id : 3; - uint64_t reserved32 : 1; + uint64_t constant2 : 9; + uint64_t fuse_topology_group : 2; + uint64_t fuse_topology_2chip : 1; + uint64_t tp_np_nvlink_disable : 1; uint64_t fuse_fp_throttle_en : 1; uint64_t fuse_vmx_crypto_dis : 1; uint64_t fuse_nx_allow_crypto : 1; + uint64_t constant1 : 7; + uint64_t io_tp_vsb_chip_pos : 1; + uint64_t chippos_id : 1; + uint64_t socket_id : 3; + uint64_t constant : 4; uint64_t cfam_id : 32; #endif // _BIG_ENDIAN } fields; diff --git a/import/chips/p9/common/pmlib/include/registers/tpc_register_addresses.h b/import/chips/p9/common/pmlib/include/registers/tpc_register_addresses.h index 4392d9a5..96007e8e 100644 --- a/import/chips/p9/common/pmlib/include/registers/tpc_register_addresses.h +++ b/import/chips/p9/common/pmlib/include/registers/tpc_register_addresses.h @@ -32,11 +32,11 @@ #define TPC_PERVPIB_BASE 0x00050000 -#define TPC_PERV_GP3 0x0005001b +#define TPC_PERV_CTRL0 0x0005001a #define TPC_PIB_BASE 0x01000000 -#define TPC_GP0 0x01000000 -#define TPC_GP0_AND 0x01000004 -#define TPC_GP0_OR 0x01000005 +#define TPC_CPLT_CONF0 0x01000008 +#define TPC_CPLT_CONF0_AND 0x0100000c +#define TPC_CPLT_CONF0_OR 0x0100000d #define TPC_MISCPIB_BASE 0x010f0000 #define TPC_HPR2 0x010f0022 #define TPC_TPCHIP_BASE 0x000f0000 -- cgit v1.2.3