From 7665beeefb5804fa42e641feb157ab5073111ca5 Mon Sep 17 00:00:00 2001 From: Yue Du Date: Sun, 5 Nov 2017 16:57:15 -0600 Subject: STOP/PState: SGPE/PGPE Error Handling Support Upon PGPE Halt 1) SGPE performs STOP Recovery Trigger to set a malfunction alert and removes PGPE IPCs from wake-up decisions. 2) CME is interrupted by QPPM OCC Heartbeat Lost that PGPE stopped updating Upon SGPE Halt 1) PGPE moves to Psafe 2) PGPE performs STOP Recovery Trigger to set a malfunction alert. This commit also includes SGPE Panic Code Cleanup such as debug halt support. However PGPE Panic Code Cleanup is dealt in a different commit Key_Cronus_Test=PM_REGRESS Change-Id: I832d5cad5e54485945cab9fe2bf56af4d18bc8f7 Original-Change-Id: I893aa1ef21d2f684722b8c10dbbeb92b9505c1c4 CQ: SW410252 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49275 Tested-by: PPE CI Tested-by: Jenkins Server Tested-by: HWSV CI Tested-by: Cronus HW CI Tested-by: FSP CI Jenkins Tested-by: Hostboot CI Reviewed-by: Michael S. Floyd Reviewed-by: RAHUL BATRA Reviewed-by: Jennifer A. Stofer --- .../ppe_closed/sgpe/stop_gpe/p9_sgpe_stop.h | 15 +++-- .../ppe_closed/sgpe/stop_gpe/p9_sgpe_stop_entry.c | 74 +++++++++++++++++----- 2 files changed, 69 insertions(+), 20 deletions(-) diff --git a/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_stop.h b/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_stop.h index af6b7ada..d4d67c48 100644 --- a/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_stop.h +++ b/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_stop.h @@ -180,12 +180,16 @@ extern "C" { #define PERV_NET_CTRL1_WAND 0x000F0045 +#define PK_OPTIONAL_DEBUG_HALT(panic_code) \ + if (in32(OCB_OCCS2) & BIT32(PM_DEBUG_HALT_ENABLE)) {PK_PANIC(panic_code);} + + #define SGPE_STOP_QUAD_ERROR_HANDLER(quad_error, panic_code) \ G_sgpe_stop_record.group.quad[VECTOR_ERROR] |= BIT32(quad_error); \ G_sgpe_stop_record.group.quad[VECTOR_CONFIG] &= ~BIT32(quad_error); \ G_sgpe_stop_record.group.quad[VECTOR_ACTIVE] &= ~BIT32(quad_error); \ G_sgpe_stop_record.state[quad_error].error_code = panic_code; \ - //PK_PANIC(panic_code); //enable if desire halt on error + PK_OPTIONAL_DEBUG_HALT(panic_code) enum SGPE_STOP_STATE_HISTORY_VECTORS { @@ -217,10 +221,11 @@ enum SGPE_STOP_PSCOM_MASK enum SGPE_WOF_ACTIVE_UPDATE_STATUS { - IPC_SGPE_PGPE_UPDATE_QUAD_ENABLED = 2, - IPC_SGPE_PGPE_UPDATE_CORE_ENABLED = 1, + IPC_SGPE_PGPE_UPDATE_QUAD_ENABLED = 0x2, + IPC_SGPE_PGPE_UPDATE_CORE_ENABLED = 0x1, // Reserved_4_Do_Not_Use - IPC_SGPE_PGPE_UPDATE_CTRL_ONGOING = 8 + IPC_SGPE_PGPE_UPDATE_CTRL_ONGOING = 0x8, + IPC_SGPE_PGPE_UPDATE_PGPE_HALTED = 0xF0 }; enum SGPE_SUSPEND_FUNCTION_STATUS @@ -380,6 +385,8 @@ void p9_sgpe_stop_suspend_all_cmes(); /// SGPE STOP Interrupt Handlers void p9_sgpe_fit_handler(); +void p9_sgpe_pgpe_halt_handler(void*, PkIrqId); +void p9_sgpe_checkstop_handler(void*, PkIrqId); void p9_sgpe_pig_type2_handler(void*, PkIrqId); void p9_sgpe_pig_type3_handler(void*, PkIrqId); void p9_sgpe_pig_type5_handler(void*, PkIrqId); diff --git a/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_stop_entry.c b/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_stop_entry.c index 2c94e0e9..1560375f 100644 --- a/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_stop_entry.c +++ b/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_stop_entry.c @@ -39,7 +39,6 @@ extern SgpeStopRecord G_sgpe_stop_record; void p9_sgpe_stop_entry() { - uint32_t entry_ongoing[2] = {0, 0}; uint32_t l3_purge_aborted = 0; uint32_t ex = 0; uint32_t ex_mask = 0; @@ -372,6 +371,40 @@ p9_sgpe_stop_entry() PK_TRACE("+++++ +++++ EX STOP ENTRY [LEVEL 8-10] +++++ +++++"); // ------------------------------------------------------------------------ + if (ex & FST_EX_IN_QUAD) + { + cloop = 0; + } + else + { + cloop = CORES_PER_EX; + } + + if (ex & SND_EX_IN_QUAD) + { + climit = CORES_PER_QUAD; + } + else + { + climit = CORES_PER_EX; + } + + for(; cloop < climit; cloop++) + { + cindex = (qloop << 2) + cloop; + + // Check partial good core + if (!(G_sgpe_stop_record.group.core[VECTOR_CONFIG] & BIT32(cindex))) + { + continue; + } + + PK_TRACE("Update STOP history on core[%d]: continue on entering", cindex); + scom_data.words.lower = 0; + scom_data.words.upper = SSH_ENTRY_IN_SESSION; + GPE_PUTSCOM_VAR(PPM_SSHSRC, CORE_ADDR_BASE, cindex, 0, scom_data.value); + } + PK_TRACE_INF("SE.8A: Quad[%d] EX_L2[%d] Stopping L2 Clocks", qloop, ex); PK_TRACE("Acquire cache clock controller atomic lock"); @@ -489,9 +522,6 @@ p9_sgpe_stop_entry() { cloop = 0; G_sgpe_stop_record.state[qloop].act_state_x0 = STOP_LEVEL_8; - entry_ongoing[0] = - G_sgpe_stop_record.state[qloop].req_state_x0 < STOP_LEVEL_11 ? - STOP_TRANS_COMPLETE : STOP_TRANS_ENTRY; } else { @@ -502,9 +532,6 @@ p9_sgpe_stop_entry() { climit = CORES_PER_QUAD; G_sgpe_stop_record.state[qloop].act_state_x1 = STOP_LEVEL_8; - entry_ongoing[1] = - G_sgpe_stop_record.state[qloop].req_state_x1 < STOP_LEVEL_11 ? - STOP_TRANS_COMPLETE : STOP_TRANS_ENTRY; } else { @@ -521,12 +548,9 @@ p9_sgpe_stop_entry() continue; } - // request levle already set by CME - // shift by 2 == times 4, which is cores per quad PK_TRACE("Update STOP history on core[%d]: in stop level 8", cindex); scom_data.words.lower = 0; - scom_data.words.upper = (SSH_ACT_LV8_COMPLETE | - (((uint32_t)entry_ongoing[cloop >> 1]) << SHIFT32(3))); + scom_data.words.upper = SSH_ACT_LV8_COMPLETE; #if !DISABLE_STOP8 @@ -571,16 +595,27 @@ p9_sgpe_stop_entry() continue; } - ex = G_sgpe_stop_record.group.expg[qloop]; - // ------------------------------------------------------------------------ PK_TRACE("+++++ +++++ QUAD STOP ENTRY [LEVEL 11-15, L3 PURGE] +++++ +++++"); // ------------------------------------------------------------------------ - PK_TRACE_INF("SE.11A: Quad[%d] EX_PG[%d] Shutting Cache Down", qloop, ex); + ex = G_sgpe_stop_record.group.expg[qloop]; - PK_TRACE("Update QSSR: stop_entry_ongoing"); - out32(OCB_QSSR_OR, BIT32(qloop + 20)); + for(cloop = 0; cloop < CORES_PER_QUAD; cloop++) + { + cindex = (qloop << 2) + cloop; + + // Check partial good core + if (!(G_sgpe_stop_record.group.core[VECTOR_CONFIG] & BIT32(cindex))) + { + continue; + } + + PK_TRACE("Update STOP history on core[%d]: continue entering", cindex); + scom_data.words.lower = 0; + scom_data.words.upper = SSH_ENTRY_IN_SESSION; + GPE_PUTSCOM_VAR(PPM_SSHSRC, CORE_ADDR_BASE, cindex, 0, scom_data.value); + } PK_TRACE("Update STOP history on quad[%d]: update request stop level", qloop); scom_data.words.lower = 0; @@ -588,6 +623,11 @@ p9_sgpe_stop_entry() ((uint32_t)G_sgpe_stop_record.state[qloop].req_state_q << SHIFT32(7))); GPE_PUTSCOM_VAR(PPM_SSHSRC, QUAD_ADDR_BASE, qloop, 0, scom_data.value); + PK_TRACE("Update QSSR: stop_entry_ongoing"); + out32(OCB_QSSR_OR, BIT32(qloop + 20)); + + PK_TRACE_INF("SE.11A: Quad[%d] EX_PG[%d] Shutting Cache Down", qloop, ex); + //================================== MARK_TAG(SE_PURGE_L3, (32 >> qloop)) //================================== @@ -851,6 +891,7 @@ p9_sgpe_stop_entry() if ((!ipc_quad_entry) && (in32(OCB_OCCS2) & BIT32(PGPE_ACTIVE)) && + G_sgpe_stop_record.wof.update_pgpe != IPC_SGPE_PGPE_UPDATE_PGPE_HALTED && G_sgpe_stop_record.group.quad[VECTOR_ENTRY]) // entry into STOP11 { //============================ @@ -1300,6 +1341,7 @@ p9_sgpe_stop_entry() /// @todo RTC166577 /// this block can be done as early as after stop cache clocks if ((in32(OCB_OCCS2) & BIT32(PGPE_ACTIVE)) && + G_sgpe_stop_record.wof.update_pgpe != IPC_SGPE_PGPE_UPDATE_PGPE_HALTED && G_sgpe_stop_record.group.quad[VECTOR_ENTRY]) { // Note: if all quads aborted on l3 purge, the quad list will be 0s; -- cgit v1.2.3