From 547407639b17fb65af3ed447b96cd113e63c810d Mon Sep 17 00:00:00 2001
From: Brian Vanderpool <vanderp@us.ibm.com>
Date: Fri, 27 Oct 2017 11:01:05 -0500
Subject: Disable Pulsed Resclk mode

Change-Id: Iba706c2a1b8e4c8943c643efc8f7c54d8b461c2f
CQ: HW425355
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48933
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Michael S. Floyd <mfloyd@us.ibm.com>
Reviewed-by: Juan R. Medina <jrmedina@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
---
 .../p9/procedures/hwp/lib/p9_resclk_defines.H      | 90 +++++++++++-----------
 1 file changed, 45 insertions(+), 45 deletions(-)

diff --git a/import/chips/p9/procedures/hwp/lib/p9_resclk_defines.H b/import/chips/p9/procedures/hwp/lib/p9_resclk_defines.H
index 654d6100..ce3685d1 100644
--- a/import/chips/p9/procedures/hwp/lib/p9_resclk_defines.H
+++ b/import/chips/p9/procedures/hwp/lib/p9_resclk_defines.H
@@ -57,12 +57,12 @@ std::vector<rsclk_freq_idx_t> const RESCLK_INDEX_VEC =
     //  { Freq, Idx}
     {    0,  3 },
     { 1500,  3 },
-    { 2000, 24 },
-    { 2800, 48 },
-    { 3400, 41 },
-    { 3700, 41 },
-    { 3900, 41 },
-    { 4100, 41 }
+    { 2000, 21 },
+    { 3000, 23 },
+    { 3400, 24 },
+    { 3700, 22 },
+    { 3900, 20 },
+    { 4100, 19 }
 };
 //###############################################################################
 // Table 2: Resonant (Core & L2) Grids Control Data
@@ -98,45 +98,45 @@ std::vector<uint16_t> const RESCLK_TABLE_VEC =
     0xA080,
     0xE080,
     0xF080,
-    0xE080,
-    0xA080,
-    0xB080,
-    0x9080,
-    0x8080,
-    0x0080,
-    0x0480,
-    0x8480,
-    0x9480,
-    0xB480,
-    0x9480,
-    0x8480,
-    0x0480,
-    0x0580,
-    0x8580,
-    0x9580,
-    0xB580,
-    0x9580,
-    0x8580,
-    0x0580,
-    0x0780,
-    0x8780,
-    0x9780,
-    0xB780,
-    0x9780,
-    0x8780,
-    0x0780,
-    0x0680,
-    0x8680,
-    0x9680,
-    0xB680,
-    0xA680,
-    0xE680,
-    0xF680,
-    0xD680,
-    0xC680,
-    0xC680,
-    0xC680,
-    0xC680
+    0xF080,
+    0xF080,
+    0xF080,
+    0xF080,
+    0xF080,
+    0xF080,
+    0xF080,
+    0xF080,
+    0xF080,
+    0xF080,
+    0xF080,
+    0xF080,
+    0xF080,
+    0xF080,
+    0xF080,
+    0xF080,
+    0xF080,
+    0xF080,
+    0xF080,
+    0xF080,
+    0xF080,
+    0xF080,
+    0xF080,
+    0xF080,
+    0xF080,
+    0xF080,
+    0xF080,
+    0xF080,
+    0xF080,
+    0xF080,
+    0xF080,
+    0xF080,
+    0xF080,
+    0xF080,
+    0xF080,
+    0xF080,
+    0xF080,
+    0xF080,
+    0xF080
 };
 //###############################################################################
 // Table 3: L3 Grid Control Data
-- 
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