From 49a2d8e9c2941391e3f7075b2d00907da39023fd Mon Sep 17 00:00:00 2001 From: Rahul Batra Date: Sun, 13 Jan 2019 22:36:12 -0500 Subject: PGPE: WOV Fixes 1) Fixes WOV FIT Sample bug. 2) Fixes undervolting on a frequency change even if undervolting is disabled. 3) Reverts the MSR_THROTTLE_MASK fix that was lost in the undervolting commit. Key_Cronus_Test=PM_REGRESS Change-Id: Ifeee638114ff38cb16621ce9cd68530863aa750e Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/70433 Tested-by: Jenkins Server Tested-by: Cronus HW CI Tested-by: FSP CI Jenkins Reviewed-by: Gregory S. Still Reviewed-by: YUE DU Reviewed-by: Joseph J. McGill --- .../ppe_closed/pgpe/pstate_gpe/p9_pgpe_fit.c | 2 +- .../ppe_closed/pgpe/pstate_gpe/p9_pgpe_pstate.c | 19 ++++++++++++++----- .../ppe_closed/pgpe/pstate_gpe/p9_pgpe_pstate.h | 2 +- 3 files changed, 16 insertions(+), 7 deletions(-) diff --git a/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_fit.c b/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_fit.c index ccb76618..f8834fcc 100644 --- a/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_fit.c +++ b/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_fit.c @@ -392,7 +392,7 @@ __attribute__((always_inline)) inline void handle_wov() { G_wov_count++; - if (G_gppb->wov_sample_125us == G_wov_count) + if ((G_gppb->wov_sample_125us / 2) == G_wov_count) { p9_pgpe_pstate_adjust_wov(); G_wov_count = 0; diff --git a/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_pstate.c b/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_pstate.c index f268a0d4..749bdf6b 100644 --- a/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_pstate.c +++ b/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_pstate.c @@ -1118,6 +1118,12 @@ void p9_pgpe_pstate_stop() } } + if (G_pgpe_header_data->g_pgpe_flags & PGPE_FLAG_WOV_UNDERVOLT_ENABLE) + { + G_pgpe_pstate_record.wov.status = WOV_DISABLED; + PK_TRACE_INF("PST: Undervolting Enabled"); + } + //Set status in OCC_Scratch2 uint32_t occScr2 = in32(G_OCB_OCCS2); @@ -2139,7 +2145,11 @@ void p9_pgpe_pstate_freq_updt(uint32_t freq_change_dir) PK_TRACE_DBG("FREQ: Enter"); G_pgpe_pstate_record.wov.frequency_change_direction = freq_change_dir; - p9_pgpe_pstate_adjust_wov(); + + if (G_pgpe_pstate_record.wov.status & WOV_UNDERVOLT_ENABLED) + { + p9_pgpe_pstate_adjust_wov(); + } pgpe_db0_glb_bcast_t db0; db0.value = G_pgpe_pstate_record.psNext.value; @@ -2369,7 +2379,6 @@ inline void p9_pgpe_droop_unthrottle() // void p9_pgpe_pstate_wov_init() { - //G_pgpe_pstate_record.wov.freq_loss_threshold_tenths = UNDERVOLT_LOSS_THRESHOLD_TENTHS; G_pgpe_pstate_record.wov.avg_freq_gt_target_freq = 0; G_pgpe_pstate_record.wov.freq_loss_tenths_gt_max_droop_tenths = 0; G_pgpe_pstate_record.wov.status = WOV_DISABLED; @@ -2388,7 +2397,7 @@ void p9_pgpe_pstate_adjust_wov() uint64_t qfmr; uint32_t delta_tb, delta_cycles, new_tb, new_cycles; - PK_TRACE_INF("WOV: Adjust"); + PK_TRACE_DBG("WOV: Adjust"); ocb_qcsr_t qcsr; qcsr.value = in32(G_OCB_QCSR); @@ -2415,7 +2424,7 @@ void p9_pgpe_pstate_adjust_wov() new_tb = qfmr >> 32; new_cycles = qfmr & (0xFFFFFFFF); - PK_TRACE_INF("WOV: QFMR[%d]=0x%08x %08x ", q, qfmr >> 32, qfmr); + PK_TRACE_DBG("WOV: QFMR[%d]=0x%08x %08x ", q, qfmr >> 32, qfmr); //If freq_change_in_progress if (G_pgpe_pstate_record.wov.frequency_change_direction != PGPE_FREQ_DIRECTION_NO_CHANGE) @@ -2464,7 +2473,7 @@ void p9_pgpe_pstate_adjust_wov() G_pgpe_pstate_record.wov.freq_loss_percent_tenths[q] = (freq_loss * 1000) / G_pgpe_pstate_record.wov.target_freq[q]; - PK_TRACE_INF("AUV: Quad[%d] TgtFreq=0x%x Avg_Freq=0x%x FreqLossPercentTenths=0x%x", q, + PK_TRACE_DBG("AUV: Quad[%d] TgtFreq=0x%x Avg_Freq=0x%x FreqLossPercentTenths=0x%x", q, G_pgpe_pstate_record.wov.target_freq[q], G_pgpe_pstate_record.wov.avg_freq[q], G_pgpe_pstate_record.wov.freq_loss_percent_tenths[q]); diff --git a/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_pstate.h b/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_pstate.h index 9ccb5d03..78bfe77a 100644 --- a/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_pstate.h +++ b/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_pstate.h @@ -114,7 +114,7 @@ enum PGPE_CORE_THROTTLE // Include core offline, address error, and timeout. The timeout is // included to avoid an extra mtmsr in the event we need to cleanup // from SW407201 - MSR_THROTTLE_MASK = 0x29000000, + MSR_THROTTLE_MASK = 0x39000000, WORKAROUND_SCOM_MULTICAST_WRITE = 0x69010800, THROTTLE_SCOM_MULTICAST_WRITE = 0x69010A9E, CORE_IFU_THROTTLE = 0x80000000, -- cgit v1.2.1