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authorRahul Batra <rbatra@us.ibm.com>2018-03-16 14:08:28 -0500
committerhostboot <hostboot@us.ibm.com>2018-04-06 12:38:01 -0500
commit784e3cc4dee5030f573720a29ce04dcdcc2e10de (patch)
treebc1b7a959c5a3da2c09ec7401d26a0af88b959f1 /import
parent2fb0edda0eeb4cba5319ee0f4405da79d75d4884 (diff)
downloadtalos-hcode-784e3cc4dee5030f573720a29ce04dcdcc2e10de.tar.gz
talos-hcode-784e3cc4dee5030f573720a29ce04dcdcc2e10de.zip
PGPE: Use Sort Cores from GlobalParameterBlock
Key_Cronus_Test=PM_REGRESS Change-Id: I28db26279bea237a68ae3f12af66ef61f806a2ce CQ: SW421708 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55984 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Diffstat (limited to 'import')
-rw-r--r--import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_pstate.c27
1 files changed, 3 insertions, 24 deletions
diff --git a/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_pstate.c b/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_pstate.c
index 90af2020..8dbbf688 100644
--- a/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_pstate.c
+++ b/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_pstate.c
@@ -75,9 +75,7 @@ void p9_pgpe_droop_unthrottle();
//the fields in the structure are set to zero(see p9_pgpe_main.c). Here only non-zero value are set
void p9_pgpe_pstate_init()
{
- uint32_t q, c;
- ocb_ccsr_t ccsr;
- ccsr.value = in32(OCB_CCSR);
+ uint32_t q;
G_pgpe_pstate_record.pstatesStatus = PSTATE_INIT;
@@ -108,34 +106,15 @@ void p9_pgpe_pstate_init()
G_pgpe_pstate_record.quadPSNext[q] = G_pgpe_pstate_record.safePstate;
G_pgpe_pstate_record.globalPSNext = G_pgpe_pstate_record.safePstate;
- // Original behavior. Can be removed once G_gppb->options.pad has
- // good_cores_in_sort always filled in correctly.
- for (c = (q * CORES_PER_QUAD); c < (q + 1)*CORES_PER_QUAD; c++)
- {
- if (ccsr.value & CORE_MASK(c))
- {
- G_pgpe_pstate_record.numSortCores += 1;
- }
- }
}
- // CQ: SW415420
- // TODO: RTC 187305
- // Load the number of cores for this part. Note: this is called
- // "Configured Cores" but this is really not the actual case; this
- // is the originally good cores from the VPD for this sort to be
- // used by the WOF algorithm to compute vratio.
- //
// The following overlay is done so allow external tooling to use
// the earlier version of header (pre-adding the good_cores_in_sort
- // field in the options.pad word).
+ // field in the options.pad word)
GPPBOptionsPadUse pad;
pad = (GPPBOptionsPadUse)G_gppb->options.pad;
- if (pad.fields.good_cores_in_sort)
- {
- G_pgpe_pstate_record.numSortCores = pad.fields.good_cores_in_sort;
- }
+ G_pgpe_pstate_record.numSortCores = pad.fields.good_cores_in_sort;
//Init OCC Shared SRAM
G_pgpe_pstate_record.pQuadState0 = (quad_state0_t*)G_pgpe_header_data->g_quad_status_addr;
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