summaryrefslogtreecommitdiffstats
path: root/import/chips/p9
diff options
context:
space:
mode:
authorPrasad Bg Ranganath <prasadbgr@in.ibm.com>2018-02-07 02:14:26 -0600
committerhostboot <hostboot@us.ibm.com>2018-03-22 14:07:32 -0500
commit287c727c72eafb217a206b24e08944c15135ea4a (patch)
treee28edc5e5ad33b88d3d44e7d327711be32009df2 /import/chips/p9
parent655c014813f5b17bc39841711084dba044fa30d5 (diff)
downloadtalos-hcode-287c727c72eafb217a206b24e08944c15135ea4a.tar.gz
talos-hcode-287c727c72eafb217a206b24e08944c15135ea4a.zip
PM: Fix Global Parameter Block and PGPE size checks in p9_hcode_image_build
Change-Id: Ied205304bd0c395b66963bffef1b58722ba04bea CQ:SW416422 CQ:SW416899 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/53517 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: RAHUL BATRA <rbatra@us.ibm.com> Reviewed-by: Prem Shanker Jha <premjha2@in.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Diffstat (limited to 'import/chips/p9')
-rw-r--r--import/chips/p9/procedures/hwp/lib/p9_hcd_memmap_base.H31
1 files changed, 21 insertions, 10 deletions
diff --git a/import/chips/p9/procedures/hwp/lib/p9_hcd_memmap_base.H b/import/chips/p9/procedures/hwp/lib/p9_hcd_memmap_base.H
index 4e025dcc..e6cc538a 100644
--- a/import/chips/p9/procedures/hwp/lib/p9_hcd_memmap_base.H
+++ b/import/chips/p9/procedures/hwp/lib/p9_hcd_memmap_base.H
@@ -80,7 +80,6 @@ HCD_CONST(TWO_MB, (2 * 1024 * 1024))
HCD_CONST(CME_SRAM_SIZE, (32 * ONE_KB))
HCD_CONST(OCC_SRAM_SIZE, (768 * ONE_KB))
-HCD_CONST(PGPE_IMAGE_SIZE, (44 * ONE_KB))
HCD_CONST(HOMER_MEMORY_SIZE, (4 * ONE_MB))
HCD_CONST(HOMER_OPMR_REGION_NUM, 0)
@@ -485,13 +484,12 @@ HCD_CONST(PGPE_BOOT_LOADER_RESET_ADDR_VAL, 0x40)
HCD_CONST(PGPE_INSTRUMENTATION_SIZE, (2 * ONE_KB))
/// PGPE Image
-
-HCD_CONST(PGPE_AUX_TASK_SIZE, (2 * ONE_KB))
HCD_CONST(PGPE_IMAGE_PPMR_OFFSET,
(PGPE_BOOT_LOADER_PPMR_OFFSET + PGPE_BOOT_LOADER_SIZE))
-HCD_CONST(PGPE_HCODE_SIZE, (40 * ONE_KB)) // PGPE Img + GPPB
+
HCD_CONST(PGPE_INT_VECTOR_SIZE, 384)
HCD_CONST(PGPE_HCODE_RESET_ADDR_VAL, 0x40)
+HCD_CONST(PGPE_DBG_PTR_AREA_SIZE, 64)
/// PGPE Header
@@ -540,18 +538,32 @@ HCD_CONST(PGPE_FLAG_PHANTOM_HALT_ENABLE, 0x0001)
/// PGPE Hcode
-//HCD_CONST(PGPE_HCODE_SIZE, (32 * ONE_KB)) //RTC158543
-HCD_CONST(PGPE_DBG_PTR_AREA_SIZE, 64)
-HCD_CONST(PGPE_GLOBAL_PSTATE_PARAM_BLOCK_SIZE, (4 * ONE_KB))
+HCD_CONST(PGPE_GLOBAL_PSTATE_PARAM_BLOCK_SIZE, (2 * ONE_KB))
+HCD_CONST(PGPE_AUX_TASK_SIZE, (2 * ONE_KB))
+
+// @todo RTC: 187758 The following is presently hardcoded in PGPE Hcode as
+// OCC_SHARED_SRAM_ADDR_LENGTH 2*1024. This should be consolodated
+// between platforms in a future release.
+HCD_CONST(PGPE_OCC_SHARED_SRAM_SIZE, (2 * ONE_KB))
+
+// @todo RTC: 187760 PGPE_IMAGE_SIZE really should use OCC_SRAM_PGPE_REGION_SIZE from
+// p9_hcd_memmap_occ_sram.H. However, this creates a circular dependency.
+// where rearrangement is presently prohibitive (OP9010, FIPS910).
+HCD_CONST(PGPE_IMAGE_SIZE, ((48 * ONE_KB) -
+ PGPE_AUX_TASK_SIZE -
+ PGPE_OCC_SHARED_SRAM_SIZE))
+
+HCD_CONST(PGPE_HCODE_SIZE, (PGPE_IMAGE_SIZE -
+ PGPE_GLOBAL_PSTATE_PARAM_BLOCK_SIZE))
/// Pstate Parameter Block + Pstate Table
HCD_CONST(OCC_PSTATE_PARAM_BLOCK_PPMR_OFFSET, (128 * ONE_KB))
-HCD_CONST(OCC_PSTATE_PARAM_BLOCK_SIZE, (8 * ONE_KB))
+HCD_CONST(OCC_PSTATE_PARAM_BLOCK_SIZE, (8 * ONE_KB)) // this is over allocated
HCD_CONST(OCC_PSTATE_PARAM_BLOCK_REGION_SIZE, (16 * ONE_KB))
HCD_CONST(PGPE_PSTATE_OUTPUT_TABLES_PPMR_OFFSET, (144 * ONE_KB))
-HCD_CONST(PGPE_PSTATE_OUTPUT_TABLES_SIZE, (8 * ONE_KB))
+HCD_CONST(PGPE_PSTATE_OUTPUT_TABLES_SIZE, (8 * ONE_KB)) // this is over allocated
HCD_CONST(PGPE_PSTATE_OUTPUT_TABLES_REGION_SIZE, (16 * ONE_KB))
HCD_CONST(OCC_WOF_TABLES_PPMR_OFFSET, (768 * ONE_KB))
@@ -668,7 +680,6 @@ HCD_CONST(FFDC_OCC_REGION_SIZE, (FFDC_OCC_REGION_HDR_SIZE +
FFDC_SHARED_SRAM_SIZE +
FFDC_OCC_REGS_SIZE))
-
//FFDC Summary Section
HCD_CONST(FFDC_SUMMARY_SUB_SEC_VALID, 1 ) // FFDC sub-sec valid mark
OpenPOWER on IntegriCloud