diff options
| author | Yue Du <daviddu@us.ibm.com> | 2018-03-13 16:10:22 -0500 |
|---|---|---|
| committer | hostboot <hostboot@us.ibm.com> | 2018-03-22 14:04:24 -0500 |
| commit | fb7e7a302989bf55d9437c6252962f14315463b9 (patch) | |
| tree | c9fdc3070bdc583a446956f088c3e011e66556c9 | |
| parent | 7cba0de6a952e06c2070fe513b25f28e7110d4c1 (diff) | |
| download | talos-hcode-fb7e7a302989bf55d9437c6252962f14315463b9.tar.gz talos-hcode-fb7e7a302989bf55d9437c6252962f14315463b9.zip | |
STOP: Fix Infinite Stacking up Stop Processing led by Entry Abort
Key_Cronus_Test=PM_REGRESS
Change-Id: Ib55a367b7e4e1c8b66e7473c696dceaa373b9a84
CQ: SW420964
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55802
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-by: RAHUL BATRA <rbatra@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
8 files changed, 72 insertions, 18 deletions
diff --git a/import/chips/p9/procedures/ppe_closed/cme/cme_panic_codes.h b/import/chips/p9/procedures/ppe_closed/cme/cme_panic_codes.h index 665d0c40..8c664dd8 100644 --- a/import/chips/p9/procedures/ppe_closed/cme/cme_panic_codes.h +++ b/import/chips/p9/procedures/ppe_closed/cme/cme_panic_codes.h @@ -70,7 +70,7 @@ CME_STOP_SPWU_PROTOCOL_ERROR = 0x1d06, CME_STOP_ENTRY_STOPCLK_FAILED = 0x1d08, CME_STOP_ENTRY_XSTOP_ERROR = 0x1d09, // NDD1 CME_STOP_ENTRY_TRAP_INJECT = 0x1d0a, -//_UNUSED_1d0d = 0x1d0d, +CME_STOP_ENTRY_HANDOFF_LESSTHAN5 = 0x1d0d, //_UNUSED_1d1c = 0x1d1c, //_UNUSED_1d1d = 0x1d1d, //_UNUSED_1d1e = 0x1d1e, diff --git a/import/chips/p9/procedures/ppe_closed/cme/iota_lnk_cfg.h b/import/chips/p9/procedures/ppe_closed/cme/iota_lnk_cfg.h index 430a935c..2bbf930c 100644 --- a/import/chips/p9/procedures/ppe_closed/cme/iota_lnk_cfg.h +++ b/import/chips/p9/procedures/ppe_closed/cme/iota_lnk_cfg.h @@ -38,7 +38,7 @@ #define PPE_DEBUG_PTRS_SIZE CME_DEBUG_PTRS_SIZE #define PPE_DUMP_PTR_PSTATE_SIZE 0x4C -#define PPE_DUMP_PTR_STOP_SIZE 0x28 +#define PPE_DUMP_PTR_STOP_SIZE 0x34 #define PPE_DUMP_PTR_COMMON_SIZE 0x8 #endif diff --git a/import/chips/p9/procedures/ppe_closed/cme/p9_cme_iota_main.c b/import/chips/p9/procedures/ppe_closed/cme/p9_cme_iota_main.c index 55a22848..00cc3753 100644 --- a/import/chips/p9/procedures/ppe_closed/cme/p9_cme_iota_main.c +++ b/import/chips/p9/procedures/ppe_closed/cme/p9_cme_iota_main.c @@ -39,7 +39,7 @@ CmePstateRecord G_cme_pstate_record __attribute__((section (".dump_ptr_pstate")) // CME Stop Header and Structure #include "p9_cme_stop.h" -CmeStopRecord G_cme_stop_record __attribute__((section (".dump_ptr_stop"))) = {{0}, {0}, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0}}; +CmeStopRecord G_cme_stop_record __attribute__((section (".dump_ptr_stop"))) = {{0}, {0}, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0}}; #if !DISABLE_PERIODIC_CORE_QUIESCE && (NIMBUS_DD_LEVEL == 20 || NIMBUS_DD_LEVEL == 21 || CUMULUS_DD_LEVEL == 10) CmeFitRecord G_cme_fit_record = {0, 0, 0, 0, 0xFFFFFFFF, 0}; diff --git a/import/chips/p9/procedures/ppe_closed/cme/pstate_cme/p9_cme_pstate.c b/import/chips/p9/procedures/ppe_closed/cme/pstate_cme/p9_cme_pstate.c index 3e4275d7..6f1a9b1a 100644 --- a/import/chips/p9/procedures/ppe_closed/cme/pstate_cme/p9_cme_pstate.c +++ b/import/chips/p9/procedures/ppe_closed/cme/pstate_cme/p9_cme_pstate.c @@ -85,10 +85,12 @@ int send_pig_packet(uint64_t data, uint32_t coreMask) // Read PPMPIG status CME_GETSCOM(PPM_PIG, coreMask, data_tmp); } - while (((ppm_pig_t)data_tmp).fields.intr_granted); + while ((((ppm_pig_t)data_tmp).fields.pending_source & 0x1)); // Send PIG packet CME_PUTSCOM(PPM_PIG, coreMask, data); + PK_TRACE_DBG("CME: Sending PIG[%x] at core[%x]", + (uint32_t)(data >> 32), coreMask); pk_critical_section_exit(&ctx); diff --git a/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop.h b/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop.h index 3483fced..4179877a 100644 --- a/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop.h +++ b/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop.h @@ -272,6 +272,8 @@ typedef struct uint8_t act_level[MAX_CORES_PER_CME]; // uint8_t above is processed by stb/lbz in asm, no additional shifting + // mark the start and the end of entry process + uint32_t entry_pending; // whether core is in running state, // used for aborted entry detection or filter wakeup core select in scom address uint32_t core_running; diff --git a/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_entry.c b/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_entry.c index 022eb4bc..795944e1 100755 --- a/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_entry.c +++ b/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_entry.c @@ -1244,8 +1244,9 @@ p9_cme_stop_entry() (core_wakeup << SHIFT32(17))); sync(); wrteei(0); - out32(CME_LCL_EIMR_OR, (BITS32(12, 6) | BITS32(20, 2))); + out32(CME_LCL_EIMR_OR, BITS32(10, 12)); wrteei(1); + #endif //=================== @@ -1419,7 +1420,7 @@ p9_cme_stop_entry() (core_wakeup << SHIFT32(17))); sync(); wrteei(0); - out32(CME_LCL_EIMR_OR, (BITS32(12, 6) | BITS32(20, 2))); + out32(CME_LCL_EIMR_OR, BITS32(10, 12)); wrteei(1); #endif @@ -1564,23 +1565,45 @@ p9_cme_stop_entry() { core_index = core_mask & 1; +#if DISABLE_STOP8 + + if (G_cme_stop_record.req_level[core_index] >= STOP_LEVEL_11) + +#else + if (G_cme_stop_record.req_level[core_index] >= STOP_LEVEL_8) + +#endif + { CME_PUTSCOM(CPPM_CPMMR_OR, core_mask, BIT64(10)); pig.fields.req_intr_type = PIG_TYPE3; G_cme_stop_record.core_blockpc |= core_mask; } - else + else if (G_cme_stop_record.req_level[core_index] >= STOP_LEVEL_5) { CME_PUTSCOM(CPPM_CPMMR_CLR, core_mask, BIT64(10)); pig.fields.req_intr_type = PIG_TYPE2; G_cme_stop_record.core_blockpc &= ~core_mask; } + else + { + PK_TRACE_ERR("ERROR: Core[%d] Handoff to SGPE with Requested Stop Level[%d]", + core_mask, G_cme_stop_record.req_level[core_index]); + PK_PANIC(CME_STOP_ENTRY_HANDOFF_LESSTHAN5); + } pig.fields.req_intr_payload = G_cme_stop_record.req_level[core_index]; // put PIG and Wakeup_Notify_Select back to back as possible send_pig_packet(pig.value, core_mask); + + do + { + CME_GETSCOM(PPM_PIG, core_mask, scom_data.value); + } + while (scom_data.words.lower & BIT64SH(39)); + CME_PUTSCOM(CPPM_CPMMR_OR, core_mask, BIT64(13)); PK_TRACE_DBG("Switch Core[%d] PPM wakeup to STOP-GPE via CPMMR[13]", core_mask); diff --git a/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_irq_handlers.c b/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_irq_handlers.c index 9c327afe..e64e6950 100644 --- a/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_irq_handlers.c +++ b/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_irq_handlers.c @@ -83,13 +83,20 @@ p9_cme_stop_pcwu_handler(void) { PK_TRACE_INF("PCWU Launching exit thread"); - out32(CME_LCL_EIMR_OR, BITS32(10, 12)); + out32(CME_LCL_EIMR_OR, BITS32(12, 10)); + g_eimr_override |= BITS64(12, 10); wrteei(1); + + // The actual exit sequence p9_cme_stop_exit(); } - // re-evaluate stop entry & exit enables - p9_cme_stop_eval_eimr_override(); + // in case abort, complete pending entry first + if (!G_cme_stop_record.entry_pending) + { + // re-evaluate stop entry & exit enables + p9_cme_stop_eval_eimr_override(); + } } @@ -181,13 +188,20 @@ p9_cme_stop_spwu_handler(void) { PK_TRACE_INF("SPWU Launching exit thread"); - out32(CME_LCL_EIMR_OR, BITS32(10, 12)); + out32(CME_LCL_EIMR_OR, BITS32(12, 10)); + g_eimr_override |= BITS64(12, 10); wrteei(1); + + // The actual exit sequence p9_cme_stop_exit(); } - // re-evaluate stop entry & exit enables - p9_cme_stop_eval_eimr_override(); + // in case abort, complete pending entry first + if (!G_cme_stop_record.entry_pending) + { + // re-evaluate stop entry & exit enables + p9_cme_stop_eval_eimr_override(); + } } @@ -198,12 +212,19 @@ p9_cme_stop_rgwu_handler(void) MARK_TRAP(STOP_RGWU_HANDLER) PK_TRACE_INF("RGWU Handler Trigger"); - out32(CME_LCL_EIMR_OR, BITS32(10, 12)); + out32(CME_LCL_EIMR_OR, BITS32(12, 10)); + g_eimr_override |= BITS64(12, 10); wrteei(1); + + // The actual exit sequence p9_cme_stop_exit(); - // re-evaluate stop entry & exit enables - p9_cme_stop_eval_eimr_override(); + // in case abort, complete pending entry first + if (!G_cme_stop_record.entry_pending) + { + // re-evaluate stop entry & exit enables + p9_cme_stop_eval_eimr_override(); + } } @@ -214,12 +235,18 @@ p9_cme_stop_enter_handler(void) MARK_TRAP(STOP_ENTER_HANDLER) PK_TRACE_INF("PM_ACTIVE Handler Trigger"); - out32(CME_LCL_EIMR_OR, BITS32(10, 12)); + // Abort Protection + out32(CME_LCL_EIMR_OR, BITS32(12, 10)); + g_eimr_override |= BITS64(12, 10); + G_cme_stop_record.entry_pending = 1; wrteei(1); // The actual entry sequence p9_cme_stop_entry(); + // Restore Abort Protection + G_cme_stop_record.entry_pending = 0; + // re-evaluate stop entry & exit enables p9_cme_stop_eval_eimr_override(); } diff --git a/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_threads.c b/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_threads.c index 58310c4c..119791ae 100644 --- a/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_threads.c +++ b/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_threads.c @@ -60,7 +60,7 @@ p9_cme_stop_core_error_handler(uint32_t core, uint32_t core_error, uint32_t pani void p9_cme_stop_eval_eimr_override() { - g_eimr_override &= ~(BITS64(12, 6) | BITS64(20, 2)); + g_eimr_override &= ~BITS64(12, 10); data64_t mask_irqs = {0}; mask_irqs.words.lower = 0; |

