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| author | Yue Du <daviddu@us.ibm.com> | 2017-01-09 16:57:46 -0600 |
|---|---|---|
| committer | Joshua Hunsberger <jahunsbe@us.ibm.com> | 2017-10-23 17:00:32 -0500 |
| commit | f36776ec79ecbe35a92e7afca46689b393ff2ac2 (patch) | |
| tree | 138733f09b606822bb3da89bd735dfa12531f864 | |
| parent | 1f90c49367906319574e629de4892a51ed85cb1a (diff) | |
| download | talos-hcode-f36776ec79ecbe35a92e7afca46689b393ff2ac2.tar.gz talos-hcode-f36776ec79ecbe35a92e7afca46689b393ff2ac2.zip | |
STOP: fix vcs workaround in STOP
Change-Id: Idb4b4ea67ff65b8a07ce3334ac93817a51b76531
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/34626
Reviewed-by: CHRISTOPHER M. RIEDL <cmriedl@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: ASHISH A. MORE <ashish.more@in.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
| -rw-r--r-- | import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_hcd_cache_chiplet_reset.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_hcd_cache_chiplet_reset.c b/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_hcd_cache_chiplet_reset.c index d5e530f4..1a4cdf61 100644 --- a/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_hcd_cache_chiplet_reset.c +++ b/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_hcd_cache_chiplet_reset.c @@ -82,7 +82,7 @@ p9_hcd_cache_chiplet_reset(uint32_t quad, uint32_t ex) GPE_PUTSCOM(GPE_SCOM_ADDR_QUAD(EQ_PPM_CGCR, quad), (BIT64(0) | BIT64(3))); PK_TRACE("Flip L2 glsmux to DPLL via QPPM_EXCGCR[34:35]"); -#if !HW388878_DD1_VCS_POWER_ON_IN_CHIPLET_RESET_FIX +#if HW388878_DD1_VCS_POWER_ON_IN_CHIPLET_RESET_FIX GPE_PUTSCOM(GPE_SCOM_ADDR_QUAD(EQ_QPPM_EXCGCR_OR, quad), BITS64(34, 2)); #else GPE_PUTSCOM(GPE_SCOM_ADDR_QUAD(EQ_QPPM_EXCGCR_OR, quad), ((uint64_t)ex << SHIFT64(35))); @@ -98,7 +98,7 @@ p9_hcd_cache_chiplet_reset(uint32_t quad, uint32_t ex) GPE_PUTSCOM(GPE_SCOM_ADDR_QUAD(EQ_PPM_CGCR, quad), BIT64(3)); PK_TRACE("Drop L2 glsmux reset via QPPM_EXCGCR[32:33]"); -#if !HW388878_DD1_VCS_POWER_ON_IN_CHIPLET_RESET_FIX +#if HW388878_DD1_VCS_POWER_ON_IN_CHIPLET_RESET_FIX GPE_PUTSCOM(GPE_SCOM_ADDR_QUAD(EQ_QPPM_EXCGCR_CLR, quad), BITS64(32, 2)); #else GPE_PUTSCOM(GPE_SCOM_ADDR_QUAD(EQ_QPPM_EXCGCR_CLR, quad), ((uint64_t)ex << SHIFT64(33))); |
