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authorDoug Gilbert <dgilbert@us.ibm.com>2017-09-14 11:53:05 -0500
committerJoshua Hunsberger <jahunsbe@us.ibm.com>2018-02-01 16:00:35 -0600
commite575814ad8c011fd2bc4bf9baad23da31095b7f8 (patch)
treed4808339cb3e2bcc983272cc1eb4d7ebe290d7b5
parentc80126c55637f4b32398c669d29de6cd814d592e (diff)
downloadtalos-hcode-e575814ad8c011fd2bc4bf9baad23da31095b7f8.tar.gz
talos-hcode-e575814ad8c011fd2bc4bf9baad23da31095b7f8.zip
Use HCode header timebase frequency for pk trace
Change-Id: Id873da7ccb96192eb69e4aa5cff60ad33c713024 Original-Change-Id: I34a9d8d1a003ae6b07b50039a9ea57ff9fd5af4d RTC: 179852 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/46227 Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com> Reviewed-by: Michael S. Floyd <mfloyd@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Juan R. Medina <jrmedina@us.ibm.com> Dev-Ready: Gregory S. Still <stillgs@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
-rw-r--r--import/chips/p9/procedures/ppe/iota/iota_trace.h4
-rw-r--r--import/chips/p9/procedures/ppe/pk/kernel/pk_api.h4
-rw-r--r--import/chips/p9/procedures/ppe/pk/kernel/pk_init.c10
-rw-r--r--import/chips/p9/procedures/ppe/pk/trace/pk_trace_core.c11
-rw-r--r--import/chips/p9/procedures/ppe_closed/cme/iota_app_cfg.h5
-rw-r--r--import/chips/p9/procedures/ppe_closed/cme/p9_cme_iota_main.c22
-rw-r--r--import/chips/p9/procedures/ppe_closed/cme/pk_app_cfg.h15
-rw-r--r--import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_header.h4
-rw-r--r--import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_main.c12
-rw-r--r--import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_main.C12
10 files changed, 70 insertions, 29 deletions
diff --git a/import/chips/p9/procedures/ppe/iota/iota_trace.h b/import/chips/p9/procedures/ppe/iota/iota_trace.h
index 7de82b15..a4bbb0f3 100644
--- a/import/chips/p9/procedures/ppe/iota/iota_trace.h
+++ b/import/chips/p9/procedures/ppe/iota/iota_trace.h
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER HCODE Project */
/* */
-/* COPYRIGHT 2017 */
+/* COPYRIGHT 2017,2018 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -172,7 +172,7 @@ void pk_trace_tiny(uint32_t i_parm);
void pk_trace_big(uint32_t i_hash_and_count,
uint64_t i_parm1, uint64_t i_parm2);
void pk_trace_binary(uint32_t i_hash_and_size, void* bufp);
-//void pk_trace_set_timebase(PkTimebase timebase);
+void pk_trace_set_freq(uint32_t i_freq);
diff --git a/import/chips/p9/procedures/ppe/pk/kernel/pk_api.h b/import/chips/p9/procedures/ppe/pk/kernel/pk_api.h
index b24f7042..44856407 100644
--- a/import/chips/p9/procedures/ppe/pk/kernel/pk_api.h
+++ b/import/chips/p9/procedures/ppe/pk/kernel/pk_api.h
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER HCODE Project */
/* */
-/* COPYRIGHT 2015,2017 */
+/* COPYRIGHT 2015,2018 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -995,6 +995,8 @@ void pk_trace_big(uint32_t i_hash_and_count,
void pk_trace_binary(uint32_t i_hash_and_size, void* bufp);
void pk_trace_set_timebase(PkTimebase timebase);
+// set the frequency (hz) of the timebase for trace timestamps
+void pk_trace_set_freq(uint32_t i_frequency);
/// Cast a pointer to another type, in a way that won't cause warnings
diff --git a/import/chips/p9/procedures/ppe/pk/kernel/pk_init.c b/import/chips/p9/procedures/ppe/pk/kernel/pk_init.c
index 07e3d282..b37c7d3e 100644
--- a/import/chips/p9/procedures/ppe/pk/kernel/pk_init.c
+++ b/import/chips/p9/procedures/ppe/pk/kernel/pk_init.c
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER HCODE Project */
/* */
-/* COPYRIGHT 2015,2017 */
+/* COPYRIGHT 2015,2018 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -150,6 +150,7 @@ pk_initialize(PkAddress kernel_stack,
__pk_kernel_stack = kernel_stack;
__pk_kernel_stack_size = kernel_stack_size;
+#if PK_TRACE_SUPPORT
#if PK_TIMER_SUPPORT
// Initialize the time queue sentinel as a circular queue, set the next
@@ -159,10 +160,10 @@ pk_initialize(PkAddress kernel_stack,
__pk_time_queue.cursor = 0;
__pk_time_queue.next_timeout = PK_TIMEBASE_MAX;
-#if PK_TRACE_SUPPORT
+#endif /* PK_TIMER_SUPPORT (timed callback)*/
//set the trace timebase HZ
- g_pk_trace_buf.hz = timebase_frequency_hz;
+ pk_trace_set_freq(timebase_frequency_hz);
if(initial_timebase != PK_TIMEBASE_CONTINUES)
{
@@ -177,7 +178,6 @@ pk_initialize(PkAddress kernel_stack,
#endif /* PK_TRACE_SUPPORT */
-#endif /* PK_TIMER_SUPPORT */
#if PK_THREAD_SUPPORT
@@ -212,7 +212,7 @@ pk_timebase_freq_set(uint32_t timebase_frequency_hz)
pk_set_timebase_rshift(timebase_frequency_hz);
#if PK_TRACE_SUPPORT
- g_pk_trace_buf.hz = timebase_frequency_hz;
+ pk_trace_set_freq(timebase_frequency_hz);
#endif
// Does the initial_timebase need to be reset?
return PK_OK;
diff --git a/import/chips/p9/procedures/ppe/pk/trace/pk_trace_core.c b/import/chips/p9/procedures/ppe/pk/trace/pk_trace_core.c
index 6ed84545..430e3985 100644
--- a/import/chips/p9/procedures/ppe/pk/trace/pk_trace_core.c
+++ b/import/chips/p9/procedures/ppe/pk/trace/pk_trace_core.c
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER HCODE Project */
/* */
-/* COPYRIGHT 2015,2017 */
+/* COPYRIGHT 2015,2018 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -62,7 +62,7 @@ PkTraceBuffer g_pk_trace_buf __attribute__ ((section (".sdata"))) =
trace_ppe_hash("PARTIAL TRACE ENTRY. HASH_ID = %d", PK_TRACE_HASH_PREFIX),
.size = PK_TRACE_SZ,
.max_time_change = PK_TRACE_MTBT,
- .hz = 500000000, //default. Actual is set in pk_init.c
+ .hz = 25000000, //Actula value set by pk_trace_set_freq()
.time_adj64 = 0,
.state.word64 = 0,
.cb = {0}
@@ -143,6 +143,7 @@ void pk_trace_timer_callback(void* arg)
pk_timer_schedule(&g_pk_trace_timer,
PK_TRACE_TIMER_PERIOD);
}
+#endif // PK_TIMER_SUPPORT (timed callback support)
// Use this function to synchronize the timebase between multiple PPEs.
// PPE A can send PPE B it's current timebase and then PPE B can set that
@@ -154,5 +155,9 @@ void pk_trace_set_timebase(PkTimebase timebase)
{
g_pk_trace_buf.time_adj64 = timebase - pk_timebase_get();
}
-#endif // PK_TIMER_SUPPORT
+
+void pk_trace_set_freq(uint32_t i_frequency)
+{
+ g_pk_trace_buf.hz = i_frequency;
+}
#endif // PK_TRACE_SUPPORT
diff --git a/import/chips/p9/procedures/ppe_closed/cme/iota_app_cfg.h b/import/chips/p9/procedures/ppe_closed/cme/iota_app_cfg.h
index d7bab97c..b6c5c070 100644
--- a/import/chips/p9/procedures/ppe_closed/cme/iota_app_cfg.h
+++ b/import/chips/p9/procedures/ppe_closed/cme/iota_app_cfg.h
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER HCODE Project */
/* */
-/* COPYRIGHT 2017 */
+/* COPYRIGHT 2017,2018 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -32,6 +32,7 @@
// parts of pk that are included require this
// Having two app_cfg files seems confusing
#include "pk_app_cfg.h"
+#include "cme_register_addresses.h"
#define PLATFORM_PANIC_CODES_H "cme_panic_codes.h"
#include "pk_panic_codes.h"
@@ -56,5 +57,7 @@
// Main "execution" stack size in bytes, must be multiple of 8
#define IOTA_EXECUTION_STACK_SIZE 2048
+#define LOCAL_TIMEBASE_REGISTER CME_LCL_TBR
+
#endif
diff --git a/import/chips/p9/procedures/ppe_closed/cme/p9_cme_iota_main.c b/import/chips/p9/procedures/ppe_closed/cme/p9_cme_iota_main.c
index 68d43222..550c4c1a 100644
--- a/import/chips/p9/procedures/ppe_closed/cme/p9_cme_iota_main.c
+++ b/import/chips/p9/procedures/ppe_closed/cme/p9_cme_iota_main.c
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER HCODE Project */
/* */
-/* COPYRIGHT 2017 */
+/* COPYRIGHT 2017,2018 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -414,7 +414,6 @@ void fit_handler()
void dec_handler()
{
- // Currently not available
}
void ext_handler(uint32_t task_idx)
@@ -445,11 +444,24 @@ IOTA_TASK(ext_handler), // bits 0-6 default
int main()
{
+ cmeHeader_t* cmeHeader = (cmeHeader_t*)(CME_SRAM_HEADER_ADDR);
+
// Register Timer Handlers
IOTA_DEC_HANDLER(dec_handler);
IOTA_FIT_HANDLER(fit_handler);
- PK_TRACE("E>CME MAIN");
+ // Local timebase frequency comes from an attribute.
+ uint32_t trace_timebase = cmeHeader->g_cme_timebase_hz;
+
+ if(0 == trace_timebase)
+ {
+ // if the attribute is not defined, use the default
+ trace_timebase = PPE_TIMEBASE_HZ;
+ }
+
+ pk_trace_set_freq(trace_timebase);
+
+ PK_TRACE(">CME MAIN");
// Clear SPRG0
ppe42_app_ctx_set(0);
@@ -466,8 +478,8 @@ int main()
PK_TRACE("Set Watch Dog Timer Rate to 6 and FIT Timer Rate to 8");
out32(CME_LCL_TSEL, (BITS32(1, 2) | BIT32(4)));
- PK_TRACE("Enable DEC/FIT/Watchdog Timer");
- mtspr(SPRN_TCR, (TCR_DIE | TCR_FIE));
+ PK_TRACE("DEC every cycle, Enable FIT Timer");
+ mtspr(SPRN_TCR, (TCR_DS | TCR_FIE));
p9_cme_stop_init();
diff --git a/import/chips/p9/procedures/ppe_closed/cme/pk_app_cfg.h b/import/chips/p9/procedures/ppe_closed/cme/pk_app_cfg.h
index feb15e3c..573507ee 100644
--- a/import/chips/p9/procedures/ppe_closed/cme/pk_app_cfg.h
+++ b/import/chips/p9/procedures/ppe_closed/cme/pk_app_cfg.h
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER HCODE Project */
/* */
-/* COPYRIGHT 2015,2017 */
+/* COPYRIGHT 2015,2018 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -151,13 +151,16 @@
// --------------------
-// If we are using the external timebase then assume
-// a frequency of 37.5Mhz. Otherwise, the default is to use
-// the decrementer as a timebase and assume a frequency of 600MHz
-// In product code, this value will be IPL-time configurable.
+// The actual timebase is provided in an ipl time attribute.
+// If the attribute is not set up then PPE_TIMEBASE_HZ is used as a default.
+// If we are using the external timebase register, then assume a nominal
+// frequency of nest_freq/64 (2GHz/64).
+// If APPCFG_USE_EXT_TIMEBASE is not defined then use the internal
+// decrementer as a timebase.
#ifdef APPCFG_USE_EXT_TIMEBASE
- #define PPE_TIMEBASE_HZ 37500000
+ // Nest freq / 64 - use a nominal 2GH as the default
+ #define PPE_TIMEBASE_HZ 31250000
#else
#define PPE_TIMEBASE_HZ 600000000
#endif
diff --git a/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_header.h b/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_header.h
index 08112721..5ca57027 100644
--- a/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_header.h
+++ b/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_header.h
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER HCODE Project */
/* */
-/* COPYRIGHT 2016,2017 */
+/* COPYRIGHT 2016,2018 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -42,7 +42,7 @@ typedef struct
uint32_t g_pgpe_build_ver; // Build Version
uint16_t g_pgpe_qm_flags; // QM Flags
uint16_t g_pgpe_reserve1; // Reserve field
- uint32_t g_pgpe_reserve2; // Reserve field
+ uint32_t g_pgpe_timebase_hz; // Reserve field
uint32_t* g_pgpe_gppb_sram_addr; // Offset to Global P State Parameter Block
uint32_t g_pgpe_hcode_length; // Length of PGPE Hcode
uint32_t* g_pgpe_gppb_mem_offset; // Offset to start of Global PS Param Block wrt start of HOMER.
diff --git a/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_main.c b/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_main.c
index 38f5b010..d1fff7ca 100644
--- a/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_main.c
+++ b/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_main.c
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER HCODE Project */
/* */
-/* COPYRIGHT 2015,2017 */
+/* COPYRIGHT 2015,2018 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -144,6 +144,7 @@ EXTERNAL_IRQ_TABLE_END
#define PGPE_THREAD_PRIORITY_ACTUATE_PSTATES 2
uint8_t G_kernel_stack[KERNEL_STACK_SIZE];
+extern uint32_t g_pgpe_timebase_hz __attribute__ ((section (".pgpe_image_header")));
//Thread Stacks
uint8_t G_p9_pgpe_thread_process_requests_stack[THREAD_STACK_SIZE];
@@ -175,11 +176,18 @@ main(int argc, char** argv)
PGPE_PANIC_AND_TRACE(PGPE_BAD_DD_LEVEL);
}
+ uint32_t timebase = g_pgpe_timebase_hz;
+
+ if(0 == timebase)
+ {
+ timebase = PPE_TIMEBASE_HZ;
+ }
+
// Initializes kernel data (stack, threads, timebase, timers, etc.)
pk_initialize((PkAddress)G_kernel_stack,
KERNEL_STACK_SIZE,
0,
- PPE_TIMEBASE_HZ);
+ timebase);
// Read OCC_SCRATCH[PGPE_DEBUG_TRAP_ENABLE]
uint32_t occScr2 = in32(OCB_OCCS2);
diff --git a/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_main.C b/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_main.C
index 1295170e..c9fe7597 100644
--- a/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_main.C
+++ b/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_main.C
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER HCODE Project */
/* */
-/* COPYRIGHT 2015,2017 */
+/* COPYRIGHT 2015,2018 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -154,11 +154,19 @@ main(int argc, char** argv)
asm volatile ("trap");
}
+ sgpeHeader_t* pSgpeImgHdr = (sgpeHeader_t*)(OCC_SRAM_SGPE_HEADER_ADDR);
+ uint32_t timebase = pSgpeImgHdr->g_sgpe_timebase_hz;
+
+ if(0 == timebase)
+ {
+ timebase = PPE_TIMEBASE_HZ;
+ }
+
// Initializes kernel data (stack, threads, timebase, timers, etc.)
pk_initialize((PkAddress)G_kernel_stack,
KERNEL_STACK_SIZE,
0,
- PPE_TIMEBASE_HZ);
+ timebase);
fapi2::ReturnCode fapiRc = fapi2::plat_TargetsInit();
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