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| author | Rahul Batra <rbatra@us.ibm.com> | 2017-12-20 13:31:00 -0600 |
|---|---|---|
| committer | Joshua Hunsberger <jahunsbe@us.ibm.com> | 2018-02-01 16:26:34 -0600 |
| commit | e398c9fbc5d22f7d76429dfef3976479c32b49e6 (patch) | |
| tree | 4446fd909abc2add9ff5f6d2b9c5e89054ca4d41 | |
| parent | d1074ccb939836f990074dc1d5323226d06aa22d (diff) | |
| download | talos-hcode-e398c9fbc5d22f7d76429dfef3976479c32b49e6.tar.gz talos-hcode-e398c9fbc5d22f7d76429dfef3976479c32b49e6.zip | |
PM: VDM Prolonged Droop Fix
Key_Cronus_Test=PM_REGRESS
Change-Id: I59877c525798d4846b6b7b3335e39f3f32c7ca38
Original-Change-Id: I73d38d6029a5b84590d1081855e12c145a535869
CQ: SW413192
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/51338
Reviewed-by: Michael S. Floyd <mfloyd@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
| -rw-r--r-- | import/chips/p9/procedures/hwp/lib/p9_pm_hcd_flags.h | 15 | ||||
| -rw-r--r-- | import/chips/p9/procedures/ppe_closed/cme/p9_cme_main.c | 7 |
2 files changed, 15 insertions, 7 deletions
diff --git a/import/chips/p9/procedures/hwp/lib/p9_pm_hcd_flags.h b/import/chips/p9/procedures/hwp/lib/p9_pm_hcd_flags.h index bcdaec6c..8e57ed3f 100644 --- a/import/chips/p9/procedures/hwp/lib/p9_pm_hcd_flags.h +++ b/import/chips/p9/procedures/hwp/lib/p9_pm_hcd_flags.h @@ -51,6 +51,7 @@ enum PM_GPE_OCCFLG_DEFS PGPE_PSTATE_PROTOCOL_ACTIVATE = 1, // @todo PGPE Hcode dependencies PGPE_SAFE_MODE = 2, PM_COMPLEX_SUSPEND = 3, + PGPE_PROLONGED_DROOP_WORKAROUND_ACTIVE = 7, SGPE_ACTIVE = 8, SGPE_IGNORE_STOP_CONTROL = 9, SGPE_IGNORE_STOP_ACTION = 10, @@ -64,6 +65,9 @@ enum PM_GPE_OCCFLG_DEFS PIB_I2C_MASTER_ENGINE_2_LOCK_BIT1 = 19, //BIT0 ored BIT1 gives the field PIB_I2C_MASTER_ENGINE_3_LOCK_BIT0 = 20, //BIT0 ored BIT1 gives the field PIB_I2C_MASTER_ENGINE_3_LOCK_BIT1 = 21, //BIT0 ored BIT1 gives the field + PGPE_PM_RESET_SUPPRESS = 27, + WOF_HCODE_MODE_BIT0 = 28, + WOF_HCODE_MODE_BIT1 = 29, REQUESTED_ACTIVE_QUAD_UPDATE = 30, REQUEST_OCC_SAFE_STATE = 31 }; @@ -89,6 +93,7 @@ enum PM_GPE_OCC_SCRATCH2_DEFS L3_CONTAINED_MODE = 11, PGPE_SAFE_MODE_ERROR = 12, PM_DEBUG_HALT_ENABLE = 15, + CORE_THROTTLE_CONTINUOUS_CHANGE_ENABLE = 16, PGPE_OP_TRACE_DISABLE = 24, PGPE_OP_TRACE_MEM_MODE = 25 }; @@ -135,6 +140,16 @@ enum PM_CME_SCRATCH_DEFS // +//Enum form of CPPM_CSAR +// +enum PM_CPPM_CSAR_DEFS +{ + CPPM_CSAR_DISABLE_CME_NACK_ON_PROLONGED_DROOP = 29, + CPPM_CSAR_PSTATE_HCODE_ERROR_INJECT = 30, + CPPM_CSAR_STOP_HCODE_ERROR_INJECT = 31 +}; + +// //Enum for of PPM Register Bits for FW Usage // enum PM_PPM_FW_FLAGS diff --git a/import/chips/p9/procedures/ppe_closed/cme/p9_cme_main.c b/import/chips/p9/procedures/ppe_closed/cme/p9_cme_main.c index 8b7f66c8..48beb30a 100644 --- a/import/chips/p9/procedures/ppe_closed/cme/p9_cme_main.c +++ b/import/chips/p9/procedures/ppe_closed/cme/p9_cme_main.c @@ -204,13 +204,6 @@ main(int argc, char** argv) PK_PANIC(CME_UIH_DISABLED_NOT_LAST_LVL); } - if (IRQ_VEC_PRTY_CHECK != 0xFFFFFFFFFFFFFFFF) - { - PK_TRACE_ERR("ERROR: IRQ_VEC_PRTY_CHECK=0x%08x%08x Should Be All Ones. HALT CME!", - IRQ_VEC_PRTY_CHECK); - PK_PANIC(CME_UIH_NOT_ALL_IN_PRTY_GROUP); - } - p9_cme_stop_init(); // Initialize the thread control block for G_p9_cme_stop_exit_thread |
