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| author | Yue Du <daviddu@us.ibm.com> | 2017-11-30 22:17:52 -0600 |
|---|---|---|
| committer | Joshua Hunsberger <jahunsbe@us.ibm.com> | 2018-02-01 15:48:02 -0600 |
| commit | d53628f9258903f1d3acd281ebe6464255cd9fcc (patch) | |
| tree | 6850af47fc3027c18bc1f629355b5a64b272637b | |
| parent | 8b674ea9b538be75741d552e2a33a34bf0e34589 (diff) | |
| download | talos-hcode-d53628f9258903f1d3acd281ebe6464255cd9fcc.tar.gz talos-hcode-d53628f9258903f1d3acd281ebe6464255cd9fcc.zip | |
STOP: Turning on NCU tlbie pacing by default
Key_Cronus_Test=PM_REGRESS
Based on Commit 48817
Change-Id: Id003f4acb7c4084e791ce9d71ea776f7c1a3227a
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/50339
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com>
Dev-Ready: YUE DU <daviddu@us.ibm.com>
Reviewed-by: LUKE MURRAY <murrayl@us.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
| -rw-r--r-- | import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_hcd_cache_scominit.c | 20 |
1 files changed, 19 insertions, 1 deletions
diff --git a/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_hcd_cache_scominit.c b/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_hcd_cache_scominit.c index de0bf642..9223019f 100644 --- a/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_hcd_cache_scominit.c +++ b/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_hcd_cache_scominit.c @@ -168,6 +168,10 @@ p9_hcd_cache_scominit(uint32_t quad, uint32_t m_ex, int is_stop8) // p9_ncu_scom: EX_NCU_MODE_REG // EXP.NC.NCMISC.NCSCOMS.SYSMAP_SM_NOT_LG_SEL + // EXP.NC.NCMISC.NCSCOMS.TLBIE_PACING_CNT_EN + // EXP.NC.NCMISC.NCSCOMS.TLBIE_DEC_RATE 0x4 + // EXP.NC.NCMISC.NCSCOMS.TLBIE_INC_RATE 0x3 + // EXP.NC.NCMISC.NCSCOMS.TLBIE_CNT_THRESH 0x4 // EXP.NC.NCMISC.NCSCOMS.SKIP_GRP_SCOPE_EN // EXP.NC.NCMISC.NCSCOMS.SYSMAP_PB_CHIP_ADDR_EXT_MASK_EN @@ -182,7 +186,14 @@ p9_hcd_cache_scominit(uint32_t quad, uint32_t m_ex, int is_stop8) #if NIMBUS_DD_LEVEL != 10 - scom_data.words.lower |= BIT64SH(51); + scom_data.words.upper &= ~(BITS32(11, 21)); + scom_data.words.upper |= BIT32(10); + scom_data.words.upper |= BIT32(16); + scom_data.words.upper |= BITS32(25, 2); + + scom_data.words.lower &= ~(BITS64SH(32, 3)); + scom_data.words.lower |= BIT64SH(32); + scom_data.words.lower |= BIT64SH(51); if (attr_proc_fabric_pump_mode_chip_is_node) { @@ -210,6 +221,7 @@ p9_hcd_cache_scominit(uint32_t quad, uint32_t m_ex, int is_stop8) // EXP.NC.NCMISC.NCSCOMS.TLBIE_STALL_THRESHOLD // EXP.NC.NCMISC.NCSCOMS.TLBIE_STALL_CMPLT_CNT // EXP.NC.NCMISC.NCSCOMS.TLBIE_STALL_DELAY_CNT + // EXP.NC.NCMISC.NCSCOMS.TLBIE_PACING_MST_DLY_EN GPE_GETSCOM(GPE_SCOM_ADDR_EX(EX_NCU_MODE_REG3, quad, ex_index), scom_data.value); @@ -217,6 +229,12 @@ p9_hcd_cache_scominit(uint32_t quad, uint32_t m_ex, int is_stop8) scom_data.words.upper &= ~BITS32(0, 16); scom_data.words.upper |= (BITS32(0, 3) | BIT32(5) | BITS32(12, 4)); +#if NIMBUS_DD_LEVEL != 10 + + scom_data.words.upper |= BIT32(16); + +#endif + GPE_PUTSCOM(GPE_SCOM_ADDR_EX(EX_NCU_MODE_REG3, quad, ex_index), scom_data.value); } |
