summaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorGreg Still <stillgs@us.ibm.com>2018-01-15 06:50:50 -0600
committerJoshua Hunsberger <jahunsbe@us.ibm.com>2018-02-01 16:20:33 -0600
commitc52286a7b9b7155f773509d211d325497d649d2e (patch)
tree1f804388b11a95056e72eb31da778cce1580810d
parent64ebc59c3a72561edbe8038d54b5f42355b5188b (diff)
downloadtalos-hcode-c52286a7b9b7155f773509d211d325497d649d2e.tar.gz
talos-hcode-c52286a7b9b7155f773509d211d325497d649d2e.zip
WOF/Pstates: HOMER VFRT rounding fix and Safe Mode Freq -> Pstate fix
- Matches rounding done in VFRT generation process to correlate expected frequencies - Elevated a compressed VFRT translation dump (only VDN<=35% and QID=6) for better debugability. Still tries to limit the HB trace space. - Dealt with old, stale todos (comments removal). - Resolve the way that the parameter block computes the miminum frequency (Safe) Pstate by rounding FAST (truncation). Previously, it rounded SLOW (larger PS) - Made PGPE calculation match (it previously subtracted 1 from the Pstate) and truncated. - The above led to the Pstate values being different by 2 (+1 and -1). - Fixed PGPE bug where safe Pstate has to be the starting value for auction computations - Added default value for ATTR_FREQ_PROC_REFCLOCK_KHZ being 0 for Hostboot CI Key_Cronus_Test=PM_REGRESS Change-Id: I83b1a01f931b87eb04082a457377925888ea78bf CQ: SW413621 CQ: SW411729 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/51918 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com> Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com> Reviewed-by: RAHUL BATRA <rbatra@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
-rw-r--r--import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_pstate.c34
1 files changed, 19 insertions, 15 deletions
diff --git a/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_pstate.c b/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_pstate.c
index 59c1b1ea..36e0143d 100644
--- a/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_pstate.c
+++ b/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_pstate.c
@@ -82,8 +82,11 @@ void p9_pgpe_pstate_init()
if (G_gppb->safe_frequency_khz)
{
- G_pgpe_pstate_record.safePstate = (G_gppb->reference_frequency_khz - G_gppb->safe_frequency_khz -
- (G_gppb->frequency_step_khz)) / G_gppb->frequency_step_khz;
+ // As the safe frequency (eg Pstate) needs to be FASTER than the core floor,
+ // truncate the resultant computation to the lower integer value (Pstate)
+ // to have the higher frequency
+ G_pgpe_pstate_record.safePstate = (G_gppb->reference_frequency_khz - G_gppb->safe_frequency_khz) /
+ G_gppb->frequency_step_khz;
}
else
{
@@ -96,16 +99,16 @@ void p9_pgpe_pstate_init()
for (q = 0; q < MAX_QUADS; q++)
{
- G_pgpe_pstate_record.psClipMax[q] = G_gppb->operating_points_set[VPD_PT_SET_BIASED_SYSP][POWERSAVE].pstate;
+ G_pgpe_pstate_record.psClipMax[q] = G_pgpe_pstate_record.safePstate;
G_pgpe_pstate_record.psClipMin[q] = G_gppb->operating_points_set[VPD_PT_SET_BIASED_SYSP][ULTRA].pstate;
- G_pgpe_pstate_record.quadPSComputed[q] = G_gppb->operating_points_set[VPD_PT_SET_BIASED_SYSP][POWERSAVE].pstate;
- G_pgpe_pstate_record.globalPSComputed = G_gppb->operating_points_set[VPD_PT_SET_BIASED_SYSP][POWERSAVE].pstate;
- G_pgpe_pstate_record.quadPSTarget[q] = G_gppb->operating_points_set[VPD_PT_SET_BIASED_SYSP][POWERSAVE].pstate;
- G_pgpe_pstate_record.globalPSTarget = G_gppb->operating_points_set[VPD_PT_SET_BIASED_SYSP][POWERSAVE].pstate;
- G_pgpe_pstate_record.quadPSCurr[q] = G_gppb->operating_points_set[VPD_PT_SET_BIASED_SYSP][POWERSAVE].pstate;
- G_pgpe_pstate_record.globalPSCurr = G_gppb->operating_points_set[VPD_PT_SET_BIASED_SYSP][POWERSAVE].pstate;
- G_pgpe_pstate_record.quadPSNext[q] = G_gppb->operating_points_set[VPD_PT_SET_BIASED_SYSP][POWERSAVE].pstate;
- G_pgpe_pstate_record.globalPSNext = G_gppb->operating_points_set[VPD_PT_SET_BIASED_SYSP][POWERSAVE].pstate;
+ G_pgpe_pstate_record.quadPSComputed[q] = G_pgpe_pstate_record.safePstate;
+ G_pgpe_pstate_record.globalPSComputed = G_pgpe_pstate_record.safePstate;
+ G_pgpe_pstate_record.quadPSTarget[q] = G_pgpe_pstate_record.safePstate;
+ G_pgpe_pstate_record.globalPSTarget = G_pgpe_pstate_record.safePstate;
+ G_pgpe_pstate_record.quadPSCurr[q] = G_pgpe_pstate_record.safePstate;
+ G_pgpe_pstate_record.globalPSCurr = G_pgpe_pstate_record.safePstate;
+ G_pgpe_pstate_record.quadPSNext[q] = G_pgpe_pstate_record.safePstate;
+ G_pgpe_pstate_record.globalPSNext = G_pgpe_pstate_record.safePstate;
for (c = (q * CORES_PER_QUAD); c < (q + 1)*CORES_PER_QUAD; c++)
{
@@ -204,8 +207,9 @@ void p9_pgpe_pstate_do_auction()
if (G_pgpe_pstate_record.activeQuads & QUAD_MASK(q))
{
//Go through all the cores in this quad with pending request
- //and find the lowest numbered PState
- G_pgpe_pstate_record.quadPSComputed[q] = G_gppb->operating_points_set[VPD_PT_SET_BIASED_SYSP][POWERSAVE].pstate;
+ //and find the lowest numbered PState. Pstate cannot be greater that
+ //the safe Pstate.
+ G_pgpe_pstate_record.quadPSComputed[q] = G_pgpe_pstate_record.safePstate;
for (c = FIRST_CORE_FROM_QUAD(q); c < LAST_CORE_FROM_QUAD(q); c++)
{
@@ -230,7 +234,7 @@ void p9_pgpe_pstate_do_auction()
}
//Global PState Auction
- G_pgpe_pstate_record.globalPSComputed = G_gppb->operating_points_set[VPD_PT_SET_BIASED_SYSP][POWERSAVE].pstate;
+ G_pgpe_pstate_record.globalPSComputed = G_pgpe_pstate_record.safePstate;
for (q = 0; q < MAX_QUADS; q++)
{
@@ -303,7 +307,7 @@ void p9_pgpe_pstate_apply_clips()
}
//Global PState Auction
- G_pgpe_pstate_record.globalPSTarget = G_gppb->operating_points_set[VPD_PT_SET_BIASED_SYSP][POWERSAVE].pstate;
+ G_pgpe_pstate_record.globalPSTarget = G_pgpe_pstate_record.safePstate;
for (q = 0; q < MAX_QUADS; q++)
{
OpenPOWER on IntegriCloud