STOP/PState: SGPE/PGPE Error Handling Support

Upon PGPE Halt
1) SGPE performs STOP Recovery Trigger to set
a malfunction alert and removes PGPE IPCs
from wake-up decisions.
2) CME is interrupted by QPPM OCC Heartbeat
Lost that PGPE stopped updating

Upon SGPE Halt
1) PGPE moves to Psafe
2) PGPE performs STOP Recovery Trigger to set
a malfunction alert.

This commit also includes SGPE Panic Code
Cleanup such as debug halt support.
However PGPE Panic Code Cleanup is dealt in
a different commit

Key_Cronus_Test=PM_REGRESS

Change-Id: I8625d9c0a9097ea1bb351aacdd21f05a00b88644
Original-Change-Id: I893aa1ef21d2f684722b8c10dbbeb92b9505c1c4
CQ: SW410252
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49275
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Michael S. Floyd <mfloyd@us.ibm.com>
Reviewed-by: RAHUL BATRA <rbatra@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>

9 files changed, 115 insertions, 49 deletions

diff --git a/import/chips/p9/common/pmlib/include/stop_sgpe_cme_api.h b/import/chips/p9/common/pmlib/include/stop_sgpe_cme_api.h
index 1df005c0..6924b5fb 100644
--- a/import/chips/p9/common/pmlib/include/stop_sgpe_cme_api.h
+++ b/import/chips/p9/common/pmlib/include/stop_sgpe_cme_api.h
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* OpenPOWER HCODE Project                                                */
 /*                                                                        */
-/* COPYRIGHT 2015,2017                                                    */
+/* COPYRIGHT 2015,2018                                                    */
 /* [+] International Business Machines Corp.                              */
 /*                                                                        */
 /*                                                                        */
@@ -47,6 +47,7 @@ enum SGPE_STOP_IRQ_PAYLOAD_MASKS
     TYPE2_PAYLOAD_SUSPEND_BOTH_MASK        = 0x300,
     TYPE2_PAYLOAD_SUSPEND_ACK_MASK         = 0x080,
 
+    TYPE5_PAYLOAD_CME_ERROR                = 0x3FF,
     TYPE6_PAYLOAD_EXIT_EVENT               = 0x00F
 };
 
diff --git a/import/chips/p9/procedures/ppe_closed/cme/cme_p9c10.mk b/import/chips/p9/procedures/ppe_closed/cme/cme_p9c10.mk
index 78bf0c8e..89bd15d5 100644
--- a/import/chips/p9/procedures/ppe_closed/cme/cme_p9c10.mk
+++ b/import/chips/p9/procedures/ppe_closed/cme/cme_p9c10.mk
@@ -5,7 +5,7 @@
 #
 # OpenPOWER HCODE Project
 #
-# COPYRIGHT 2016,2017
+# COPYRIGHT 2016,2018
 # [+] International Business Machines Corp.
 #
 #
@@ -34,7 +34,7 @@ $(IMAGE)_KERNEL:=__IOTA__
 $(IMAGE)_COMMONFLAGS = -DNIMBUS_DD_LEVEL=0
 $(IMAGE)_COMMONFLAGS+= -DCUMULUS_DD_LEVEL=10
 
-$(IMAGE)_COMMONFLAGS+= -DPK_TRACE_LEVEL=2
+$(IMAGE)_COMMONFLAGS+= -DPK_TRACE_LEVEL=1
 
 $(IMAGE)_COMMONFLAGS+= -DLAB_P9_TUNING=0
 $(IMAGE)_COMMONFLAGS+= -DEPM_P9_TUNING=0
diff --git a/import/chips/p9/procedures/ppe_closed/cme/cme_p9n21.mk b/import/chips/p9/procedures/ppe_closed/cme/cme_p9n21.mk
index 0109aac8..9fa33816 100644
--- a/import/chips/p9/procedures/ppe_closed/cme/cme_p9n21.mk
+++ b/import/chips/p9/procedures/ppe_closed/cme/cme_p9n21.mk
@@ -5,7 +5,7 @@
 #
 # OpenPOWER HCODE Project
 #
-# COPYRIGHT 2017
+# COPYRIGHT 2017,2018
 # [+] International Business Machines Corp.
 #
 #
@@ -37,7 +37,7 @@ $(IMAGE)_KERNEL:=__IOTA__
 $(IMAGE)_COMMONFLAGS = -DNIMBUS_DD_LEVEL=21
 $(IMAGE)_COMMONFLAGS+= -DCUMULUS_DD_LEVEL=0
 
-$(IMAGE)_COMMONFLAGS+= -DPK_TRACE_LEVEL=2
+$(IMAGE)_COMMONFLAGS+= -DPK_TRACE_LEVEL=1
 
 $(IMAGE)_COMMONFLAGS+= -DLAB_P9_TUNING=0
 $(IMAGE)_COMMONFLAGS+= -DEPM_P9_TUNING=0
diff --git a/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop.h b/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop.h
index f86bbc99..b80eb67f 100644
--- a/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop.h
+++ b/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop.h
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* OpenPOWER HCODE Project                                                */
 /*                                                                        */
-/* COPYRIGHT 2015,2017                                                    */
+/* COPYRIGHT 2015,2018                                                    */
 /* [+] International Business Machines Corp.                              */
 /*                                                                        */
 /*                                                                        */
@@ -149,20 +149,30 @@
 #define PERV_OPCG_CAPT2        0x20030012
 #define PERV_CPLT_STAT0        0x20000100
 
+
+
+#define PK_OPTIONAL_DEBUG_HALT(panic_code) \
+    if(in32(CME_LCL_FLAGS) & BIT32(CME_FLAGS_PM_DEBUG_HALT_ENABLE)) {PK_PANIC(panic_code);}
+
+
 #if NIMBUS_DD_LEVEL == 10
 #define CME_STOP_CORE_ERROR_HANDLER(core, core_error, panic_code) \
     PK_PANIC(panic_code);
 #else
 #define CME_STOP_CORE_ERROR_HANDLER(core, core_error, panic_code) \
-    p9_cme_stop_core_error_handler(core, core_error, panic_code);
+    p9_cme_stop_core_error_handler(core, core_error, panic_code); \
+    PK_OPTIONAL_DEBUG_HALT(panic_code)
 #endif
 
+
 #define CME_PM_EXIT_DELAY         \
     asm volatile ("tw 0, 0, 0");  \
     asm volatile ("tw 0, 0, 0");  \
     asm volatile ("tw 0, 0, 0");  \
     asm volatile ("tw 0, 0, 0");
 
+
+
 enum CME_IRQ_VECTORS
 {
     // if auto mask eimr.spwu else never mask eimr.spwu
diff --git a/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_threads.c b/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_threads.c
index 835255a3..8c60174f 100644
--- a/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_threads.c
+++ b/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_threads.c
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* OpenPOWER HCODE Project                                                */
 /*                                                                        */
-/* COPYRIGHT 2015,2017                                                    */
+/* COPYRIGHT 2015,2018                                                    */
 /* [+] International Business Machines Corp.                              */
 /*                                                                        */
 /*                                                                        */
@@ -30,6 +30,7 @@ extern CmeStopRecord G_cme_stop_record;
 extern CmeRecord G_cme_record;
 
 
+
 void
 p9_cme_stop_core_error_handler(uint32_t core, uint32_t core_error, uint32_t panic_code)
 {
@@ -47,8 +48,6 @@ p9_cme_stop_core_error_handler(uint32_t core, uint32_t core_error, uint32_t pani
     uint32_t           cme_lcl_debug = in32(CME_LCL_DBG);
     out32(CME_LCL_DBG, cme_lcl_debug | BIT32(16));
     out32(CME_LCL_DBG, cme_lcl_debug);
-
-    //PK_PANIC(panic_code); // enable if desire halt on error
 }
 
 void
diff --git a/import/chips/p9/procedures/ppe_closed/lib/hcodelibfiles.mk b/import/chips/p9/procedures/ppe_closed/lib/hcodelibfiles.mk
index 30c2d01d..55cd38dc 100644
--- a/import/chips/p9/procedures/ppe_closed/lib/hcodelibfiles.mk
+++ b/import/chips/p9/procedures/ppe_closed/lib/hcodelibfiles.mk
@@ -5,7 +5,7 @@
 #
 # OpenPOWER HCODE Project
 #
-# COPYRIGHT 2015,2017
+# COPYRIGHT 2015,2018
 # [+] International Business Machines Corp.
 #
 #
@@ -42,6 +42,7 @@
 ##########################################################################
 
 HCODE_C_SOURCES = \
+	p9_stop_recovery_trigger.c \
 	p9_hcd_block_copy.c \
 	p9_dd1_doorbell_wr.c
 
diff --git a/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_irq.h b/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_irq.h
index 6147fd9c..9865d105 100644
--- a/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_irq.h
+++ b/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_irq.h
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* OpenPOWER HCODE Project                                                */
 /*                                                                        */
-/* COPYRIGHT 2015,2017                                                    */
+/* COPYRIGHT 2015,2018                                                    */
 /* [+] International Business Machines Corp.                              */
 /*                                                                        */
 /*                                                                        */
@@ -95,9 +95,6 @@ extern const uint64_t ext_irq_vectors_gpe[NUM_EXT_IRQ_PRTY_LEVELS][2];
                                 IRQ_VEC_PRTY4_GPE2 | \
                                 IRQ_VEC_PRTY5_GPE2 )      // Note, we do not incl PRTY6 here!
 
-#define IRQ_VEC_PRTY_CHECK    ( IRQ_VEC_ALL_OUR_IRQS | \
-                                IRQ_VEC_PRTY6_GPE2 )      // This should be 0xFFFFFFFFFFFFFFFF
-
 extern uint8_t    g_current_prty_level;
 extern uint8_t    g_oimr_stack[NUM_EXT_IRQ_PRTY_LEVELS];
 extern int        g_oimr_stack_ctr;
diff --git a/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_irq.h b/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_irq.h
index 70d5bbd2..a417c7bc 100644
--- a/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_irq.h
+++ b/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_irq.h
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* OpenPOWER HCODE Project                                                */
 /*                                                                        */
-/* COPYRIGHT 2015,2017                                                    */
+/* COPYRIGHT 2015,2018                                                    */
 /* [+] International Business Machines Corp.                              */
 /*                                                                        */
 /*                                                                        */
@@ -61,23 +61,26 @@
 extern const uint64_t ext_irq_vectors_sgpe[NUM_EXT_IRQ_PRTY_LEVELS][2];
 
 // Group0: Non-task hi-prty IRQs
-// (@todo RTC166767 reenable gpe2_halt/checkstop_gpe3 when ready)
-#define IRQ_VEC_PRTY0_SGPE   (uint64_t)(0x0000000000000000)
+#define IRQ_VEC_PRTY0_SGPE   (uint64_t)(0x0100800000000000)
 // Group1: ipi3_high
 #define IRQ_VEC_PRTY1_SGPE   (uint64_t)(0x0000000800000000)
 // Group2: pig_type2
 #define IRQ_VEC_PRTY2_SGPE   (uint64_t)(0x0000000000010000)
 // Group3: pig_type6
 #define IRQ_VEC_PRTY3_SGPE   (uint64_t)(0x0000000000001000)
-// Group3: pig_type5
+// Group4: pig_type5
 #define IRQ_VEC_PRTY4_SGPE   (uint64_t)(0x0000000000002000)
-// Group4: pig_type3
+// Group5: pig_type3
 #define IRQ_VEC_PRTY5_SGPE   (uint64_t)(0x0000000000008000)
-// Group5: ipi3_low
+// Group6: ipi3_low
 #define IRQ_VEC_PRTY6_SGPE   (uint64_t)(0x0000000000000004)
-// Group6: We should never detect these
-#define IRQ_VEC_PRTY7_SGPE   (uint64_t)(0x0100800000000000)
-//#define IRQ_VEC_PRTY7_SGPE   (uint64_t)(0xFEFF7FF7FFFE6FFB)
+// Group7: We should never detect these
+#define OVERRIDE_OTHER_ENGINES_IRQS 0
+#if OVERRIDE_OTHER_ENGINES_IRQS == 1
+    #define IRQ_VEC_PRTY7_SGPE  (uint64_t)(0xFEFF7FF7FFFE4FFB) // Other instances' IRQs
+#else
+    #define IRQ_VEC_PRTY7_SGPE  (uint64_t)(0x0000000000000000) // Other instances' IRQs
+#endif
 
 #define IRQ_VEC_ALL_OUR_IRQS  ( IRQ_VEC_PRTY0_SGPE | \
                                 IRQ_VEC_PRTY1_SGPE | \
@@ -87,16 +90,6 @@ extern const uint64_t ext_irq_vectors_sgpe[NUM_EXT_IRQ_PRTY_LEVELS][2];
                                 IRQ_VEC_PRTY5_SGPE | \
                                 IRQ_VEC_PRTY6_SGPE )      // Note, we do not incl PRTY7 here!
 
-// This should be 0xFFFFFFFFFFFFFFFF
-#define IRQ_VEC_PRTY_CHECK  ( IRQ_VEC_PRTY0_SGPE | \
-                              IRQ_VEC_PRTY1_SGPE | \
-                              IRQ_VEC_PRTY2_SGPE | \
-                              IRQ_VEC_PRTY3_SGPE | \
-                              IRQ_VEC_PRTY4_SGPE | \
-                              IRQ_VEC_PRTY5_SGPE | \
-                              IRQ_VEC_PRTY6_SGPE | \
-                              IRQ_VEC_PRTY7_SGPE )
-
 extern uint8_t       g_current_prty_level;
 extern uint8_t       g_oimr_stack[NUM_EXT_IRQ_PRTY_LEVELS];
 extern int           g_oimr_stack_ctr;
diff --git a/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_stop_irq_handlers.c b/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_stop_irq_handlers.c
index 634b6fb9..b36a1036 100644
--- a/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_stop_irq_handlers.c
+++ b/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_stop_irq_handlers.c
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* OpenPOWER HCODE Project                                                */
 /*                                                                        */
-/* COPYRIGHT 2015,2017                                                    */
+/* COPYRIGHT 2015,2018                                                    */
 /* [+] International Business Machines Corp.                              */
 /*                                                                        */
 /*                                                                        */
@@ -24,8 +24,11 @@
 /* IBM_PROLOG_END_TAG                                                     */
 
 #include "p9_sgpe_stop.h"
-#include "p9_sgpe_stop_enter_marks.h"
 #include "p9_sgpe_irq.h"
+#include "p9_sgpe_stop_enter_marks.h"
+#include "p9_stop_recovery_trigger.h"
+
+
 
 SgpeStopRecord G_sgpe_stop_record __attribute__((section (".dump_ptrs"))) =
 {
@@ -61,7 +64,7 @@ SgpeStopRecord G_sgpe_stop_record __attribute__((section (".dump_ptrs"))) =
 #endif
     },
     // wof status
-    {0, 0, 0},
+    {0, 0, 0, 0},
     // fit status
     {0, 0},
     // semaphores
@@ -69,6 +72,7 @@ SgpeStopRecord G_sgpe_stop_record __attribute__((section (".dump_ptrs"))) =
 };
 
 
+
 void
 p9_sgpe_fit_handler()
 {
@@ -105,6 +109,39 @@ p9_sgpe_fit_handler()
 
 
 void
+p9_sgpe_pgpe_halt_handler(void* arg, PkIrqId irq)
+{
+    PkMachineContext   ctx;
+
+    PK_TRACE_INF("WARNING: PGPE Has Halted");
+    PK_OPTIONAL_DEBUG_HALT(SGPE_PGPE_HALT_DETECTED);
+    out32(OCB_OISR0_CLR, BIT32(7));
+
+    G_sgpe_stop_record.wof.update_pgpe = IPC_SGPE_PGPE_UPDATE_PGPE_HALTED;
+
+    if (in32(OCB_OCCFLG2) & BIT32(STOP_RECOVERY_TRIGGER_ENABLE))
+    {
+        p9_stop_recovery_trigger();
+    }
+
+    pk_irq_vec_restore(&ctx);
+}
+
+void
+p9_sgpe_checkstop_handler(void* arg, PkIrqId irq)
+{
+    PkMachineContext   ctx;
+
+    PK_TRACE_INF("WARNING: System Checkstop Detected");
+    PK_OPTIONAL_DEBUG_HALT(SGPE_SYSTEM_CHECKSTOP_DETECTED);
+    out32(OCB_OISR0_CLR, BIT32(16));
+
+    pk_irq_vec_restore(&ctx);
+}
+
+
+
+void
 p9_sgpe_stop_suspend_db1_cme(uint32_t qloop, uint32_t msgid)
 {
     uint32_t  cstart    = 0;
@@ -360,11 +397,11 @@ p9_sgpe_pig_cpayload_parser(const uint32_t type)
             }
 
             // read payload on core has interrupt pending
-            if (type == 2)
+            if (type == PIG_TYPE2)
             {
                 cpayload = in32(OCB_OPIT2CN(cindex));
             }
-            else if (type == 3)
+            else if (type == PIG_TYPE3)
             {
                 cpayload = in32(OCB_OPIT3CN(cindex));
             }
@@ -376,8 +413,44 @@ p9_sgpe_pig_cpayload_parser(const uint32_t type)
 
             PK_TRACE_INF("Core[%d] sent PIG Type[%d] with Payload [%x]", cindex, type, cpayload);
 
+            if (type == PIG_TYPE5)
+            {
+
+#if DISABLE_STOP8
+
+                if ((cpayload != TYPE5_PAYLOAD_EXIT_RCLK) &&
+                    (cpayload != (TYPE5_PAYLOAD_ENTRY_RCLK | STOP_LEVEL_11)))
+                {
+
+#endif
+
+                    // Errors detected by the CME for any reason (STOP or Pstate)
+                    // will cause the CME to halt. The CME halt is communicated via
+                    // a PCB Interrupt Type 5 to SGPE. SGPE will, in turn, set OCC
+                    // LFIR[cme_error_notify] (2) as an FFDC marker for this type of error.
+                    GPE_PUTSCOM(OCB_OCCLFIR_OR, BIT64(2));
+
+                    if (cpayload == TYPE5_PAYLOAD_CME_ERROR)
+                    {
+                        PK_TRACE_ERR("ERROR: CME Halt Due to Error");
+                        PK_PANIC(SGPE_PIG_TYPE5_CME_ERROR);
+                    }
+                    else
+                    {
+                        PK_TRACE_ERR("ERROR: Undefined Type5 Payload");
+                        PK_PANIC(SGPE_PIG_TYPE5_PAYLOAD_INVALID);
+                    }
+
+#if DISABLE_STOP8
+
+                }
+
+#endif
+
+            }
+
             // if not hardware pig and is an suspend ack pig
-            if ((type == 2) &&
+            if ((type == PIG_TYPE2) &&
                 ((~cpayload) & TYPE2_PAYLOAD_HARDWARE_WAKEUP) &&
                 (cpayload & TYPE2_PAYLOAD_SUSPEND_ACK_MASK))
             {
@@ -748,16 +821,8 @@ p9_sgpe_pig_cpayload_parser(const uint32_t type)
 
             if (center & BIT32(0))
             {
-                if (type == 2)
-                {
-                    scom_data.words.upper = SSH_ACT_LV5_COMPLETE;
-                }
-                else
-                {
-                    scom_data.words.upper = SSH_ACT_LV5_CONTINUE;
-                }
-
                 PK_TRACE("Update STOP history: in core[%d] stop level 5", cindex);
+                scom_data.words.upper = SSH_ACT_LV5_COMPLETE;
                 GPE_PUTSCOM_VAR(PPM_SSHSRC, CORE_ADDR_BASE, cindex, 0, scom_data.value);
 
                 G_sgpe_stop_record.group.core[VECTOR_ACTIVE] &= ~BIT32(cindex);