talos-hcode/import/chips/p9/procedures/hwp, branch 07-25-2019

Img Build: Updated STOP API version to reflect SPR self save availability.

2019-12-19T09:58:19+00:00

Commit version field of associated with self save restore and cpu save API. This is part of the solution identified to address version mismatch and missing commits pertaining to STOP on open power side. Change-Id: I462d84b13e93752813fc2e4bb32d0ee7753ed6ac Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/77523 Tested-by: Jenkins Server Tested-by: Hostboot CI Tested-by: FSP CI Jenkins Tested-by: HWSV CI Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA Reviewed-by: Gregory S Still Reviewed-by: Jennifer A Stofer

PM: Fix DB0 Hang

2019-09-05T09:01:28+00:00

Key_Cronus_Test=PM_REGRESS Change-Id: I706ec7b87e777b736153d5765ced0a3f6cea5d96 CQ: SW470688 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/81266 Tested-by: Jenkins Server Tested-by: PPE CI Tested-by: Cronus HW CI Tested-by: Hostboot CI Tested-by: FSP CI Jenkins Tested-by: HWSV CI Reviewed-by: YUE DU Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA Reviewed-by: Jennifer A Stofer

OCC assisted PGPE, SGPE Error Logging

2019-08-12T09:05:27+00:00

Support basic infrastructure to - create an error log - add trace to the error log - add any user data section to the error log - add callouts to the error log - commit the error log - fix size issues and alignment exceptions - Fixes .. trace buffer parsing, repetitive xgpe logs, added PVR & PIR to log - Fixed severity, removed demo trigger code files RTC: 198654 Change-Id: Ie9842d2631863132ee456d421f0974cf9ade76ce Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/75078 Tested-by: Jenkins Server Tested-by: Hostboot CI Tested-by: FSP CI Jenkins Reviewed-by: Gregory S Still Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA Reviewed-by: Jennifer A Stofer

PM: WOV(OCS) HW Procedures Changes (1/2)

2019-06-14T15:53:14+00:00

1st commit in the series of 2 commits for WOV(Over Current Sampling, OCS) Commit 1: WOV(OCS) HW procedures updates Commit 2: WOV(OCS) PGPE Hcode updates Key_Cronus_Test=PM_REGRESS HW-Image-Prereq: Ieabbc383d2bbbd1df8cf5a2ed5b503c860518cd8 Change-Id: I6234f0f60b9ed57b8b144159f3fe9c0b756df1e3 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/70513 Tested-by: Jenkins Server Tested-by: PPE CI Tested-by: Cronus HW CI Tested-by: Hostboot CI Tested-by: FSP CI Jenkins Tested-by: HWSV CI Reviewed-by: Gregory S. Still Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA Reviewed-by: Jennifer A Stofer

VDM(Part 3): Image build changes for quad level VDM

2019-05-09T15:53:39+00:00

Commit accomplishes following: - enables CME booting using new CPMR layout - copies new definition of poundw to LPSPB - enables quad level LPSPB - implements new CPMR layout that supports customized LPSPB. - for old VPD version, retains old CPMR layout Change-Id: I66a13579e0edbc046226db259a736416e1e5c268 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/75272 Tested-by: FSP CI Jenkins Tested-by: Jenkins Server Tested-by: HWSV CI Tested-by: PPE CI Tested-by: Hostboot CI Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA Reviewed-by: Gregory S. Still Reviewed-by: Jennifer A. Stofer

VDM(Part 2): CME hcode support for per quad VDM.

2019-04-30T15:18:49+00:00

If per quad VDM is enabled by hcode image build through CME header, CME downloads local pstate parameter block and repair rings in second block copy. If per quad VDM is not enabled CME retains legacy behavior. Key_Cronus_Test=PM_REGRESS Change-Id: I97112b6816657a8201d7b8122bca01909ca20aa5 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/69971 Tested-by: Jenkins Server Tested-by: HWSV CI Tested-by: Cronus HW CI Tested-by: Hostboot CI Tested-by: FSP CI Jenkins Reviewed-by: Gregory S. Still Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA Reviewed-by: Jennifer A. Stofer

PPB: Refactor pstate parameter block

2019-03-09T05:52:07+00:00

Key_Cronus_Test=PM_REGRESS CQ:SW458304 Change-Id: Ia854423e663919a192a8fd271f2656d7d7469406 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/70365 Tested-by: FSP CI Jenkins Tested-by: Jenkins Server Tested-by: Hostboot CI Reviewed-by: Prem Shanker Jha Tested-by: Cronus HW CI Reviewed-by: Gregory S. Still Reviewed-by: Jennifer A. Stofer

Removing check on sbe region fence

2019-02-04T16:49:00+00:00

This fence is not implemented in Axone. Change-Id: I5585616c40f20b7a4a1cbc3e4869ec656428e4b9 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/70285 Tested-by: FSP CI Jenkins Tested-by: Jenkins Server Tested-by: HWSV CI Reviewed-by: SRINIVAS V. POLISETTY Reviewed-by: Soma Bhanutej Reviewed-by: Jennifer A. Stofer

VDM(Part 1): Introduced new members in CME and CPMR image headers

2019-01-26T16:41:52+00:00

commit introduces new members in CPMR and CME image headers. These fields will be utilised in subsequent commits to facilitate and execute downloading of LPSPB customized for a quad. Key_Cronus_Test=PM_REGRESS Change-Id: I9af8f2e6c2570a4bb0ea6a95a458b30b7e25273e Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/69964 Tested-by: Jenkins Server Tested-by: Hostboot CI Tested-by: Cronus HW CI Tested-by: FSP CI Jenkins Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA Reviewed-by: Gregory S. Still Reviewed-by: Jennifer A. Stofer

PGPE: WOV HW procs and Global Parm updates (2/3)

2019-01-26T01:24:14+00:00

2nd commit in the series of 3 commits for Workload Optimized Voltage(WOV) Commit 1. Adds WOV attributes Commit 2(Hostboot). WOV HW procedures changes and global parm updates Commit 3(Hcode). PGPE Hcode changes for WOV(undervolting only) feature Key_Cronus_Test=PM_REGRESS HW-Image-Prereq: Iaad4fb8cdff7840ec971f866757492f6e9b2cb87 CMVC-Prereq: 1073981 Change-Id: I07f716f5d12809b8c6efdf76bf545e467cf839d8 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/69464 Tested-by: HWSV CI Tested-by: Jenkins Server Tested-by: Hostboot CI Tested-by: Cronus HW CI Tested-by: FSP CI Jenkins Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA Reviewed-by: Gregory S. Still Reviewed-by: Jennifer A. Stofer