From 941522d6c3e2c621f0687479d39e7dfc888c23bc Mon Sep 17 00:00:00 2001 From: rth Date: Wed, 14 Jan 1998 23:10:50 +0000 Subject: * alias.c: Change all uses of gen_rtx(FOO...) to gen_rtx_FOO; change gen_rtx(expr...) to gen_rtx_fmt_foo(expr...). * caller-save.c, calls.c, combine.c, cse.c: Likewise. * dwarf2out.c, except.c, explow.c, expmed.c, expr.c: Likewise. * final.c, flow.c, function.c, genpeep.c, haifa-sched.c: Likewise. * halfpic.c, integrate.c, jump.c, local-alloc.c, loop.c: Likewise. * profile.c, recog.c, reg-stack.c, regclass.c, regmove.c: Likewise. * reload.c, reload1.c, reorg.c, sched.c, stmt.c, stupid.c: Likewise. * unroll.c, varasm.c: Likewise. * config/alpha/alpha.c, config/alpha/alpha.md: Likewise. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@17357 138bc75d-0d04-0410-961f-82ee72b054a4 --- gcc/recog.c | 51 ++++++++++++++++++++++++++++++++++----------------- 1 file changed, 34 insertions(+), 17 deletions(-) (limited to 'gcc/recog.c') diff --git a/gcc/recog.c b/gcc/recog.c index 5b268571936..a2d2489357a 100644 --- a/gcc/recog.c +++ b/gcc/recog.c @@ -1,5 +1,5 @@ /* Subroutines used by or related to instruction recognition. - Copyright (C) 1987, 1988, 1991-6, 1997 Free Software Foundation, Inc. + Copyright (C) 1987, 1988, 91-6, 1997 Free Software Foundation, Inc. This file is part of GNU CC. @@ -20,8 +20,8 @@ Boston, MA 02111-1307, USA. */ #include "config.h" -#include "rtl.h" #include +#include "rtl.h" #include "insn-config.h" #include "insn-attr.h" #include "insn-flags.h" @@ -43,8 +43,7 @@ Boston, MA 02111-1307, USA. */ /* Import from final.c: */ extern rtx alter_subreg (); -int strict_memory_address_p (); -int memory_address_p (); +static rtx *find_single_use_1 PROTO((rtx, rtx *)); /* Nonzero means allow operands to be volatile. This should be 0 if you are generating rtl, such as if you are calling @@ -260,8 +259,8 @@ apply_change_group () { int j; - newpat = gen_rtx (PARALLEL, VOIDmode, - gen_rtvec (XVECLEN (pat, 0) - 1)); + newpat = gen_rtx_PARALLEL (VOIDmode, + gen_rtvec (XVECLEN (pat, 0) - 1)); for (j = 0; j < XVECLEN (newpat, 0); j++) XVECEXP (newpat, 0, j) = XVECEXP (pat, 0, j); } @@ -365,9 +364,10 @@ validate_replace_rtx_1 (loc, from, to, object) if (prev_changes != num_changes && CONSTANT_P (XEXP (x, 0))) { validate_change (object, loc, - gen_rtx (GET_RTX_CLASS (code) == 'c' ? code - : swap_condition (code), - GET_MODE (x), XEXP (x, 1), XEXP (x, 0)), + gen_rtx_fmt_ee (GET_RTX_CLASS (code) == 'c' ? code + : swap_condition (code), + GET_MODE (x), XEXP (x, 1), + XEXP (x, 0)), 1); x = *loc; code = GET_CODE (x); @@ -413,7 +413,7 @@ validate_replace_rtx_1 (loc, from, to, object) rtx new = simplify_unary_operation (code, GET_MODE (x), to, GET_MODE (from)); if (new == 0) - new = gen_rtx (CLOBBER, GET_MODE (x), const0_rtx); + new = gen_rtx_CLOBBER (GET_MODE (x), const0_rtx); validate_change (object, loc, new, 1); return; @@ -442,7 +442,7 @@ validate_replace_rtx_1 (loc, from, to, object) GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))) - MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))); - new = gen_rtx (MEM, mode, plus_constant (XEXP (to, 0), offset)); + new = gen_rtx_MEM (mode, plus_constant (XEXP (to, 0), offset)); MEM_VOLATILE_P (new) = MEM_VOLATILE_P (to); RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (to); MEM_IN_STRUCT_P (new) = MEM_IN_STRUCT_P (to); @@ -493,8 +493,8 @@ validate_replace_rtx_1 (loc, from, to, object) pos %= GET_MODE_BITSIZE (wanted_mode); - newmem = gen_rtx (MEM, wanted_mode, - plus_constant (XEXP (to, 0), offset)); + newmem = gen_rtx_MEM (wanted_mode, + plus_constant (XEXP (to, 0), offset)); RTX_UNCHANGING_P (newmem) = RTX_UNCHANGING_P (to); MEM_VOLATILE_P (newmem) = MEM_VOLATILE_P (to); MEM_IN_STRUCT_P (newmem) = MEM_IN_STRUCT_P (to); @@ -505,6 +505,9 @@ validate_replace_rtx_1 (loc, from, to, object) } break; + + default: + break; } fmt = GET_RTX_FORMAT (code); @@ -627,6 +630,9 @@ find_single_use_1 (dest, loc) case MEM: case SUBREG: return find_single_use_1 (dest, &XEXP (x, 0)); + + default: + break; } /* If it wasn't one of the common cases above, check each expression and @@ -819,10 +825,18 @@ general_operand (op, mode) register rtx y = XEXP (op, 0); if (! volatile_ok && MEM_VOLATILE_P (op)) return 0; + if (GET_CODE (y) == ADDRESSOF) + return 1; /* Use the mem's mode, since it will be reloaded thus. */ mode = GET_MODE (op); GO_IF_LEGITIMATE_ADDRESS (mode, y, win); } + + /* Pretend this is an operand for now; we'll run force_operand + on its replacement in fixup_var_refs_1. */ + if (code == ADDRESSOF) + return 1; + return 0; win: @@ -1058,6 +1072,9 @@ memory_address_p (mode, addr) enum machine_mode mode; register rtx addr; { + if (GET_CODE (addr) == ADDRESSOF) + return 1; + GO_IF_LEGITIMATE_ADDRESS (mode, addr, win); return 0; @@ -1560,7 +1577,7 @@ adj_offsettable_operand (op, offset) if (CONSTANT_ADDRESS_P (y)) { - new = gen_rtx (MEM, GET_MODE (op), plus_constant_for_output (y, offset)); + new = gen_rtx_MEM (GET_MODE (op), plus_constant_for_output (y, offset)); RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (op); return new; } @@ -1580,7 +1597,7 @@ adj_offsettable_operand (op, offset) } } - new = gen_rtx (MEM, GET_MODE (op), plus_constant_for_output (y, offset)); + new = gen_rtx_MEM (GET_MODE (op), plus_constant_for_output (y, offset)); RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (op); return new; } @@ -1666,7 +1683,7 @@ constrain_operands (insn_code_num, strict) earlyclobber[opno] = 0; /* A unary operator may be accepted by the predicate, but it - is irrelevant for matching contraints. */ + is irrelevant for matching constraints. */ if (GET_RTX_CLASS (GET_CODE (op)) == '1') op = XEXP (op, 0); @@ -1975,7 +1992,7 @@ constrain_operands (insn_code_num, strict) } /* Return 1 iff OPERAND (assumed to be a REG rtx) - is a hard reg in class CLASS when its regno is offsetted by OFFSET + is a hard reg in class CLASS when its regno is offset by OFFSET and changed to mode MODE. If REG occupies multiple hard regs, all of them must be in CLASS. */ -- cgit v1.2.1