diff options
Diffstat (limited to 'gcc/config/s390/s390.md')
| -rw-r--r-- | gcc/config/s390/s390.md | 164 |
1 files changed, 164 insertions, 0 deletions
diff --git a/gcc/config/s390/s390.md b/gcc/config/s390/s390.md index 91caa4a1422..8c3708769a6 100644 --- a/gcc/config/s390/s390.md +++ b/gcc/config/s390/s390.md @@ -3976,6 +3976,18 @@ slg\t%0,%2" [(set_attr "op_type" "RRE,RXY")]) +(define_insn "*subdi3_cc2" + [(set (reg 33) + (compare (match_operand:DI 1 "register_operand" "0,0") + (match_operand:DI 2 "general_operand" "d,m"))) + (set (match_operand:DI 0 "register_operand" "=d,d") + (minus:DI (match_dup 1) (match_dup 2)))] + "s390_match_ccmode (insn, CCL3mode) && TARGET_64BIT" + "@ + slgr\t%0,%2 + slg\t%0,%2" + [(set_attr "op_type" "RRE,RXY")]) + (define_insn "*subdi3_cconly" [(set (reg 33) (compare (minus:DI (match_operand:DI 1 "register_operand" "0,0") @@ -3988,6 +4000,17 @@ slg\t%0,%2" [(set_attr "op_type" "RRE,RXY")]) +(define_insn "*subdi3_cconly2" + [(set (reg 33) + (compare (match_operand:DI 1 "register_operand" "0,0") + (match_operand:DI 2 "general_operand" "d,m"))) + (clobber (match_scratch:DI 0 "=d,d"))] + "s390_match_ccmode (insn, CCL3mode) && TARGET_64BIT" + "@ + slgr\t%0,%2 + slg\t%0,%2" + [(set_attr "op_type" "RRE,RXY")]) + (define_insn "*subdi3_64" [(set (match_operand:DI 0 "register_operand" "=d,d") (minus:DI (match_operand:DI 1 "register_operand" "0,0") @@ -4111,6 +4134,19 @@ sly\t%0,%2" [(set_attr "op_type" "RR,RX,RXY")]) +(define_insn "*subsi3_cc2" + [(set (reg 33) + (compare (match_operand:SI 1 "register_operand" "0,0,0") + (match_operand:SI 2 "general_operand" "d,R,T"))) + (set (match_operand:SI 0 "register_operand" "=d,d,d") + (minus:SI (match_dup 1) (match_dup 2)))] + "s390_match_ccmode (insn, CCL3mode)" + "@ + slr\t%0,%2 + sl\t%0,%2 + sly\t%0,%2" + [(set_attr "op_type" "RR,RX,RXY")]) + (define_insn "*subsi3_cconly" [(set (reg 33) (compare (minus:SI (match_operand:SI 1 "register_operand" "0,0,0") @@ -4124,6 +4160,18 @@ sly\t%0,%2" [(set_attr "op_type" "RR,RX,RXY")]) +(define_insn "*subsi3_cconly2" + [(set (reg 33) + (compare (match_operand:SI 1 "register_operand" "0,0,0") + (match_operand:SI 2 "general_operand" "d,R,T"))) + (clobber (match_scratch:SI 0 "=d,d,d"))] + "s390_match_ccmode (insn, CCL3mode)" + "@ + slr\t%0,%2 + sl\t%0,%2 + sly\t%0,%2" + [(set_attr "op_type" "RR,RX,RXY")]) + (define_insn "*subsi3_sign" [(set (match_operand:SI 0 "register_operand" "=d,d") (minus:SI (match_operand:SI 1 "register_operand" "0,0") @@ -4339,6 +4387,17 @@ slbg\\t%0,%2" [(set_attr "op_type" "RRE,RXY")]) +(define_expand "adddicc" + [(match_operand:DI 0 "register_operand" "") + (match_operand 1 "comparison_operator" "") + (match_operand:DI 2 "register_operand" "") + (match_operand:DI 3 "const_int_operand" "")] + "TARGET_64BIT" + "if (!s390_expand_addcc (GET_CODE (operands[1]), + s390_compare_op0, s390_compare_op1, + operands[0], operands[2], + operands[3])) FAIL; DONE;") + ; ; addsicc instruction pattern(s). ; @@ -4397,6 +4456,111 @@ slb\\t%0,%2" [(set_attr "op_type" "RRE,RXY")]) +(define_expand "addsicc" + [(match_operand:SI 0 "register_operand" "") + (match_operand 1 "comparison_operator" "") + (match_operand:SI 2 "register_operand" "") + (match_operand:SI 3 "const_int_operand" "")] + "TARGET_CPU_ZARCH" + "if (!s390_expand_addcc (GET_CODE (operands[1]), + s390_compare_op0, s390_compare_op1, + operands[0], operands[2], + operands[3])) FAIL; DONE;") + +; +; scond instruction pattern(s). +; + +(define_insn_and_split "*sconddi" + [(set (match_operand:DI 0 "register_operand" "=&d") + (match_operand:DI 1 "s390_alc_comparison" "")) + (clobber (reg:CC 33))] + "TARGET_64BIT" + "#" + "&& reload_completed" + [(set (match_dup 0) (const_int 0)) + (parallel + [(set (match_dup 0) (plus:DI (plus:DI (match_dup 0) (match_dup 0)) + (match_dup 1))) + (clobber (reg:CC 33))])] + "" + [(set_attr "op_type" "NN")]) + +(define_insn_and_split "*scondsi" + [(set (match_operand:SI 0 "register_operand" "=&d") + (match_operand:SI 1 "s390_alc_comparison" "")) + (clobber (reg:CC 33))] + "TARGET_CPU_ZARCH" + "#" + "&& reload_completed" + [(set (match_dup 0) (const_int 0)) + (parallel + [(set (match_dup 0) (plus:SI (plus:SI (match_dup 0) (match_dup 0)) + (match_dup 1))) + (clobber (reg:CC 33))])] + "" + [(set_attr "op_type" "NN")]) + +(define_insn_and_split "*sconddi_neg" + [(set (match_operand:DI 0 "register_operand" "=&d") + (match_operand:DI 1 "s390_slb_comparison" "")) + (clobber (reg:CC 33))] + "TARGET_64BIT" + "#" + "&& reload_completed" + [(set (match_dup 0) (const_int 0)) + (parallel + [(set (match_dup 0) (minus:DI (minus:DI (match_dup 0) (match_dup 0)) + (match_dup 1))) + (clobber (reg:CC 33))]) + (parallel + [(set (match_dup 0) (neg:DI (match_dup 0))) + (clobber (reg:CC 33))])] + "" + [(set_attr "op_type" "NN")]) + +(define_insn_and_split "*scondsi_neg" + [(set (match_operand:SI 0 "register_operand" "=&d") + (match_operand:SI 1 "s390_slb_comparison" "")) + (clobber (reg:CC 33))] + "TARGET_CPU_ZARCH" + "#" + "&& reload_completed" + [(set (match_dup 0) (const_int 0)) + (parallel + [(set (match_dup 0) (minus:SI (minus:SI (match_dup 0) (match_dup 0)) + (match_dup 1))) + (clobber (reg:CC 33))]) + (parallel + [(set (match_dup 0) (neg:SI (match_dup 0))) + (clobber (reg:CC 33))])] + "" + [(set_attr "op_type" "NN")]) + +(define_expand "sltu" + [(match_operand:SI 0 "register_operand" "")] + "TARGET_CPU_ZARCH" + "if (!s390_expand_addcc (LTU, s390_compare_op0, s390_compare_op1, + operands[0], const0_rtx, const1_rtx)) FAIL; DONE;") + +(define_expand "sgtu" + [(match_operand:SI 0 "register_operand" "")] + "TARGET_CPU_ZARCH" + "if (!s390_expand_addcc (GTU, s390_compare_op0, s390_compare_op1, + operands[0], const0_rtx, const1_rtx)) FAIL; DONE;") + +(define_expand "sleu" + [(match_operand:SI 0 "register_operand" "")] + "TARGET_CPU_ZARCH" + "if (!s390_expand_addcc (LEU, s390_compare_op0, s390_compare_op1, + operands[0], const0_rtx, const1_rtx)) FAIL; DONE;") + +(define_expand "sgeu" + [(match_operand:SI 0 "register_operand" "")] + "TARGET_CPU_ZARCH" + "if (!s390_expand_addcc (GEU, s390_compare_op0, s390_compare_op1, + operands[0], const0_rtx, const1_rtx)) FAIL; DONE;") + ;; ;;- Multiply instructions. |
