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<title>ppe42-gcc/gcc, branch gcc-4_9_2-ppe42</title>
<subtitle>GCC for the PPE42</subtitle>
<id>https://git.raptorcs.com/git/ppe42-gcc/atom?h=gcc-4_9_2-ppe42</id>
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<updated>2017-10-06T14:34:44+00:00</updated>
<entry>
<title>unsupported insn for bswap emitted</title>
<updated>2017-10-06T14:34:44+00:00</updated>
<author>
<name>Doug Gilbert</name>
<email>dgilbert@us.ibm.com</email>
</author>
<published>2017-10-06T14:34:44+00:00</published>
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</entry>
<entry>
<title>Indicate that PPE42 fused branch instructions modify the CR</title>
<updated>2017-08-18T21:10:43+00:00</updated>
<author>
<name>Doug Gilbert</name>
<email>dgilbert@us.ibm.com</email>
</author>
<published>2017-08-18T19:20:18+00:00</published>
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<id>urn:sha1:49f8800766977e7702ac7e06f8f8ec6989d8aa3d</id>
<content type='text'>
</content>
</entry>
<entry>
<title>Prevent unsupported load/store index updateinstructions on PPE</title>
<updated>2017-02-10T16:28:37+00:00</updated>
<author>
<name>Doug Gilbert</name>
<email>dgilbert@us.ibm.com</email>
</author>
<published>2017-02-10T16:28:37+00:00</published>
<link rel='alternate' type='text/html' href='https://git.raptorcs.com/git/ppe42-gcc/commit/?id=565c21a4d713776676a1b847e68b60e222abfbf6'/>
<id>urn:sha1:565c21a4d713776676a1b847e68b60e222abfbf6</id>
<content type='text'>
</content>
</entry>
<entry>
<title>Fix compile issue when compiling with gcc 6</title>
<updated>2017-01-18T04:21:42+00:00</updated>
<author>
<name>Douglas Gilbert</name>
<email>dgilbert999@netscape.net</email>
</author>
<published>2017-01-18T04:21:42+00:00</published>
<link rel='alternate' type='text/html' href='https://git.raptorcs.com/git/ppe42-gcc/commit/?id=76cc2c4a3fef7df2e7cdd7c2b2d02e1a08b0aefe'/>
<id>urn:sha1:76cc2c4a3fef7df2e7cdd7c2b2d02e1a08b0aefe</id>
<content type='text'>
</content>
</entry>
<entry>
<title>Fix insn attribute length field for load zero-extend operation</title>
<updated>2016-10-28T19:12:57+00:00</updated>
<author>
<name>Doug Gilbert</name>
<email>dgilbert@us.ibm.com</email>
</author>
<published>2016-10-28T17:24:47+00:00</published>
<link rel='alternate' type='text/html' href='https://git.raptorcs.com/git/ppe42-gcc/commit/?id=72beec1539befc791ffe217f1084ee9eab7df4e5'/>
<id>urn:sha1:72beec1539befc791ffe217f1084ee9eab7df4e5</id>
<content type='text'>
</content>
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<entry>
<title>PPE42 compare immediate branch with immediate value out of range</title>
<updated>2016-09-13T15:31:29+00:00</updated>
<author>
<name>Doug Gilbert</name>
<email>dgilbert@us.ibm.com</email>
</author>
<published>2016-09-12T17:32:45+00:00</published>
<link rel='alternate' type='text/html' href='https://git.raptorcs.com/git/ppe42-gcc/commit/?id=5101dc76eb78eef67a1ab99a3c4583b663a19b80'/>
<id>urn:sha1:5101dc76eb78eef67a1ab99a3c4583b663a19b80</id>
<content type='text'>
</content>
</entry>
<entry>
<title>requre 8 byte alignment on offsettable memory access for 64bit load/store</title>
<updated>2016-08-15T16:45:09+00:00</updated>
<author>
<name>Doug Gilbert</name>
<email>dgilbert@us.ibm.com</email>
</author>
<published>2016-07-20T22:00:45+00:00</published>
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<id>urn:sha1:246277a8513f622a65f97cb59e3079fc8834a913</id>
<content type='text'>
</content>
</entry>
<entry>
<title>Add RTL to correctly handle unavailable lwzux instruction</title>
<updated>2016-08-15T16:45:09+00:00</updated>
<author>
<name>Doug Gilbert</name>
<email>dgilbert@us.ibm.com</email>
</author>
<published>2016-07-14T17:46:00+00:00</published>
<link rel='alternate' type='text/html' href='https://git.raptorcs.com/git/ppe42-gcc/commit/?id=79924b0de80bf4b5eda8cd130c2930428aff5183'/>
<id>urn:sha1:79924b0de80bf4b5eda8cd130c2930428aff5183</id>
<content type='text'>
</content>
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<entry>
<title>PPE42 compiler generates invalid crnot instruction</title>
<updated>2016-08-15T16:45:09+00:00</updated>
<author>
<name>Doug Gilbert</name>
<email>dgilbert@us.ibm.com</email>
</author>
<published>2016-03-18T16:41:35+00:00</published>
<link rel='alternate' type='text/html' href='https://git.raptorcs.com/git/ppe42-gcc/commit/?id=0c6c36e8fef06605a16e6de6f38017167fcc75fc'/>
<id>urn:sha1:0c6c36e8fef06605a16e6de6f38017167fcc75fc</id>
<content type='text'>
</content>
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<entry>
<title>Turn off 64bit load/stores in epilog/proglog</title>
<updated>2016-08-15T16:45:09+00:00</updated>
<author>
<name>Doug Gilbert</name>
<email>dgilbert@us.ibm.com</email>
</author>
<published>2015-12-17T20:03:37+00:00</published>
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