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* Cleanups to compile under FreeBSDAndrew Cagney1997-04-172-10/+27
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* Get configure to define RETSIGTYPEAndrew Cagney1997-04-071-187/+97
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* * interp.c (sim_open): New arg `kind'.David Edelsohn1997-04-021-0/+2
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* * aclocal.m4: Check for stdlib.h, string.h, strings.h, unistd.h.David Edelsohn1997-04-022-132/+281
| | | | | | (sim-debug): Allow arguments. Define WITH_DEBUG in addition to -DDEBUG. * configure: Regenerated to track ../common/aclocal.m4 changes.
* New file common/sim-config.c sets/checks simulator configuration options.Andrew Cagney1997-04-022-46/+34
| | | | Update common/aclocal.m4 to better work with sim-config.[hc].
* * configure: Re-generate.Andrew Cagney1997-03-172-191/+124
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * Make-common.in (CSEARCH): Do not include the gdb directory in the search path. * Make-common.in (SIM_ENDIAN, SIM_HOSTENDIAN, SIM_INLINE, SIM_WARNING): Drop, requiring the simulator specific Makefile.in to explicitly incorporate these. * aclocal.m4 (--enable-sim-alignment); New option. Strongly specify the alignment restrictions of the target architecture - without this option all alignment restrictions are accomodated. (--enable-sim-assert): New option. Conditionally compile in assertion statements. (--enable-sim-float): New option. Strongly specify the target's floating point support. (--enable-sim-hardware): New option. Specify the hardware devices included in the simulation. (--enable-sim-packages): New option. Specify the hardware packages included in the simulation. (--enable-sim-regparm): New option. Specify that parameters be passed in registers instead of on the stack. (--enable-sim-reserved-bits): New option. Specify that reserved bits within an instruction are are correctly set. (--enable-sim-smp): New option. Specify the level of SMP support to be included in the simulator. (--enable-sim-stdcall): New option. Specify an alternative function call convention. (--enable-sim-xor-endian): New option. Configure xor-endian support used by some targets to implement bi-endian support.
* Regenerate simulator configure scripts; Remove d10v traps 1-3, Make 15 the ↵Michael Meissner1997-03-142-302/+63
| | | | system call trap, keeping 0 temporarily
* * interp.c (sim_open): New SIM_DESC result. Argument is nowDavid Edelsohn1997-03-131-0/+13
| | | | | in argv form. (other sim_*): New SIM_DESC argument.
* * Makefile.in (@COMMON_MAKEFILE_FRAG): UseDavid Edelsohn1997-02-041-2/+2
| | | | | | COMMON_{PRE,POST}_CONFIG_FRAG instead. * configure.in: sinclude ../common/aclocal.m4. * configure: Regenerated.
* * ../common/aclocal.m4 (COMMON_MAKEFILE_FRAG): Quote a couple of $'s inStu Grossman1997-01-241-2/+2
| | | | comments and single quotes. Fixes a problem found on hpux.
* * configure: Remove targ-vals.def when doing distclean. (ChangeStu Grossman1997-01-241-1/+1
| | | | is actually in ../common/aclocal.m4.)
* * configure: Remove Make-common.in from dependencies. (Actually inStu Grossman1997-01-241-1/+1
| | | | ../common/aclocal.m4).
* * configure configure.in Makefile.in: Update to new configureStu Grossman1997-01-234-122/+1847
| | | | | | | | scheme which is more compatible with WinGDB builds. * configure.in: Improve comment on how to run autoconf. * configure: Re-run autoconf to get new ../common/aclocal.m4. * Makefile.in: Use autoconf substitution to install common makefile fragment.
* Multiply ops sign extend, not zero extendMichael Meissner1997-01-201-0/+11
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* Deal with kill encoding the signal via the exit status.Michael Meissner1996-12-312-3/+11
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* Allow exit to work normally under gdbMichael Meissner1996-12-272-102/+148
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* * Makefile.in: Delete stuff moved to ../common/Make-common.in.David Edelsohn1996-11-202-36/+4
| | | | | | | | | (SIM_OBJS,SIM_EXTRA_CFLAGS,SIM_EXTRA_CLEAN): Define. * configure.in: Simplify using macros in ../common/aclocal.m4. Call AC_CHECK_HEADERS(unistd.h). * configure: Regenerated. * config.in: New file. * simops.c: #include "config.h". #include <unistd.h> if present.
* Fix linux build problem.Gavin Romig-Koch1996-10-312-0/+6
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* * simops.c (OP_10007E0): Handle SYS_times and SYS_gettimeofday.Jeff Law1996-10-302-0/+24
| | | | Check it into devo too.
* * simops.c (OP_10007E0): Handle SYS_time.Jeff Law1996-10-302-0/+7
| | | | Check into devo too.
* * simops.c: Include <sys/stat.h>.Jeff Law1996-10-292-18/+20
| | | | | (OP_10007E0): Handle SYS_stat. For RW testing.
* * simops.c (OP_500): Mask off low bit in displacementJeff Law1996-10-242-2/+6
| | | | | | for sld.w. (OP_501): Similarly. More bugs exposed by tda testing.
* * simops.c (OP_500): Fix displacement handling for sld.w.Jeff Law1996-10-242-2/+5
| | | | | (OP_501): Similarly for sst.w. More fixes exposed by tda testing.
* * simops.c (trace_input): Remove all references to SEXT7.Jeff Law1996-10-242-10/+18
| | | | | | | | (OP_300, OP_400, OP_500, OP_380, OP_480, OP_501): Displacement is zero extended for sst/sld instructions. * v850_sim.h (SEX7): Delete. It's no longer needed (and it was incorrect anyway). So we properly simulate sst/sld instructions.
* * Makefile.in: Get rid of srcroot. Set all INSTALL macros viaStu Grossman1996-10-244-51/+131
| | | | | | | | | | | autoconf. * gencode.c (write_opcodes): Pad operands field to account for MSVC braindamage. * simops.c: Include errno.h. Exclude SYS_chown, since MSVC doesn't support it. (Why is this here in the first place?!?) * v850_sim.h: Get rid of 64 bit defs. Also, get rid of #elif's. Change number of operands in struct simops from 9 to 6. Define SIGTRAP and SIGQUIT for MSVC.
* * interp.c (MEM_SIZE): It's now bytes, not a power of 2.Stu Grossman1996-10-151-0/+31
| | | | | | | * (map): Add support for external mem in the 1->2 meg range. Also, abort() when memory access is way out of bounds. (Better to die than to give wrong result. (This will be fixed later.)) * (sim_size): MEM_SIZE is now bytes, not shift factor.
* * gencode.c (write_opcodes): Output hex values for opcode maskStu Grossman1996-09-284-5/+27
| | | | | | | | | and patterns. * interp.c (sim_resume): Save and restore PC from the appropriate register. * (sim_fetch_register sim_store_register): Fix byte-order problem with reading and writing registers. * simops.c (OP_FFFF): Implement pseudo-breakpoint insn.
* * simops.c (trace_input): Fix thinko.Jeff Law1996-09-272-7/+16
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* Print line # and function name or filename if they exist for each PC.Michael Meissner1996-09-122-3/+69
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* Add tracing support; Fix some problems with hardwired sizesMichael Meissner1996-09-114-106/+650
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* * interp.c (hash): Make this an inline functionJeff Law1996-09-103-44/+43
| | | | | | | when compiling with GCC. Simplify. * simpos.c: Explicitly include "sys/syscall.h". Remove some #if 0'd code. Enable more emulated syscalls. Checking in more stuff.
* * gencode.c: Fix various indention & style problems.Jeff Law1996-09-033-83/+70
| | | | | | | | | | | | | | | Remove test code. Remove #if 0 code. * interp.c: Provide prototypes for all static functions. Fix minor indention problems. (sim_open, sim_resume): Remove unused variables. (sim_read): Return type is "int". * simops.c: Remove unused variables. (divh): Make result of divide-by-zero zero. (setf): Initialize result to keep compiler quiet. (sar instructions): These just clear the overflow bit. * v850_sim.h: Provide prototypes for put_byte, put_half and put_word. Cleaning up.
* Fix typpppoJeff Law1996-09-031-1/+1
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* * interp.c: OP should be an array of 32bit operands!Jeff Law1996-09-034-78/+248
| | | | | | | | | | | | | | | | | (v850_callback): Declare. (do_format_5): Fix extraction of OP[0]. (sim_size): Remove debugging printf. (sim_set_callbacks): Do something useful. (sim_stop_reason): Gross hacks to get c-torture running. * simops.c: Simplify code for computing targets of bCC insns. Invert 's' bit if 'ov' bit is set for some instructions. Fix 'cy' bit handling for numerous instructions. Make the simulator stop when a halt instruction is encountered. Very crude support for emulated syscalls (trap 0). * v850_sim.h: Include "callback.h" and declare v850_callback. Items in the operand array are 32bits. Fixes & syscall stuff.
* * simops.c: Fix "not1" and "set1".Jeff Law1996-08-302-2/+4
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* * simops.c: Don't forget to initialize temp forJeff Law1996-08-302-0/+5
| | | | "ld.h" and "ld.w"
* * interp.c: Remove various debugging printfs.Jeff Law1996-08-302-15/+2
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* * simops.c: Fix satadd, satsub boundary case handling.Jeff Law1996-08-302-5/+7
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* * interp.c (hash): Fix.Jeff Law1996-08-303-18/+80
| | | | | | * interp.c (do_format_8): Get operands correctly and call the target function. * simops.c: Rough cut at "clr1", "not1", "set1", and "tst1".
* * interp.c (do_format_4): Get operands correctly andJeff Law1996-08-303-0/+61
| | | | | | call the target function. * simops.c: Rough cut at "sld.b", "sld.h", "sld.w", "sst.b", "sst.h", and "sst.w".
* * v850_sim.h: The V850 doesn't have split I&D spaces. ChangeJeff Law1996-08-303-121/+181
| | | | | | | | | | | | | accordingly. Remove many unused definitions. * interp.c: The V850 doesn't have split I&D spaces. Change accordingly. (get_longlong, get_longword, get_word): Deleted. (write_longlong, write_longword, write_word): Deleted. (get_operands): Deleted. (get_byte, get_half, get_word): New functions. (put_byte, put_half, put_word): New functions. * simops.c: Remove unused functions. Rough cut at "ld.b", "ld.h", "ld.w", "st.b", "st.h", "st.w" insns.
* * v850_sim.h (struct _state): Remove "psw" field. AddJeff Law1996-08-303-78/+89
| | | | | | | "sregs" field. (PSW): Remove bogus definition. * simops.c: Change condition code handling to use the psw register within the sregs array. Handle "ldsr" and "stsr".
* * simops.c: Handle "satadd", "satsub", "satsubi", "satsubr".Jeff Law1996-08-302-25/+173
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* * interp.c (do_format_5): Get operands correctly andJeff Law1996-08-303-12/+39
| | | | | | call the target function. (sim_resume): Don't do a PC update for format 5 instructions. * simops.c: Handle "jarl" and "jmp" instructions.
* * simops.c: Fix minor typos. Handle "cmp", "setf", "tst"Jeff Law1996-08-302-25/+146
| | | | "di", and "ei" instructions correctly.
* * interp.c (do_format_3): Get operands correctly and callJeff Law1996-08-303-13/+211
| | | | | the target function. * simops.c: Handle bCC instructions.
* * simops.c: Add condition code handling to shift insns.Jeff Law1996-08-302-30/+101
| | | | Fix minor typos in condition code handling for other insns.
* * Makefile.in: Fix typo.Jeff Law1996-08-302-19/+79
| | | | | * simops.c: Add condition code handling to "sub" "subr" and "divh" instructions.
* * interp.c (hash): Update to be more accurate.Jeff Law1996-08-295-138/+348
| | | | | | | | | | | | | | | | | | | | | (lookup_hash): Call hash rather than computing the hash code here. (do_format_1_2): Handle format 1 and format 2 instructions. Get operands correctly and call the target function. (do_format_6): Get operands correctly and call the target function. (do_formats_9_10): Rough cut so shift ops will work. (sim_resume): Tweak to deal with format 1 and format 2 handling in a single funtion. Don't update the PC for format 3 insns. Fix typos. * simops.c: Slightly reorganize. Add condition code handling to "add", "addi", "and", "andi", "or", "ori", "xor", "xori" and "not" instructions. * v850_sim.h (reg_t): Registers are 32bits. (_state): The V850 has 32 general registers. Add a 32bit psw and pc register too. Add accessor macros Fixing lots of stuff. Starting to add condition code support. Basically check pointing the work to date.
* * simops.c: Add shift support.Jeff Law1996-08-292-22/+56
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