| Commit message (Expand) | Author | Age | Files | Lines |
| ... | |
| * | Fix IGEN version of MFC0, MTC0, SWC1, LWC1, SDC1, LDC1, LWXC1, | Andrew Cagney | 1997-11-11 | 5 | -121/+396 |
| * | Replace global IPC with function argument cia or current instruction | Andrew Cagney | 1997-11-06 | 5 | -60/+78 |
| * | IGEN likes to cache the current instruction address (CIA). Change the | Andrew Cagney | 1997-11-06 | 5 | -112/+172 |
| * | Add option --enable-sim-igen to mips configuration. Allows user to | Andrew Cagney | 1997-11-05 | 2 | -17/+50 |
| * | Rewrite the MIPS simulator's memory model so that it uses the generic | Andrew Cagney | 1997-11-05 | 5 | -544/+225 |
| * | Delete -l and -n options, didn't do anything. | Andrew Cagney | 1997-11-05 | 3 | -51/+28 |
| * | Rewrite sim_monitor (implements read, write, open, et.al. system | Andrew Cagney | 1997-11-05 | 3 | -323/+249 |
| * | Correct r5900 sanitization. | Gavin Romig-Koch | 1997-11-04 | 2 | -1/+3 |
| * | * gencode.c: Add tx49 configury and insns. | Gavin Romig-Koch | 1997-10-29 | 5 | -15/+97 |
| * | common/sim-bits.h: Document ROTn macro. | Andrew Cagney | 1997-10-29 | 6 | -22/+720 |
| * | Add support for 16 byte quantities to sim-endian macro H2T. | Andrew Cagney | 1997-10-28 | 2 | -26/+30 |
| * | Separate r5900 specifoc and mips16 instructions. | Andrew Cagney | 1997-10-27 | 9 | -5179/+2770 |
| * | Add mips64vr5400 to configuration list | Andrew Cagney | 1997-10-27 | 6 | -38/+636 |
| * | * sim/mips/gencode.c (build_instruction): Follow sim_write's lead in using | Gavin Romig-Koch | 1997-10-25 | 2 | -1/+7 |
| * | Add basic igen configuration to autoconf. Disable. | Andrew Cagney | 1997-10-24 | 4 | -18/+244 |
| * | Add function to fetch 32bit instructions | Andrew Cagney | 1997-10-24 | 4 | -119/+154 |
| * | Checkpoint IGEN version of mips sim | Andrew Cagney | 1997-10-24 | 1 | -152/+157 |
| * | Use SIM*_OVERFLOW_RESULT defined in sim-alu.h | Andrew Cagney | 1997-10-21 | 2 | -2/+7 |
| * | Output pc profile statistics once gathered. | Andrew Cagney | 1997-10-21 | 2 | -9/+5 |
| * | Delete profile support from MIPS simulator, use sim/common/sim-profile | Andrew Cagney | 1997-10-21 | 4 | -225/+19 |
| * | Make mips registers of type unsigned_word. | Andrew Cagney | 1997-10-20 | 3 | -3/+14 |
| * | Move register definitions and macros out of interp.c and into sim-main.h | Andrew Cagney | 1997-10-16 | 4 | -274/+362 |
| * | Checkpoint IGEN version of MIPS simulator. | Andrew Cagney | 1997-10-16 | 1 | -248/+218 |
| * | Rename generated file engine.c to oengine.c. | Andrew Cagney | 1997-10-16 | 3 | -6/+13 |
| * | * gencode.c (build_instruction): Use FPR_STATE not fpr_state. | Andrew Cagney | 1997-10-16 | 2 | -6/+10 |
| * | * gencode.c (build_instruction): For "FPSQRT", output correct number | Andrew Cagney | 1997-10-16 | 2 | -1/+8 |
| * | Checkpoint IGEN version of MIPS simulator. | Andrew Cagney | 1997-10-14 | 1 | -1239/+1196 |
| * | Move global MIPS simulator variables into sim_cpu struct. | Andrew Cagney | 1997-10-14 | 4 | -330/+369 |
| * | o Add support for configuring wordsize, fp hardware and target | Andrew Cagney | 1997-10-14 | 8 | -543/+822 |
| * | Snap. Gets through igen's checks. | Andrew Cagney | 1997-10-09 | 1 | -322/+104 |
| * | MIPS/IGEN checkpoint - doesn't build. | Andrew Cagney | 1997-10-08 | 3 | -0/+10004 |
| * | Checkpoint IGEN input file for MIPS simulator. | Andrew Cagney | 1997-10-07 | 1 | -0/+2 |
| * | Add access to hi part of r5900 128 bit registers. | Andrew Cagney | 1997-09-30 | 1 | -0/+13 |
| * | * configure: Regenerated. | Bob Manson | 1997-09-29 | 1 | -0/+4 |
| * | * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB. | Mark Alexander | 1997-09-26 | 2 | -7/+108 |
| * | Add/use SIM_AC_OPTION_BITSIZE. | Andrew Cagney | 1997-09-25 | 1 | -10/+34 |
| * | Allow gencode.c to generate input to the igen generator. | Andrew Cagney | 1997-09-25 | 2 | -201/+489 |
| * | Pacify GCC -Wall | Andrew Cagney | 1997-09-25 | 1 | -0/+5 |
| * | vr5900-r5900. | Jeff Law | 1997-09-23 | 1 | -1/+1 |
| * | Remove need to update <targ>/Makefile.in when adding optional options | Andrew Cagney | 1997-09-23 | 3 | -69/+160 |
| * | Add memory alignment config option. | Andrew Cagney | 1997-09-22 | 3 | -44/+106 |
| * | Simplify logic behind the generic configuration option --enable-sim-alignment. | Andrew Cagney | 1997-09-22 | 1 | -0/+4 |
| * | Add support for --enable-sim-alignment to simulator common aclocal.m4 | Andrew Cagney | 1997-09-22 | 1 | -0/+21 |
| * | Add handling for 3900's SDBBP, DERET, and RFE insns. | Gavin Romig-Koch | 1997-09-20 | 2 | -7/+15 |
| * | * gencode.c: Add r3900 (tx39). | Gavin Romig-Koch | 1997-09-19 | 2 | -21/+40 |
| * | * sim/mips/gencode.c (build_instruction): Don't need to subtract 4 for | Gavin Romig-Koch | 1997-09-16 | 2 | -1/+7 |
| * | * sim/mips/interp.c: Correct some HASFPU problems. | Gavin Romig-Koch | 1997-09-16 | 2 | -5/+19 |
| * | Update to reflect change to sim/common/aclocal.m4 (allow sim/common | Andrew Cagney | 1997-09-15 | 2 | -17/+24 |
| * | Short form of sample-size option had wrong value. | Andrew Cagney | 1997-09-12 | 2 | -1/+6 |
| * | mips/sim_info was just returning????? | Andrew Cagney | 1997-09-10 | 2 | -2/+4 |