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* sim: bfin: allow pushing of SPMike Frysinger2011-05-142-2/+6
| | | | | | | The hardware respects this insn, and some code (like the on-chip bootrom) uses it, so allow it. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* sim: bfin: implement loop back support in the UARTsMike Frysinger2011-05-144-23/+62
| | | | | | | The UART has a LOOP_ENA bit in its MCR register where writes to the THR go to the RBR. Implement support for this mode. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* sim: bfin: fix UART LSR read-only bit saturationMike Frysinger2011-05-092-0/+6
| | | | | | | | A few bits in the newer UART LSR register are not sticky, so make sure we clear them when returning updated status rather than leaving them always set. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* sim: bfin: constify dmac pmap arraysMike Frysinger2011-04-272-13/+22
| | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* sim: gpio: add output supportMike Frysinger2011-04-262-16/+53
| | | | | | | Make all of the pins bidirectional, and support sending signals when software drives the pins as outputs. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* sim: gpio: update mask a/b signals betterMike Frysinger2011-04-262-12/+49
| | | | | | | | | | When the mask a/b MMRs are written, the output signal might change levels (as pins are [un]masked), so make sure we update the output level. Further, make sure we handle edge ints correctly by first sending a high signal followed by a low signal. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* sim: bfin: use store buffer with more 32bit insnsMike Frysinger2011-04-162-23/+37
| | | | | | | A bunch of 32bit insns were not using the store buffer, so when they were used in parallel insns, they would incorrectly clobber a register early. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* sim: bfin: handle implicit DISALGNEXCPT with video insnsMike Frysinger2011-04-152-0/+30
| | | | | | | | When most video related insns are used in parallel with Ireg loads, the DISALGNEXCPT insn behavior is implicitly in effect. Reported-by: Anton Shokurov <shokurov.anton.v@yandex.ru> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* sim: bfin: respect the port level on signals to the SICMike Frysinger2011-04-112-16/+32
| | | | | | | | The SIC latches ints from peripherals to the CEC, but the peripherals need to be able to tell the SIC when to stop. So use the incoming level to figure out when to set the int bits and when to clear it. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* sim: bfin: add missing GPIO pin 15Mike Frysinger2011-04-112-0/+5
| | | | | | | Each GPIO block has 16 pins, and I only added 15 in the original port list. So add the missing 16th. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* sim: bfin: add OTP output portMike Frysinger2011-04-012-0/+12
| | | | | | | | | This doesn't currently generate any interrupts (as there doesn't appear to be any documentation to *when* it would even do so), but since the HRM does say an interrupt line exists between the OTP and the SIC, add one for completeness sake. This will make a follow up patch easier. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* sim: bfin: regen configure to include new cfi deviceMike Frysinger2011-03-292-1/+5
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* sim: bfin: fix sign extension with 16bit acc add insnsMike Frysinger2011-03-292-9/+9
| | | | | | | | | | The current implementation attempts to handle the 16bit sign extension itself. Unfortunately, it gets it right in some cases. So rather than fix that logic, just drop it in favor of using 16bit signed casts. Now gcc will take care of getting the logic right. Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* sim: bfin: handle saturation with RND12 sub insnsMike Frysinger2011-03-272-1/+11
| | | | | | | | | The current handling of the subtraction insn with the RND12 modifier works when saturation isn't involved. So add handling for this edge case to match the hardware. Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* sim: bfin: add missing VS set with add/sub insnsMike Frysinger2011-03-262-0/+7
| | | | | | | | The 16bit add/sub insns missed setting the VS bit in ASTAT whenever the V bit was also set. Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* sim: bfin: add hw tracing to gpio/sic port eventsMike Frysinger2011-03-253-10/+64
| | | | | | | Makes it a lot easier to find out what's going on with interrupt lines if the ports have tracing output. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* sim: bfin: fix GPIO logic bugs when processing eventsMike Frysinger2011-03-252-4/+16
| | | | | | | | | | | | | | | We need the DIR bit cleared, not set, in order for the pin to be treated as an input. When looking up the data value, we need to shift the "level" value over by "my_port" rather than "bit" as the latter has already been shifted over. We also should normalize the "level" coming in from the outside worlds to the set of {0,1} since those are the only values that matter to GPIOs. We need the BOTH bit set, not cleared, in order for the pin to trigger on both edges. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* sim: bfin: fix clear/set/toggle GPIO handlingMike Frysinger2011-03-252-0/+11
| | | | | | | | | The clear/set/toggle MMRs aren't backed by "real" data; they implicitly perform bit operations on the associated data register. So when we go to process writes to them, we need to adjust the pointer accordingly so that the actual backing data is modified. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* sim: bfin: document SIC limitationMike Frysinger2011-03-242-1/+27
| | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* sim: bfin: fix inverted W1C logicMike Frysinger2011-03-2414-17/+34
| | | | | | | | | | | | | When I originally wrote the w1c helper funcs, I used it in a few places. Then I forgot how it worked and when I later documented it, I described the 3rd arg in the exact opposite way it is actually used. This error propagated to a bunch of devices registers that were not explicitly tested (a bunch of the devices are stubs which merely exist to say "no device is connected" to make device drivers happy). So once the documentation is unscrewed, fix all of the broken call sites. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* sim: bfin: define more UART LSR bitsMike Frysinger2011-03-242-7/+16
| | | | | | | | | We'll need these bits in an upcoming patch, so map out the whole LSR MMR now. Fix up indentation style while we're here. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* sim: bfin: fix typo in TWI stat regMike Frysinger2011-03-242-1/+5
| | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* sim: bfin: update VIT_MAX behavior to match hardware when Acc.X bits are setMike Frysinger2011-03-242-2/+7
| | | | | | | | | | The Blackfin PRM says that the top 8 bits of the accumulator must be cleared when using the VIT_MAX insn, so the sim has followed this spec. Matching the hardware behavior though when the high bits are not cleared is easy to do and doesn't break existing behavior, so go for it. Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* sim: bfin: always do 16bit sign extension with the SEARCH insnMike Frysinger2011-03-242-0/+10
| | | | | | | | | | The Blackfin PRM does not cover this case, but the hardware is clear: even if the search criteria is not met (and thus a new 16bit value is loaded up into the accumulator), the accumulator undergoes 16bit sign extension. So simply reload the low signed 16bits in that case. Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* sim: bfin: update AV and AC ASTAT bits with acc negationMike Frysinger2011-03-242-6/+14
| | | | | | | | | The Acc=-Acc insn can overflow or carry with edge values, so make sure we update the ASTAT bits accordingly to match the hardware. Also fix a thinko where we always updated AC0 even when working with A1 regs. Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* sim: bfin: fix thinko in SIC pin encodingMike Frysinger2011-03-242-511/+516
| | | | | | | | | | | | | When encoding the SIC/pin info into unique input port ids, I used bases of 100 when I meant to use 0x100. Rather than simply fix the decoding math in the different functions, create a few helper macros to simplify the SIC/pin encoding and decoding steps. This makes the resulting tables nice & clear. And now that pins are clear, the 533 and 537 port_event handlers may easily be merged into one. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* sim: bfin: allow byteop[123]p src regs to be the sameMike Frysinger2011-03-242-9/+5
| | | | | | | | The hardware allows the byteop[123]p insns to use the same src reg pair, so remove the combination check in the sim. Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* sim: bfin: fix thinko in bfin_gpio bus addressesMike Frysinger2011-03-242-30/+38
| | | | | | | | The bus addresses have to be valid numbers, so 'g' and 'h' won't work. Oddly, the common code silently ignored this which is why I didn't notice in the first place. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* sim: bfin: check for kill/preadMike Frysinger2011-03-175-2/+25
| | | | | | | If the host system (like Windows) doesn't support these functions, then make sure we don't use them. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* sim: bfin: add GPIO device simulationMike Frysinger2011-03-157-28/+369
| | | | | | This takes care of the MMR interface and pushing up interrupts. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* sim: bfin: fix brace styleMike Frysinger2011-03-1527-27/+54
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* sim: bfin: fix brace styleMike Frysinger2011-03-1558-161/+342
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* sim: bfin: handle AZ updates with 16bit adds/subsMike Frysinger2011-03-152-1/+6
| | | | | | | We weren't updating AZ when doing a 16bit add or sub insn. Implement it. Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* sim: bfin: skip acc/ASTAT updates for movesMike Frysinger2011-03-152-6/+10
| | | | | | | | | No point in moving unchanged acc values to the acc regs, and avoid updating the acc ASTAT bits when only reading. This fixes incorrect changing of the ASTAT bits when they're only being read. Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* sim: bfin: handle AN (negative overflows) in dsp mult insnsMike Frysinger2011-03-152-8/+40
| | | | | | | | The current dsp mult handler does not take care of overflows which turn values negative (and thus set AN in ASTAT). So implement it. Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* sim: bfin: handle V overflows in dsp mult insnsMike Frysinger2011-03-152-7/+15
| | | | | | | | The current dsp mult handler does not take care of overflows and updating the V ASTAT bit. So implement it. Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* sim: bfin: decode ASTAT on failureMike Frysinger2011-03-152-34/+79
| | | | | | | | | | When testing ASTAT regs, specific bit differences carry a lot more meaning than when checking the value of a data register. So automatically decode the bits of the two values and print things out so that people don't have to manually do it themselves every time. Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* sim: bfin: handle saturation with fract multiplicationsMike Frysinger2011-03-152-0/+6
| | | | | | | The saturation behavior with fract modes differs from non-fract modes. Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* sim: bfin: forgot to cvs add the changelogMike Frysinger2011-03-141-0/+29
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* sim: bfin: new portMike Frysinger2011-03-06101-0/+30214
This can boot Das U-Boot and a Linux kernel. It also supports Linux userspace FLAT and FDPIC (dynamic and static) ELFs. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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