| Commit message (Collapse) | Author | Age | Files | Lines |
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Add option to offset S12 addresses into XGATE memory space.
Tweak target flags to match other tools. (i.e. -m m68hc11).
* doc/as.texinfo: Mention new options.
* doc/c-m68hc11.texi: Document new options.
* NEWS: Mention new support.
* archures.c: Add bfd_arch_m9s12x and bfd_arch_m9s12xg.
* config.bfd: Likewise.
* cpu-m9s12x.c: New.
* cpu-m9s12xg.c: New.
* elf32-m68hc12.c: Add S12X and XGATE co-processor support.
Add option to offset S12 addresses into XGATE memory space.
Fix carry bug in IMM16 (IMM8 low/high) relocate.
* Makefile.am (ALL_MACHINES): Add cpu-m9s12x and cpu-m9s12xg.
(ALL_MACHINES_CFILES): Likewise.
* reloc.c: Add S12X relocs.
* Makefile.in: Regenerate.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
* gas/m68hc11/insns9s12x.s: New
* gas/m68hc11/insns9s12x.d: New
* gas/m68hc11/hexprefix.s: New
* gas/m68hc11/hexprefix.d: New
* gas/m68hc11/9s12x-exg-sex-tfr.s: New
* gas/m68hc11/9s12x-exg-sex-tfr.d: New
* gas/m68hc11/insns9s12xg.s: New
* gas/m68hc11/insns9s12xg.d: New
* gas/m68hc11/9s12x-mov.s: New
* gas/m68hc11/9s12x-mov.d: New
* gas/m68hc11/m68hc11.exp: Updated
* gas/m68hc11/*.d: Brought in line with changed objdump output.
* gas/all/gas.exp: XFAIL all hc11/12 targets for redef2,3.
* gas/elf/elf.exp: XFAIL all hc11/12 targets for redef.
* gas/elf/dwarf2-1.d: Skip for hc11/12 targets.
* gas/elf/dwarf2-2.d: Likewise.
* ld-m68hc11/xgate-link.s: New.
* ld-m68hc11/xgate-link.d: New.
* ld-m68hc11/xgate-offset.s: New.
* ld-m68hc11/xgate-offset.d: New.
* ld-m68hc11/xgate1.s: New.
* ld-m68hc11/xgate1.d: New.
* ld-m68hc11/xgate2.s: New.
* ld-m68hc11/m68hc11.exp: Updated.
* ld-m68hc11/*.d: Brought in line with changed objdump output.
* ld-gc/gc.exp: Update CFLAGS for m68hc11.
* ld-plugin/plugin.exp: Likewise.
* ld-srec/srec.exp: XFAIL for m68hc11 and m68hc12.
* configure.in: Add S12X and XGATE co-processor support to m68hc11
target.
* disassemble.c: Likewise.
* configure: Regenerate.
* m68hc11-dis.c: Make objdump output more consistent, use hex
instead of decimal and use 0x prefix for hex.
* m68hc11-opc.c: Add S12X and XGATE opcodes.
* dis-asm.h (print_insn_m9s12x): Prototype.
(print_insn_m9s12xg): Prototype.
* m68hc11.h (R_M68HC12_16B, R_M68HC12_PCREL_9, R_M68HC12_PCREL_10)
R_M68HC12_HI8XG, R_M68HC12_LO8XG): New relocations.
(E_M68HC11_XGATE_RAMOFFSET): Define.
* m68hc11.h: Add XGate definitions.
(struct m68hc11_opcode): Add xg_mask field.
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2012-05-14 Catherine Moore <clm@codesourcery.com>
* NEWS: Mention PowerPC VLE port.
2012-05-14 James Lemke <jwlemke@codesourcery.com>
Catherine Moore <clm@codesourcery.com>
bfd/
* bfd.c (bfd_lookup_section_flags): Add section parm.
* ecoff.c (bfd_debug_section): Remove flag_info initializer.
* elf-bfd.h (bfd_elf_section_data): Move in section_flag_info.
(bfd_elf_lookup_section_flags): Add section parm.
* elf32-ppc.c (is_ppc_vle): New function.
(ppc_elf_modify_segment_map): New function.
(elf_backend_modify_segment_map): Define.
(has_vle_insns): New define.
* elf32-ppc.h (ppc_elf_modify_segment_map): Declare.
* elflink.c (bfd_elf_lookup_section_flags): Add return value & parm.
Move in logic to omit / include a section.
* libbfd-in.h (bfd_link_info): Add section parm.
(bfd_generic_lookup_section_flags): Likewise.
* reloc.c (bfd_generic_lookup_section_flags): Likewise.
* section.c (bfd_section): Move out section_flag_info.
(BFD_FAKE_SECTION): Remove flag_info initializer.
* targets.c (_bfd_lookup_section_flags): Add section parm.
2012-05-14 Catherine Moore <clm@codesourcery.com>
bfd/
* archures.c (bfd_mach_ppc_vle): New.
* bfd-in2.h: Regenerated.
* cpu-powerpc.c (bfd_powerpc_archs): New entry for vle.
* elf32-ppc.c (split16_format_type): New enumeration.
(ppc_elf_vle_split16): New function.
(HOWTO): Add entries for R_PPC_VLE relocations.
(ppc_elf_reloc_type_lookup): Handle PPC_VLE relocations.
(ppc_elf_section_flags): New function.
(ppc_elf_lookup_section_flags): New function.
(ppc_elf_section_processing): New function.
(ppc_elf_check_relocs): Handle PPC_VLE relocations.
(ppc_elf_relocation_section): Likewise.
(elf_backend_lookup_section_flags_hook): Define.
(elf_backend_section_flags): Define.
(elf_backend_section_processing): Define.
* elf32-ppc.h (ppc_elf_section_processing): Declare.
* libbfd.h: Regenerated.
* reloc.c (BFD_RELOC_PPC_VLE_REL8, BFD_RELOC_PPC_VLE_REL15,
BFD_RELOC_PPC_VLE_REL24, BFD_RELOC_PPC_VLE_LO16A,
BFD_RELOC_PPC_VLE_LO16D, BFD_RELOC_PPC_VLE_HI16A,
BFD_RELOC_PPC_VLE_HI16D, BFD_RELOC_PPC_VLE_HA16A,
BFD_RELOC_PPC_VLE_HA16D, BFD_RELOC_PPC_VLE_SDA21,
BFD_RELOC_PPC_VLE_SDA21_LO, BFD_RELOC_PPC_VLE_SDAREL_LO16A,
BFD_RELOC_PPC_VLE_SDAREL_LO16D, BFD_RELOC_PPC_VLE_SDAREL_HI16A,
BFD_RELOC_PPC_VLE_SDAREL_HI16D, BFD_RELOC_PPC_VLE_SDAREL_HA16A,
BFD_RELOC_PPC_VLE_SDAREL_HA16D): New bfd relocations.
2012-05-14 James Lemke <jwlemke@codesourcery.com>
gas/
* config/tc-ppc.c (insn_validate): New func of existing code to call..
(ppc_setup_opcodes): ..from 2 places here.
Revise for second (VLE) opcode table.
Add #ifdef'd code to print opcode tables.
2012-05-14 James Lemke <jwlemke@codesourcery.com>
gas/
* config/tc-ppc.c (ppc_setup_opcodes): Allow out-of-order
for the VLE conditional branches.
2012-05-14 Catherine Moore <clm@codesourcery.com>
Maciej W. Rozycki <macro@codesourcery.com>
Rhonda Wittels <rhonda@codesourcery.com>
gas/
* config/tc-ppc.c (PPC_VLE_SPLIT16A): New macro.
(PPC_VLE_SPLIT16D): New macro.
(PPC_VLE_LO16A): New macro.
(PPC_VLE_LO16D): New macro.
(PPC_VLE_HI16A): New macro.
(PPC_VLE_HI16D): New macro.
(PPC_VLE_HA16A): New macro.
(PPC_VLE_HA16D): New macro.
(PPC_APUINFO_VLE): New definition.
(md_chars_to_number): New function.
(md_parse_option): Check for combinations of little
endian and -mvle.
(md_show_usage): Document -mvle.
(ppc_arch): Recognize VLE.
(ppc_mach): Recognize bfd_mach_ppc_vle.
(ppc_setup_opcodes): Print the opcode table if
* config/tc-ppc.h (ppc_frag_check): Declare.
* doc/c-ppc.texi: Document -mvle.
* NEWS: Mention PowerPC VLE port.
2012-05-14 Catherine Moore <clm@codesourcery.com>
gas/
* config/tc-ppc.h (ppc_dw2_line_min_insn_length): Declare.
(DWARF2_LINE_MIN_INSN_LENGTH): Redefine.
* config/tc-ppc.c (ppc_dw2_line_min_insn_length): New.
* dwarf2dbg.c (scale_addr_delta): Handle values of 1
for DWARF2_LINE_MIN_INSN_LENGTH.
2012-05-14 Catherine Moore <clm@codesourcery.com>
Maciej W. Rozycki <macro@codesourcery.com>
Rhonda Wittels <rhonda@codesourcery.com>
gas/testsuite/
* gas/ppc/ppc.exp: Run new tests.
* gas/ppc/vle-reloc.d: New test.
* gas/ppc/vle-reloc.s: New test.
* gas/ppc/vle-simple-1.d: New test.
* gas/ppc/vle-simple-1.s: New test.
* gas/ppc/vle-simple-2.d: New test.
* gas/ppc/vle-simple-2.s: New test.
* gas/ppc/vle-simple-3.d: New test.
* gas/ppc/vle-simple-3.s: New test.
* gas/ppc/vle-simple-4.d: New test.
* gas/ppc/vle-simple-4.s: New test.
* gas/ppc/vle-simple-5.d: New test.
* gas/ppc/vle-simple-5.s: New test.
* gas/ppc/vle-simple-6.d: New test.
* gas/ppc/vle-simple-6.s: New test.
* gas/ppc/vle.d: New test.
* gas/ppc/vle.s: New test.
2012-05-14 James Lemke <jwlemke@codesourcery.com>
include/elf/
* ppc.h (SEC_PPC_VLE): Remove.
2012-05-14 Catherine Moore <clm@codesourcery.com>
James Lemke <jwlemke@codesourcery.com>
include/elf/
* ppc.h (R_PPC_VLE_REL8): New reloction.
(R_PPC_VLE_REL15): Likewise.
(R_PPC_VLE_REL24): Likewise.
(R_PPC_VLE_LO16A): Likewise.
(R_PPC_VLE_LO16D): Likewise.
(R_PPC_VLE_HI16A): Likewise.
(R_PPC_VLE_HI16D): Likewise.
(R_PPC_VLE_HA16A): Likewise.
(R_PPC_VLE_HA16D): Likewise.
(R_PPC_VLE_SDA21): Likewise.
(R_PPC_VLE_SDA21_LO): Likewise.
(R_PPC_VLE_SDAREL_LO16A): Likewise.
(R_PPC_VLE_SDAREL_LO16D): Likewise.
(R_PPC_VLE_SDAREL_HI16A): Likewise.
(R_PPC_VLE_SDAREL_HI16D): Likewise.
(R_PPC_VLE_SDAREL_HA16A): Likewise.
(R_PPC_VLE_SDAREL_HA16D): Likewise.
(SEC_PPC_VLE): Remove.
(PF_PPC_VLE): New program header flag.
(SHF_PPC_VLE): New section header flag.
(vle_opcodes, vle_num_opcodes): New.
(VLE_OP): New macro.
(VLE_OP_TO_SEG): New macro.
2012-05-14 Catherine Moore <clm@codesourcery.com>
Maciej W. Rozycki <macro@codesourcery.com>
Rhonda Wittels <rhonda@codesourcery.com>
include/opcode/
* ppc.h (PPC_OPCODE_VLE): New definition.
(PPC_OP_SA): New macro.
(PPC_OP_SE_VLE): New macro.
(PPC_OP): Use a variable shift amount.
(powerpc_operand): Update comments.
(PPC_OPSHIFT_INV): New macro.
(PPC_OPERAND_CR): Replace with...
(PPC_OPERAND_CR_BIT): ...this and
(PPC_OPERAND_CR_REG): ...this.
2012-05-14 James Lemke <jwlemke@codesourcery.com>
ld/
* ldlang.c (walk_wild_consider_section): Don't copy section_flag_list.
Pass it to callback.
(walk_wild_section_general): Pass section_flag_list to callback.
(lang_add_section): Add sflag_list parm.
Move out logic to keep / omit a section & call bfd_lookup_section_flags.
(output_section_callback_fast): Add sflag_list parm.
Add new parm to lang_add_section calls.
(output_section_callback): Likewise.
(check_section_callback): Add sflag_list parm.
(lang_place_orphans): Add new parm to lang_add_section calls.
(gc_section_callback): Add sflag_list parm.
(find_relro_section_callback): Likewise.
* ldlang.h (callback_t): Add flag_info parm.
(lang_add_section): Add sflag_list parm.
* emultempl/armelf.em (elf32_arm_add_stub_section):
Add lang_add_section parm.
* emultempl/beos.em (gld*_place_orphan): Likewise.
* emultempl/elf32.em (gld*_place_orphan): Likewise.
* emultempl/hppaelf.em (hppaelf_add_stub_section): Likewise.
* emultempl/m68hc1xelf.em (m68hc11elf_add_stub_section): Likewise.
* emultempl/mipself.em (mips_add_stub_section): Likewise.
* emultempl/mmo.em (mmo_place_orphan): Likewise.
* emultempl/pe.em (gld_*_place_orphan): Likewise.
* emultempl/pep.em (gld_*_place_orphan): Likewise.
* emultempl/ppc64elf.em (ppc_add_stub_section): Likewise.
* emultempl/spuelf.em (spu_place_special_section): Likewise.
* emultempl/vms.em (vms_place_orphan): Likewise.
2012-05-14 James Lemke <jwlemke@codesourcery.com>
ld/testsuite/
* ld-powerpc/powerpc.exp: Create ppceabitests.
* ld-powerpc/vle-multiseg.s: New.
* ld-powerpc/vle-multiseg-1.d: New.
* ld-powerpc/vle-multiseg-1.ld: New.
* ld-powerpc/vle-multiseg-2.d: New.
* ld-powerpc/vle-multiseg-2.ld: New.
* ld-powerpc/vle-multiseg-3.d: New.
* ld-powerpc/vle-multiseg-3.ld: New.
* ld-powerpc/vle-multiseg-4.d: New.
* ld-powerpc/vle-multiseg-4.ld: New.
* ld-powerpc/vle-multiseg-5.d: New.
* ld-powerpc/vle-multiseg-5.ld: New.
* ld-powerpc/vle-multiseg-6.d: New.
* ld-powerpc/vle-multiseg-6.ld: New.
* ld-powerpc/vle-multiseg-6a.s: New.
* ld-powerpc/vle-multiseg-6b.s: New.
* ld-powerpc/vle-multiseg-6c.s: New.
* ld-powerpc/vle-multiseg-6d.s: New.
* ld-powerpc/powerpc.exp: Run new tests.
2012-05-14 Catherine Moore <clm@codesourcery.com>
ld/
* NEWS: Mention PowerPC VLE port.
2012-05-14 Catherine Moore <clm@codesourcery.com>
ld/testsuite/
* ld-powerpc/apuinfo.rd: Update for VLE.
* ld-powerpc/vle-reloc-1.d: New.
* ld-powerpc/vle-reloc-1.s: New.
* ld-powerpc/vle-reloc-2.d: New.
* ld-powerpc/vle-reloc-2.s: New.
* ld-powerpc/vle-reloc-3.d: New.
* ld-powerpc/vle-reloc-3.s: New.
* ld-powerpc/vle-reloc-def-1.s: New.
* ld-powerpc/vle-reloc-def-2.s: New.
* ld-powerpc/vle-reloc-def-3.s: New.
2012-05-14 James Lemke <jwlemke@codesourcery.com>
opcodes/
* ppc-dis.c (get_powerpc_dialect): Use is_ppc_vle.
(PPC_OPCD_SEGS, VLE_OPCD_SEGS): New defines.
(vle_opcd_indices): New array.
(lookup_vle): New function.
(disassemble_init_powerpc): Revise for second (VLE) opcode table.
(print_insn_powerpc): Likewise.
* ppc-opc.c: Likewise.
2012-05-14 Catherine Moore <clm@codesourcery.com>
Maciej W. Rozycki <macro@codesourcery.com>
Rhonda Wittels <rhonda@codesourcery.com>
Nathan Froyd <froydnj@codesourcery.com>
opcodes/
* ppc-opc.c (insert_arx, extract_arx): New functions.
(insert_ary, extract_ary): New functions.
(insert_li20, extract_li20): New functions.
(insert_rx, extract_rx): New functions.
(insert_ry, extract_ry): New functions.
(insert_sci8, extract_sci8): New functions.
(insert_sci8n, extract_sci8n): New functions.
(insert_sd4h, extract_sd4h): New functions.
(insert_sd4w, extract_sd4w): New functions.
(insert_vlesi, extract_vlesi): New functions.
(insert_vlensi, extract_vlensi): New functions.
(insert_vleui, extract_vleui): New functions.
(insert_vleil, extract_vleil): New functions.
(BI_MASK, BB_MASK, BT): Use PPC_OPERAND_CR_BIT.
(BI16, BI32, BO32, B8): New.
(B15, B24, CRD32, CRS): New.
(CRD, OBF, BFA, CR, CRFS): Use PPC_OPERAND_CR_REG.
(DB, IMM20, RD, Rx, ARX, RY, RZ): New.
(ARY, SCLSCI8, SCLSCI8N, SE_SD, SE_SDH): New.
(SH6_MASK): Use PPC_OPSHIFT_INV.
(SI8, UI5, OIMM5, UI7, BO16): New.
(VLESIMM, VLENSIMM, VLEUIMM, VLEUIMML): New.
(XT6, XA6, XB6, XB6S, XC6): Use PPC_OPSHIFT_INV.
(ALLOW8_SPRG): New.
(insert_sprg, extract_sprg): Check ALLOW8_SPRG.
(OPVUP, OPVUP_MASK OPVUP): New
(BD8, BD8_MASK, BD8IO, BD8IO_MASK): New.
(EBD8IO, EBD8IO1_MASK, EBD8IO2_MASK, EBD8IO3_MASK): New.
(BD15, BD15_MASK, EBD15, EBD15_MASK, EBD15BI, EBD15BI_MASK): New.
(BD24,BD24_MASK, C_LK, C_LK_MASK, C, C_MASK): New.
(IA16, IA16_MASK, I16A, I16A_MASK, I16L, I16L_MASK): New.
(IM7, IM7_MASK, LI20, LI20_MASK, SCI8, SCI8_MASK): New.
(SCI8BF, SCI8BF_MASK, SD4, SD4_MASK): New.
(SE_IM5, SE_IM5_MASK): New.
(SE_R, SE_R_MASK, SE_RR, SE_RR_MASK): New.
(EX, EX_MASK, BO16F, BO16T, BO32F, BO32T): New.
(BO32DNZ, BO32DZ): New.
(NO371, PPCSPE, PPCISEL, PPCEFS, MULHW): Include PPC_OPCODE_VLE.
(PPCVLE): New.
(powerpc_opcodes): Add new VLE instructions. Update existing
instruction to include PPCVLE if supported.
* ppc-dis.c (ppc_opts): Add vle entry.
(get_powerpc_dialect): New function.
(powerpc_init_dialect): VLE support.
(print_insn_big_powerpc): Call get_powerpc_dialect.
(print_insn_little_powerpc): Likewise.
(operand_value_powerpc): Handle negative shift counts.
(print_insn_powerpc): Handle 2-byte instruction lengths.
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* gas/cris/rd-pic-1.d: Expect addend as signed.
* gas/cris/rd-tls-1.d: Likewise.
* gas/cris/rd-tls-2.d: Likewise.
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binutils/
* objdump.c (disassemble_bytes): Print addend as signed.
(dump_reloc_set): Likewise.
gas/testsuite/
* gas/all/fwdexp.d: Expect addend as signed.
* gas/alpha/elf-reloc-1.d: Likewise.
* gas/i386/mixed-mode-reloc64.d: Likewise.
* gas/i386/reloc64.d: Likewise.
* gas/i386/ilp32/mixed-mode-reloc64.d: Expect addend as signed.
* gas/i386/ilp32/reloc64.d: Likewise.
* gas/ia64/pcrel.d: Likewise.
* gas/mips/branch-misc-2-64.d: Likewise.
* gas/mips/branch-misc-2pic-64.d: Likewise.
* gas/mips/branch-misc-4-64.d: Likewise.
* gas/mips/ldstla-n64-sym32.d: Likewise.
* gas/mips/micromips@branch-misc-2-64.d: Likewise.
* gas/mips/micromips@branch-misc-2pic-64.d: Likewise.
* gas/mips/micromips@branch-misc-4-64.d: Likewise.
* gas/mips/mips16-hilo-n32.d: Likewise.
* gas/ppc/astest.d: Likewise.
* gas/ppc/astest2.d: Likewise.
* gas/ppc/astest2_64.d: Likewise.
* gas/ppc/astest64.d: Likewise.
* gas/ppc/test1elf32.d: Likewise.
* gas/ppc/test1elf64.d: Likewise.
* gas/sparc/reloc64.d: Likewise.
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gas/testsuite/
* gas/mips/elf-rel10.d: Updated.
* gas/mips/elf-rel22.d: Likewise.
* gas/mmix/comment-1.d: Likewise.
ld/testsuite/
* ld-alpha/tlspic.rd: Updated.
* ld-powerpc/tlsso.r: Likewise.
* ld-powerpc/tlsso32.r: Likewise.
* ld-powerpc/vxworks1-lib.rd: Likewise.
* ld-s390/tlspic.rd: Likewise.
* ld-s390/tlspic_64.rd: Likewise.
* ld-sh/shared-1.d: Likewise.
* ld-sh/tlspic-2.d: Likewise.
* ld-sparc/tlssunnopic32.rd: Likewise.
* ld-sparc/tlssunnopic64.rd: Likewise.
* ld-sparc/tlssunpic32.rd: Likewise.
* ld-sparc/tlssunpic64.rd: Likewise.
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gas/
* config/tc-i386.c (tc_gen_reloc): Remove x32 addend overflow
for BFD_RELOC_64.
gas/testsuite/
* gas/i386/ilp32/ilp32.exp: Don't run reloc64-inval.
* gas/i386/ilp32/reloc64.s: Add test for -4294967295 addend.
* gas/i386/ilp32/reloc64.d: Updated.
* gas/i386/ilp32/reloc64-inval.l: Removed.
* gas/i386/ilp32/reloc64-inval.s: Likewise.
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bfd/
* elf64-x86-64.c (elf_x86_64_relocate_section): Check addend
overflow for R_X86_64_RELATIVE64.
gas/
* config/tc-i386.c (tc_gen_reloc): Check x32 addend overflow
for BFD_RELOC_64.
gas/testsuite/
* gas/i386/ilp32/ilp32.exp: Run reloc64-inval.
* gas/i386/ilp32/reloc64.s: Add tests for ".quad".
* gas/i386/ilp32/reloc64.d: Updated.
* gas/i386/ilp32/reloc64-inval.l: New file.
* gas/i386/ilp32/reloc64-inval.s: Likewise.
ld/testsuite/
* ld-x86-64/ilp32-11.d: New file.
* ld-x86-64/ilp32-11.s: Likewise.
* ld-x86-64/x86-64.exp: Run ilp32-11.
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* gas/z80/jr-forwf.s: New file, adapted from z8k version.
* gas/z80/jr-backf.s: Likewise.
* gas/z80/djnz-backf.s: Likewise.
* gas/z80/ill_op: New file, with illegal operand.
* gas/z80/z80.exp: Run new tests.
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opcodes/
* sparc-dis.c (v9a_asr_reg_names): Add 'cfr'.
* sparc-opc.c (sparc_opcodes): Add rd/wr cases for %cfr.
gas/
* config/tc-sparc.c (v9a_asr_table): Add 'cfr'.
gas/testsuite/
* gas/sparc/sparc.exp: Run cfr test.
* gas/sparc/cfr.s: New testcase.
* gas/sparc/cfr.d: Likewise.
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opcodes/
* sparc-opc.c (sparc_opcodes): Add 'wr X, %pause' and 'pause'.
* sparc-dis.c (v9a_asr_reg_names): Add 'pause'.
gas/
* config/tc-sparc.c (sparc_arch_table): Add HWCAP_PAUSE to sparc4,
v8pluse, v8plusv, v9e, and v9v.
(v9a_asr_table): Add 'pause'.
gas/testsuite/
* gas/sparc/sparc.exp: Run pause test.
* gas/sparc/pause.s: New testcase.
* gas/sparc/pause.d: Likewise.
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opcodes/
* sparc-opc.c (CBCOND): New define.
(CBCOND_XCC): Likewise.
(cbcond): New helper macro.
(sparc_opcodes): Add compare-and-branch instructions.
gas/
* config/tc-sparc.c (sparc_arch_table): Add HWCAP_CBCOND to
sparc4, v8pluse, v8plusv, v9e, and v9v.
(sparc_ip): Handle R_SPARC_5 of immediate constants inline in
order to accomodate cbcond which otherwise would require two
relocations to be handled in a single instruction..
gas/testsuite/
* gas/sparc/cbcond.s: New file.
* gas/sparc/cbcond.d: New file.
* gas/sparc/sparc.exp: Run cbcond test.
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include/opcode/
* sparc.h: Document new arg code' )' for crypto RS3
immediates.
opcodes/
* sparc-dis.c (print_insn_sparc): Handle ')'.
* sparc-opc.c (sparc_opcodes): Add crypto instructions.
gas/
* config/tc-sparc.c (sparc_ip): Likewise. Accept instruction
names containing "_".
(sparc_arch_table): Add sparc4, v8pluse, and v9e. Add crypto
hwcap masks to v8plusv and v9v.
gas/testsuite/
* gas/sparc/crypto.s: New file.
* gas/sparc/crypto.d: New file.
* gas/sparc/sparc.exp: Run crypto test.
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include/
* elf/sparc.h (R_SPARC_WDISP10): New reloc.
* opcode/sparc.h: Define '=' as generating R_SPARC_WDISP10.
opcodes/
* sparc-dis.c (X_DISP10): Define.
(print_insn_sparc): Handle '='.
bfd/
* reloc.c (BFD_RELOC_SPARC_H34, BFD_RELOC_SPARC_SIZE32,
BFD_RELOC_SPARC_SIZE64, BFD_RELOC_SPARC_WDISP10): New relocs.
* libbfd.h: Regenerate.
* bfd-in2.h: Likewise.
* elfxx-sparc.c (sparc_elf_wdisp10_reloc): New function.
(_bfd_sparc_elf_howto_table): Add entries for R_SPARC_H34,
R_SPARC_SIZE32, R_SPARC_64, and R_SPARC_WDISP10.
(_bfd_sparc_elf_reloc_type_lookup): Handle new relocs.
(_bfd_sparc_elf_check_relocs): Likewise.
(_bfd_sparc_elf_gc_sweep_hook): Likewise.
(_bfd_sparc_elf_relocate_section): Likewise.
gas/
* config/tc-sparc.c (sparc_ip): Handle '=', "%h34", "%l34", and
BFD_RELOC_SPARC_H34.
(md_apply_fix): Handle BFD_RELOC_SPARC_WDISP10 and BFD_RELOC_SPARC_H34.
(tc_gen_reloc): Likewise.
gas/testsuite/
* gas/sparc/reloc64.s: Add abs34 code model tests.
* gas/sparc/reloc64.d: Update.
elfcpp/
* sparc.h (R_SPARC_WDISP10): New relocation.
gold/
* sparc.cc (Reloc::wdisp10): New relocation method.
(Reloc::h34): Likewise.
(Target_sparc::Scan::check_non_pic): Handle R_SPARC_H34.
(Target_sparc::Scan::get_reference_flags): Handle R_SPARC_H34 and
R_SPARC_WDISP10.
(Target_sparc::Scan::local): Likewise.
(Target_sparc::Scan::global): Likewise.
(Target_sparc::Relocate::relocate): Likewise.
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New variables.
(struct elf32_arm_link_hash_table): New member `nacl_p'.
(elf32_arm_link_hash_table_create): Initialize it.
(elf32_arm_nacl_link_hash_table_create): New function.
(arm_movw_immediate, arm_movt_immediate): New functions.
(elf32_arm_populate_plt_entry): Test HTAB->nacl_p.
(elf32_arm_finish_dynamic_sections): Likewise.
(elf32_arm_output_plt_map_1): Likewise.
(bfd_elf32_littlearm_nacl_vec, bfd_elf32_bigarm_nacl_vec):
New backend vector stanza.
(elf32_arm_nacl_modify_segment_map): New function.
* config.bfd: Handle arm-*-nacl*, armeb-*-nacl*.
* targets.c: Support bfd_elf32_{big,little}_nacl_vec.
* configure.in: Likewise.
(bfd_elf32_bigarm_nacl_vec): Add elf-nacl.lo here.
(bfd_elf32_littlearm_nacl_vec): Likewise.
(bfd_elf32_bigarm_vec, bfd_elf32_littlearm_vec): Likewise.
(bfd_elf32_bigarm_symbian_vec): Likewise.
(bfd_elf32_littlearm_symbian_vec): Likewise.
(bfd_elf32_bigarm_vxworks_vec): Likewise.
(bfd_elf32_littlearm_vxworks_vec): Likewise.
* configure: Regenerated.
* configure.tgt (arm-*-nacl*): Match it.
* config/te-nacl.h (FPU_DEFAULT, EABI_DEFAULT): Define.
(LOCAL_LABELS_DOLLAR): Define.
* config/tc-arm.c (elf32_arm_target_format) [TE_NACL]:
Use nacl format variants.
* gas/elf/elf.exp (run_elf_list_test): Treat arm-*-nacl* targets
as -armeabi.
* gas/arm/any-idiv.d: Match *-*-nacl* targets too.
* gas/arm/arch4t.d: Likewise.
* gas/arm/arch4t-eabi.d: Likewise.
* gas/arm/attr-any-armv4t.d: Likewise.
* gas/arm/attr-any-thumbv6.d: Likewise.
* gas/arm/attr-cpu-directive.d: Likewise.
* gas/arm/attr-default.d: Likewise.
* gas/arm/attr-march-all.d: Likewise.
* gas/arm/attr-march-armv1.d: Likewise.
* gas/arm/attr-march-armv2a.d: Likewise.
* gas/arm/attr-march-armv2.d: Likewise.
* gas/arm/attr-march-armv2s.d: Likewise.
* gas/arm/attr-march-armv3.d: Likewise.
* gas/arm/attr-march-armv3m.d: Likewise.
* gas/arm/attr-march-armv4.d: Likewise.
* gas/arm/attr-march-armv4t.d: Likewise.
* gas/arm/attr-march-armv4txm.d: Likewise.
* gas/arm/attr-march-armv4xm.d: Likewise.
* gas/arm/attr-march-armv5.d: Likewise.
* gas/arm/attr-march-armv5t.d: Likewise.
* gas/arm/attr-march-armv5te.d: Likewise.
* gas/arm/attr-march-armv5tej.d: Likewise.
* gas/arm/attr-march-armv5texp.d: Likewise.
* gas/arm/attr-march-armv5txm.d: Likewise.
* gas/arm/attr-march-armv6.d: Likewise.
* gas/arm/attr-march-armv6j.d: Likewise.
* gas/arm/attr-march-armv6k.d: Likewise.
* gas/arm/attr-march-armv6k+sec.d: Likewise.
* gas/arm/attr-march-armv6kt2.d: Likewise.
* gas/arm/attr-march-armv6-m.d: Likewise.
* gas/arm/attr-march-armv6-m+os.d: Likewise.
* gas/arm/attr-march-armv6s-m.d: Likewise.
* gas/arm/attr-march-armv6t2.d: Likewise.
* gas/arm/attr-march-armv6z.d: Likewise.
* gas/arm/attr-march-armv6zk.d: Likewise.
* gas/arm/attr-march-armv6zkt2.d: Likewise.
* gas/arm/attr-march-armv6zt2.d: Likewise.
* gas/arm/attr-march-armv7-a.d: Likewise.
* gas/arm/attr-march-armv7a.d: Likewise.
* gas/arm/attr-march-armv7-a+idiv.d: Likewise.
* gas/arm/attr-march-armv7-a+mp.d: Likewise.
* gas/arm/attr-march-armv7-a+sec.d: Likewise.
* gas/arm/attr-march-armv7-a+sec+virt.d: Likewise.
* gas/arm/attr-march-armv7-a+virt.d: Likewise.
* gas/arm/attr-march-armv7.d: Likewise.
* gas/arm/attr-march-armv7em.d: Likewise.
* gas/arm/attr-march-armv7-m.d: Likewise.
* gas/arm/attr-march-armv7m.d: Likewise.
* gas/arm/attr-march-armv7-r.d: Likewise.
* gas/arm/attr-march-armv7r.d: Likewise.
* gas/arm/attr-march-armv7-r+mp.d: Likewise.
* gas/arm/attr-march-iwmmxt2.d: Likewise.
* gas/arm/attr-march-iwmmxt.d: Likewise.
* gas/arm/attr-march-xscale.d: Likewise.
* gas/arm/attr-mcpu.d: Likewise.
* gas/arm/attr-mfpu-arm1020e.d: Likewise.
* gas/arm/attr-mfpu-arm1020t.d: Likewise.
* gas/arm/attr-mfpu-arm1136jf-s.d: Likewise.
* gas/arm/attr-mfpu-arm1136jfs.d: Likewise.
* gas/arm/attr-mfpu-arm7500fe.d: Likewise.
* gas/arm/attr-mfpu-fpa10.d: Likewise.
* gas/arm/attr-mfpu-fpa11.d: Likewise.
* gas/arm/attr-mfpu-fpa.d: Likewise.
* gas/arm/attr-mfpu-fpe2.d: Likewise.
* gas/arm/attr-mfpu-fpe3.d: Likewise.
* gas/arm/attr-mfpu-fpe.d: Likewise.
* gas/arm/attr-mfpu-maverick.d: Likewise.
* gas/arm/attr-mfpu-neon.d: Likewise.
* gas/arm/attr-mfpu-neon-fp16.d: Likewise.
* gas/arm/attr-mfpu-softfpa.d: Likewise.
* gas/arm/attr-mfpu-softvfp.d: Likewise.
* gas/arm/attr-mfpu-softvfp+vfp.d: Likewise.
* gas/arm/attr-mfpu-vfp10.d: Likewise.
* gas/arm/attr-mfpu-vfp10-r0.d: Likewise.
* gas/arm/attr-mfpu-vfp3.d: Likewise.
* gas/arm/attr-mfpu-vfp9.d: Likewise.
* gas/arm/attr-mfpu-vfp.d: Likewise.
* gas/arm/attr-mfpu-vfpv2.d: Likewise.
* gas/arm/attr-mfpu-vfpv3-d16.d: Likewise.
* gas/arm/attr-mfpu-vfpv3.d: Likewise.
* gas/arm/attr-mfpu-vfpv4-d16.d: Likewise.
* gas/arm/attr-mfpu-vfpv4.d: Likewise.
* gas/arm/attr-mfpu-vfpxd.d: Likewise.
* gas/arm/attr-names.d: Likewise.
* gas/arm/attr-order.d: Likewise.
* gas/arm/attr-override-cpu-directive.d: Likewise.
* gas/arm/attr-override-mcpu.d: Likewise.
* gas/arm/got_prel.d: Likewise.
* gas/arm/mapdir.d: Likewise.
* gas/arm/mapmisc.d: Likewise.
* gas/arm/mapsecs.d: Likewise.
* gas/arm/mapshort-eabi.d: Likewise.
* gas/arm/mapshort-elf.d: Likewise.
* gas/arm/mov-highregs-any.d: Likewise.
* gas/arm/mov-lowregs-any.d: Likewise.
* gas/arm/pr12198-1.d: Likewise.
* gas/arm/pr12198-2.d: Likewise.
* gas/arm/thumb.d: Likewise.
* gas/arm/thumb-eabi.d: Likewise.
* gas/arm/thumbrel.d: Likewise.
* configure.tgt (arm*-*-nacl*, arm*b-*-nacl*): Handle them.
* emulparams/armelf_nacl.sh: New file.
* emulparams/armelfb_nacl.sh: New file.
* Makefile.am (ALL_EMULATION_SOURCES): Add earmelf_nacl.c
and earmelfb_nacl.c here.
(earmelf_nacl.c, earmelfb_nacl.c): New targets.
* Makefile.in: Regenerated.
* ld-arm/arm-elf.exp (armelftests): Split out into ...
(armelftests_common, armelftests_nonacl): ... these two.
(armeabitests): Split out into ...
(armeabitests_common, armeabitests_nonacl): ... these two.
Omit _nonacl sets for arm*-*-nacl* targets.
* ld-arm/farcall-mix.d: Don't match exact addresses, only symbolic ones.
* ld-arm/farcall-mix2.d: Likewise.
* ld-arm/farcall-group.d: Likewise.
* ld-arm/tls-gdesc-got.d: Match variant file formats too.
Accept some variation in exact addresses.
* ld-arm/thumb2-b-interwork.d: Match variant file formats too.
Fix regexps not to care about exact addresses where not relevant.
* ld-arm/thumb2-bl-undefweak.d: Match any hex strings, not any
strings of particular exact lengths.
* ld-arm/thumb2-bl-undefweak1.d: Likewise.
* ld-arm/arm-app.r: Match variant file formats too.
* ld-arm/arm-app-abs32.r: Likewise.
* ld-arm/arm-lib.d: Likewise.
* ld-arm/arm-lib.r: Likewise.
* ld-arm/arm-static-app.r: Likewise.
* ld-arm/armv4-bx.d: Likewise.
* ld-arm/data-only-map.d: Likewise.
* ld-arm/group-relocs.d: Likewise.
* ld-arm/jump19.d: Likewise.
* ld-arm/reloc-boundaries.d: Likewise.
* ld-arm/thumb1-bl.d: Likewise.
* ld-arm/thumb2-bl.d: Likewise.
* ld-arm/tls-app.d: Likewise.
* ld-arm/tls-app.r: Likewise.
* ld-arm/tls-gdierelax.d: Likewise.
* ld-arm/tls-gdierelax2.d: Likewise.
* ld-arm/tls-gdlerelax.d: Likewise.
* ld-arm/tls-lib.d: Likewise.
* ld-arm/tls-lib.r: Likewise.
* ld-arm/tls-mixed.r: Likewise.
* ld-arm/vfp11-fix-none.d: Likewise.
* ld-arm/vfp11-fix-scalar.d: Likewise.
* ld-arm/vfp11-fix-vector.d: Likewise.
* ld-arm/arm-static-app.d: Likewise.
Fix regexps not to care about exact number of leading spaces.
* ld-arm/arm-app-abs32.d: Likewise.
* ld-arm/fix-arm1176-off.d: Likewise.
* ld-arm/fix-arm1176-on.d: Likewise.
* ld-arm/arm-elf.exp: Treat nacl targets like eabi targets.
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(encode_ldmstm): Ditto.
(do_ldmstm): Use a different encoding when pushing or poping
a single register.
(A_COND_MASK): New macro.
(A_PUSH_POP_OP_MASK): Ditto.
(A1_OPCODE_PUSH): Ditto.
(A2_OPCODE_PUSH): Ditto.
(A2_OPCODE_POP): Ditto.
* gas/arm/push-pop.d: New testcase.
* gas/arm/push-pop.s: Ditto.
* gas/arm/stm-ldm.d: Ditto.
* gas/arm/stm-ldm.s: Ditto.
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* gas/all/gas.exp: Sparc can handle BFD_RELOC_8 for constants.
ld/testsuite/
* ld-sparc/tlssunbin32.rd: Fix regexp.
* ld-sparc/tlssunbin64.rd: Likewise.
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2012-04-03 Roland McGrath <mcgrathr@google.com>
* elf-nacl.c: New file.
* elf-nacl.h: New file.
* elf32-i386.c (elf_backend_modify_segment_map): Define for
bfd_elf32_i386_nacl_vec.
(elf_backend_modify_program_headers): Likewise.
* elf64-x86-64.c (elf_backend_modify_segment_map): Define for
bfd_elf64_x86_64_nacl_vec and bfd_elf32_x86_64_nacl_vec.
(elf_backend_modify_program_headers): Likewise.
* Makefile.am (BFD32_BACKENDS, BFD64_BACKENDS): Add elf-nacl.lo here.
(BFD32_BACKENDS_CFILES, BFD64_BACKENDS_CFILES): Add elf-nacl.c here.
* Makefile.in: Regenerated.
* configure.in (bfd_elf64_x86_64_nacl_vec): Add elf-nacl.o to tb here.
(bfd_elf32_x86_64_nacl_vec): Likewise.
(bfd_elf64_x86_64_vec, bfd_elf32_x86_64_vec): Likewise.
(bfd_elf64_x86_64_freebsd_vec, bfd_elf64_x86_64_sol2_vec): Likewise.
(bfd_elf64_l1om_vec, bfd_elf64_l1om_freebsd_vec): Likewise.
(bfd_elf64_k1om_vec, bfd_elf64_k1om_freebsd_vec): Likewise.
(bfd_elf32_i386_nacl_vec): Likewise.
(bfd_elf32_i386_sol2_vec, bfd_elf32_i386_freebsd_vec): Likewise.
(bfd_elf32_i386_vxworks_vec, bfd_elf32_i386_vec): Likewise.
* configure: Regenerated.
binutils/testsuite/
2012-04-03 Roland McGrath <mcgrathr@google.com>
* lib/binutils-common.exp (is_elf_format): Consider *-*-nacl* to
be ELF too.
* binutils-all/elfedit-4.d: Add "#as: --64" option.
* binutils-all/i386/i386.exp: Accept nacl targets too.
* binutils-all/x86-64/x86-64.exp: Likewise.
gas/testsuite/
2012-04-03 Roland McGrath <mcgrathr@google.com>
* gas/i386/k1om.d: Add not-target match for *-*-nacl*.
* gas/i386/l1om.d: Likewise.
ld/
2012-04-03 Roland McGrath <mcgrathr@google.com>
* configure.tgt (i[3-7]86-*-nacl*, x86_64-*-nacl*): Handle them.
* emulparams/elf_nacl.sh: New file.
* emulparams/elf_i386_nacl.sh: New file.
* emulparams/elf32_x86_64_nacl.sh: New file.
* emulparams/elf_x86_64_nacl.sh: New file.
* Makefile.am (ALL_EMULATION_SOURCES): Add eelf_i386_nacl.c here.
(ALL_64_EMULATION_SOURCES): Add eelf32_x86_64_nacl.c and
eelf_x86_64_nacl.c here.
(eelf_i386_nacl.c, eelf32_x86_64_nacl.c, eelf_x86_64_nacl.c):
New targets.
* Makefile.in: Regenerated.
* scripttempl/elf.sc: Handle SEPARATE_CODE cases.
ld/testsuite/
2012-04-03 Roland McGrath <mcgrathr@google.com>
* ld-x86-64/ilp32-4-nacl.d: New file.
* ld-x86-64/x86-64.exp: Run it.
* ld-discard/discard.exp: Accept nacl targets too.
* ld-elf/binutils.exp: Likewise.
* ld-elf/comm-data.exp: Likewise.
* ld-elf/elf.exp: Likewise.
* ld-elf/tls_common.exp: Likewise.
* ld-elfvers/vers.exp: Likewise.
* ld-elfvsb/elfvsb.exp: Likewise.
* ld-elfweak/elfweak.exp: Likewise.
* ld-gc/gc.exp: Likewise.
* ld-ifunc/binutils.exp: Likewise.
* ld-ifunc/ifunc.exp: Likewise.
* ld-linkonce/linkonce.exp:Likewise.
* ld-pie/pie.exp: Likewise.
* ld-shared/shared.exp: Likewise.
* ld-undefined/weak-undef.exp: Likewise.
* ld-unique/unique.exp: Likewise.
* ld-x86-64/dwarfreloc.exp: Likewise.
* ld-x86-64/line.exp: Likewise.
* lib/ld-lib.exp (slurp_options): Support global array
options_regsub to apply substitutions to the contents
of options lines read from the file.
* ld-i386/emit-relocs.d: Renamed to ...
* ld-i386/emit-relocs.rd: ... this.
* ld-i386/i386.exp: Accept nacl targets too.
For them, use options_regsub to replace elf_i386 with
elf_i386_nacl in run_dump_test cases; apply the same
substitution in $i386tests; replace foo.rd expectations
files with foo-nacl.rd in $i386tests.
(i386tests): Change emit-relocs.d to emit-relocs.rd here.
* ld-i386/emit-relocs-nacl.rd: New file.
* ld-i386/plt-nacl.pd: New file.
* ld-i386/plt-pic-nacl.pd: New file.
* ld-i386/tlsbin-nacl.rd: New file.
* ld-i386/tlsbindesc-nacl.rd: New file.
* ld-i386/tlsdesc-nacl.rd: New file.
* ld-i386/tlsgdesc-nacl.rd: New file.
* ld-i386/tlsnopic-nacl.rd: New file.
* ld-i386/tlspic-nacl.rd: New file.
* ld-x86-64/x86-64.exp: Accept nacl targets too.
For them, use options_regsub to replace elf_x86_64 with
elf_x86_64_nacl in run_dump_test cases; apply the same
substitution in $x86_64tests; replace foo.rd expectations
files with foo-nacl.rd in $x86_64tests.
Add explicit -melf_x86_64 to ld options in tests that need it,
in case the default emulation is x32 (as it is for x86_64-nacl).
* ld/testsuite/ld-x86-64/plt-nacl.pd: New file.
* ld/testsuite/ld-x86-64/split-by-file-nacl.rd: New file.
* ld/testsuite/ld-x86-64/tlsbin-nacl.rd: New file.
* ld/testsuite/ld-x86-64/tlsbindesc-nacl.rd: New file.
* ld/testsuite/ld-x86-64/tlsdesc-nacl.pd: New file.
* ld/testsuite/ld-x86-64/tlsdesc-nacl.rd: New file.
* ld/testsuite/ld-x86-64/tlsgdesc-nacl.rd: New file.
* ld/testsuite/ld-x86-64/tlspic-nacl.rd: New file.
* ld-i386/hidden2.d: Loosen regexps to match any file format variant,
and not to depend on exact addresses, displacements, etc. where
they are irrelevant.
* ld-i386/pcrel16.d: Likewise.
* ld-i386/pcrel16abs.d: Likewise.
* ld-i386/pr12718.d: Likewise.
* ld-i386/pr12921.d: Likewise.
* ld-i386/reloc.d: Likewise.
* ld-i386/tlsbin.dd: Likewise.
* ld-i386/tlsbin.sd: Likewise.
* ld-i386/tlsbin.td: Likewise.
* ld-i386/tlsbindesc.dd: Likewise.
* ld-i386/tlsbindesc.sd: Likewise.
* ld-i386/tlsbindesc.td: Likewise.
* ld-i386/tlsdesc.dd: Likewise.
* ld-i386/tlsdesc.sd: Likewise.
* ld-i386/tlsdesc.td: Likewise.
* ld-i386/tlsg.sd: Likewise.
* ld-i386/tlsgdesc.dd: Likewise.
* ld-i386/tlsindntpoff.dd: Likewise.
* ld-i386/tlsnopic.dd: Likewise.
* ld-i386/tlsnopic.sd: Likewise.
* ld-i386/tlspic.dd: Likewise.
* ld-i386/tlspic.sd: Likewise.
* ld-i386/tlspic.td: Likewise.
* ld-i386/tlspie2.d: Likewise.
* ld-x86-64/hidden2.d: Likewise.
* ld-x86-64/pcrel16.d: Likewise.
* ld-x86-64/pr12718.d: Likewise.
* ld-x86-64/pr12921.d: Likewise.
* ld-x86-64/protected3.d: Likewise.
* ld-x86-64/tlsbin.dd: Likewise.
* ld-x86-64/tlsbin.sd: Likewise.
* ld-x86-64/tlsbin.td: Likewise.
* ld-x86-64/tlsbindesc.dd: Likewise.
* ld-x86-64/tlsbindesc.sd: Likewise.
* ld-x86-64/tlsbindesc.td: Likewise.
* ld-x86-64/tlsdesc.dd: Likewise.
* ld-x86-64/tlsdesc.sd: Likewise.
* ld-x86-64/tlsdesc.td: Likewise.
* ld-x86-64/tlsg.sd: Likewise.
* ld-x86-64/tlsgd5.dd: Likewise.
* ld-x86-64/tlsgd6.dd: Likewise.
* ld-x86-64/tlsgdesc.dd: Likewise.
* ld-x86-64/tlspic.dd: Likewise.
* ld-x86-64/tlspic.sd: Likewise.
* ld-x86-64/tlspic.td: Likewise.
* ld-x86-64/ilp32-8.d: Match any file format variant.
Use a -Ttext and adjust expected results, to handle variant layouts.
* ld-x86-64/ilp32-9.d: Likewise.
* ld-i386/alloc.t: Remove superfluous OUTPUT_FORMAT statement.
* ld-i386/pr12627.t: Likewise.
* ld-x86-64/abs-l1om.d: Add target: constraint.
* ld-x86-64/protected2-l1om.d: Likewise.
* ld-x86-64/protected3-l1om.d: Likewise.
* ld-x86-64/ilp32-4.d: Likewise.
* ld-x86-64/plt.s: New file.
* ld-x86-64/pltlib.s: New file.
* ld-x86-64/plt.pd: New file.
* ld-x86-64/x86-64.exp (x86_64tests): Add them.
* ld-i386/plt.s: New file.
* ld-i386/pltlib.s: New file.
* ld-i386/plt.pd: New file.
* ld-i386/plt-pic.s: New file.
* ld-i386/plt-pic.pd: New file.
* ld-i386/i386.exp (i386tests): Add them.
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transfer size.
(IMM): New, call IMM_ with the default 32.
(IMMW,IMMB): Likewise, for 16 and 8.
(NIMM, MBIMM): Add size parameter.
(immediate): Likewise. Allow 32768..65535 for 16-bit transfers.
(MOV.W): Use IMMW instead of IMM.
* config/rx-parse.y (ADC,SBB): ADC and SBB only allow .L.
(op_dp20_rm_l): New.
(op_dp20_rim_l): New.
* config/rx-parse.y (op_dp20_rms): Rename to op_dp20_rr, don't allow mem.
(ABS, NEG, NOT): These only take REG or REG,REG (rr, not rms).
* gas/rx/mov.d: Update patterns for fixed MOV.W encoding.
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registers.
(do_vmsr): Likewise.
(arm_opcode_insns): Do not default to using the FPSCR register in
the VMRS and VMSR registers.
* gas/arm/vfp1xD.s: Add tests of the VMSR ad VMRS instructions in
priviledged modes.
* gas/arm/vfp1xD.d: Update expected output.
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handling of Tag_DIV_use.
* gas/testsuite/gas/testsuite/gas/arm/any-idiv.d: New testcase.
* gas/testsuite/gas/testsuite/gas/arm/any-idiv.s: Likewise.
* gas/testsuite/gas/arm/attr-any-armv4t.d: Update expected output.
* gas/testsuite/gas/arm/attr-any-thumbv6.d: Likewise.
* gas/testsuite/gas/arm/attr-cpu-directive.d: Likewise.
* gas/testsuite/gas/arm/attr-default.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv1.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv2.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv2a.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv2s.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv3.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv3m.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv4.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv4t.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv4txm.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv4xm.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv5.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv5t.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv5te.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv5tej.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv5texp.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv5txm.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv6-m+os.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv6-m.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv6.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv6j.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv6k+sec.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv6k.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv6kt2.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv6s-m.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv6t2.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv6z.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv6zk.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv6zkt2.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv6zt2.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv7-a+mp.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv7-a+sec.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv7-a.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv7.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv7a.d: Likewise.
* gas/testsuite/gas/arm/attr-march-iwmmxt.d: Likewise.
* gas/testsuite/gas/arm/attr-march-iwmmxt2.d: Likewise.
* gas/testsuite/gas/arm/attr-march-xscale.d: Likewise.
* gas/testsuite/gas/arm/attr-mcpu.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-arm1020e.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-arm1020t.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-arm1136jf-s.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-arm1136jfs.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-arm7500fe.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-fpa.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-fpa10.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-fpa11.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-fpe.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-fpe2.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-fpe3.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-maverick.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-neon-fp16.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-neon.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-softfpa.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-softvfp+vfp.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-softvfp.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-vfp.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-vfp10-r0.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-vfp10.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-vfp3.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-vfp9.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-vfpv2.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-vfpv3-d16.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-vfpv3.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-vfpv4-d16.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-vfpv4.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-vfpxd.d: Likewise.
* gas/testsuite/gas/arm/attr-order.d: Likewise.
* gas/testsuite/gas/arm/attr-override-cpu-directive.d: Likewise.
* gas/testsuite/gas/arm/attr-override-mcpu.d: Likewise.
* gas/testsuite/gas/arm/eabi_attr_1.d: Likewise.
* gas/testsuite/gas/arm/mov-highregs-any.d: Likewise.
* gas/testsuite/gas/arm/mov-lowregs-any.d: Likewise.
* gas/testsuite/gas/arm/pr12198-1.d: Likewise.
* gas/testsuite/gas/arm/pr12198-2.d: Likewise.
* ld/testsuite/ld-arm/arm-elf.exp: Add new testcases.
* ld/testsuite/ld-arm/attr-merge-2.attr: Update ouput.
* ld/testsuite/ld-arm/attr-merge-2a.s: Remove Tag_DIV_use test.
* ld/testsuite/ld-arm/attr-merge-2b.s: Likewise.
* ld/testsuite/ld-arm/attr-merge-3.attr: Updated expected output.
* ld/testsuite/ld-arm/attr-merge-4.attr: Likewise.
* ld/testsuite/ld-arm/attr-merge-5.attr: Likewise.
* ld/testsuite/ld-arm/attr-merge-6.attr: Likewise.
* ld/testsuite/ld-arm/attr-merge-7.attr: Likewise.
* ld/testsuite/ld-arm/attr-merge-arch-1.attr: Likewise.
* ld/testsuite/ld-arm/attr-merge-arch-2.attr: Likewise.
* ld/testsuite/ld-arm/attr-merge-unknown-2.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-unknown-2r.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-unknown-3.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-vfp-1.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-vfp-1r.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-vfp-2.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-vfp-2r.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-vfp-3.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-vfp-3r.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-vfp-4.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-vfp-4r.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-vfp-5.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-vfp-5r.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-vfp-6.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-vfp-6r.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-wchar-00-nowarn.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-wchar-00.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-wchar-02-nowarn.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-wchar-02.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-wchar-04-nowarn.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-wchar-04.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-wchar-20-nowarn.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-wchar-20.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-wchar-22-nowarn.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-wchar-22.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-wchar-24-nowarn.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-wchar-40-nowarn.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-wchar-40.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-wchar-42-nowarn.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-wchar-44-nowarn.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-wchar-44.d: Likewise.
* ld/testsuite/ld-arm/attr-merge.attr: Likewise.
* ld/testsuite/ld-arm/attr-merge-div-0.s: New testcase.
* ld/testsuite/ld-arm/attr-merge-div-00.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-div-01-m3.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-div-01.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-div-02.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-div-1.s: Likewise.
* ld/testsuite/ld-arm/attr-merge-div-10-m3.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-div-10.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-div-11.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-div-12.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-div-120.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-div-2.s: Likewise.
* ld/testsuite/ld-arm/attr-merge-div-20.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-div-21.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-div-22.d: Likewise.
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* gas/i386/bundle.d: Likewise.
* gas/i386/x86-64-bundle.d: Likewise.
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2012-03-12 Roland McGrath <mcgrathr@google.com>
* config/tc-arm.c (arm_frag_max_var): New function.
* config/tc-arm.h: Declare it.
(md_frag_max_var): New macro.
* config/tc-i386.c (i386_frag_max_var): New function.
* config/tc-i386.h: Declare it.
(md_frag_max_var): New macro.
* doc/as.texinfo (Bundle directives): New node.
(Pseudo Ops): Add it to the menu.
* NEWS: Mention new feature.
* read.c [md_frag_max_var] (HANDLE_BUNDLE): New macro.
[HANDLE_BUNDLE] (bundle_align_p2): New variable.
[HANDLE_BUNDLE] (bundle_lock_frchain, bundle_lock_frag): New variables.
[HANDLE_BUNDLE] (start_bundle, pending_bundle_size, finish_bundle):
New functions.
(assemble_one): New function if [HANDLE_BUNDLE], #define directly
to md_assembly if not.
(read_a_source_file): Call assemble_one in place of md_assemble.
(read_a_source_file) [HANDLE_BUNDLE]: Check for unterminated
.bundle_lock at end of processing.
[HANDLE_BUNDLE] (s_bundle_align_mode, s_bundle_lock, s_bundle_unlock):
New functions.
[HANDLE_BUNDLE] (potable): Add their entries.
* read.h: Declare new functions.
gas/testsuite/
2012-03-12 Roland McGrath <mcgrathr@google.com>
* gas/i386/bundle-bad.s: New file.
* gas/i386/bundle-bad.d: New file.
* gas/i386/bundle-bad.l: New file.
* gas/i386/i386.exp: Run it.
* gas/arm/bundle.s: New file.
* gas/arm/bundle.d: New file.
* gas/arm/bundle-lock.s: New file.
* gas/arm/bundle-lock.d: New file.
* gas/i386/bundle.s: New file.
* gas/i386/bundle.d: New file.
* gas/i386/x86-64-bundle.s: New file.
* gas/i386/x86-64-bundle.d: New file.
* gas/i386/bundle-lock.s: New file.
* gas/i386/bundle-lock.d: New file.
* gas/i386/i386.exp: Run them.
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* ppc.h: Add PPC_OPCODE_ALTIVEC2, PPC_OPCODE_E6500, PPC_OPCODE_TMR.
opcodes/
* ppc-dis.c (ppc_opts): Add entries for "e5500" and "e6500".
* ppc-opc.c (insert_ls, TMR, ESYNC, XSYNCLE_MASK): New.
(PPCVEC2, PPCTMR, E6500): New short names.
(powerpc_opcodes): Add vabsdub, vabsduh, vabsduw, dni, mvidsplt,
mviwsplt, icblq., mftmr, mttmr, dcblq., miso, lvexbx, lvexhx,
lvexwx, stvexbx, stvexhx, stvexwx, lvepx, lvepxl, stvepx, stvepxl,
lvtrx, lvtrxl, lvtlx, lvtlxl, stvfrx, stvfrxl, stvflx, stvflxl,
lvswx, lvswxl, stvswx, stvswxl, lvsm mnemonics. Accept LS, ESYNC
optional operands on sync instruction for E6500 target.
bfd/
* archures.c: Add bfd_mach_ppc_e5500 and bfd_mach_ppc_e6500.
* bfd-in2.h: Regenerate.
* cpu-powerpc.c (bfd_powerpc_archs): Add entryies for
bfd_mach_ppc_e5500 and bfd_mach_ppc_e6500.
gas/
* config/tc-ppc.c (md_show_usage): Document -me5500 and -me6500.
(ppc_handle_align): Add termination nop opcode for e500mc family.
* doc/as.texinfo: Document options -me5500 and -me6500.
* doc/c-ppc.texi: Likewise.
gas/testsuite/
* gas/ppc/e500mc64_nop.s: New test case for e500mc family
termination nops.
* gas/ppc/e500mc64_nop.d: Likewise.
* gas/ppc/e5500_nop.s: Likewise.
* gas/ppc/e5500_nop.d: Likewise.
* gas/ppc/e6500_nop.s: Likewise.
* gas/ppc/e6500_nop.d: Likewise.
* gas/ppc/e6500.s: New.
* gas/ppc/e6500.d: Likewise.
* gas/ppc/ppc.exp: Run e6500, e500mc64_nop, e5500_nop, and e6500_nop.
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* s390-opc.txt: Set instruction type of pku to SS_L2RDRD.
2012-03-08 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* gas/s390/esa-g5.d: Move length field to the second operand.
* gas/s390/esa-g5.s: Likewise.
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* gas/elf/elf.exp (groupautoa, groupautob): Don't run for hppa64-hpux.
(ifunc-1, type): Don't run for hpux.
* gas/elf/type-noifunc.e: Accept ANSI_COM.
* gas/elf/section7.s: Always have whitespace before directives.
* gas/elf/warn-2.s: Likewise.
* gas/i386/ifunc-3.s: Move .size directive.
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* gas/elf/elf.exp: Use is_elf_format.
* gas/symver/symver.exp: Likewise.
* gas/m68hc11/m68hc11.exp: Simplify target test.
Add -m68hc11 to error tests that pass for hc12.
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gas/
2012-02-08 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (HLE_PREFIX): New.
(check_hle): Likewise.
(_i386_insn): Add have_hle.
(cpu_arch): Add .hle and .rtm.
(md_assemble): Call check_hle if i.have_hle isn't zero.
(parse_insn): Set i.have_hle to 1 for HLE prefix.
(output_jump): Support up to 2 byte opcode.
* doc/c-i386.texi: Document hle/.hle and rtm/.rtm.
gas/testsuite/
2012-02-08 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/hle-intel.d: New.
* gas/i386/hle.d: Likewise.
* gas/i386/hle.s: Likewise.
* gas/i386/hlebad.l: Likewise.
* gas/i386/hlebad.s: Likewise.
* gas/i386/rtm-intel.d: Likewise.
* gas/i386/rtm.d: Likewise.
* gas/i386/rtm.s: Likewise.
* gas/i386/x86-64-hle-intel.d: Likewise.
* gas/i386/x86-64-hle.d: Likewise.
* gas/i386/x86-64-hle.s: Likewise.
* gas/i386/x86-64-hlebad.l: Likewise.
* gas/i386/x86-64-hlebad.s: Likewise.
* gas/i386/x86-64-rtm-intel.d: Likewise.
* gas/i386/x86-64-rtm.d: Likewise.
* gas/i386/x86-64-rtm.s: Likewise.
* gas/i386/i386.exp: Run hle, hle-intel, hlebad x86-64-hle, rtm,
rtm-intel, x86-64-hle-intel, x86-64-hlebad, x86-64-rtm and
x86-64-rtm-intel.
include/opcode/
2012-02-08 H.J. Lu <hongjiu.lu@intel.com>
* i386.h (XACQUIRE_PREFIX_OPCODE): New.
(XRELEASE_PREFIX_OPCODE): Likewise.
opcodes/
2012-02-08 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (HLE_Fixup1): New.
(HLE_Fixup2): Likewise.
(HLE_Fixup3): Likewise.
(Ebh1): Likewise.
(Evh1): Likewise.
(Ebh2): Likewise.
(Evh2): Likewise.
(Ebh3): Likewise.
(Evh3): Likewise.
(MOD_C6_REG_7): Likewise.
(MOD_C7_REG_7): Likewise.
(RM_C6_REG_7): Likewise.
(RM_C7_REG_7): Likewise.
(XACQUIRE_PREFIX): Likewise.
(XRELEASE_PREFIX): Likewise.
(dis386): Use Ebh1/Evh1 on add, adc, and, btc, btr, bts,
cmpxchg, dec, inc, neg, not, or, sbb, sub, xor and xadd. Use
Ebh2/Evh2 on xchg. Use Ebh3/Evh3 on mov.
(reg_table): Use Ebh1/Evh1 on add, adc, and, dec, inc, neg,
not, or, sbb, sub and xor. Use Ebh3/Evh3 on mov. Use
MOD_C6_REG_7 and MOD_C7_REG_7.
(mod_table): Add MOD_C6_REG_7 and MOD_C7_REG_7.
(rm_table): Add RM_C6_REG_7 and RM_C7_REG_7. Add xend and
xtest.
(prefix_name): Handle XACQUIRE_PREFIX and XRELEASE_PREFIX.
(CMPXCHG8B_Fixup): Handle HLE prefix on cmpxchg8b.
* i386-gen.c (cpu_flag_init): Add CPU_HLE_FLAGS and
CPU_RTM_FLAGS.
(cpu_flags): Add CpuHLE and CpuRTM.
(opcode_modifiers): Add HLEPrefixOk.
* i386-opc.h (CpuHLE): New.
(CpuRTM): Likewise.
(HLEPrefixOk): Likewise.
(i386_cpu_flags): Add cpuhle and cpurtm.
(i386_opcode_modifier): Add hleprefixok.
* i386-opc.tbl: Add HLEPrefixOk=3 to mov. Add HLEPrefixOk to
add, adc, and, btc, btr, bts, cmpxchg, dec, inc, neg, not, or,
sbb, sub, xor and xadd. Add HLEPrefixOk=2 to xchg with memory
operand. Add xacquire, xrelease, xabort, xbegin, xend and
xtest.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
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gas/
2012-01-20 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (_i386_insn): Replace disp32_encoding with
disp_encoding.
(md_assemble): Updated.
(output_branch): Likewise.
(parse_insn): Support .d8 suffix.
(build_modrm_byte): Fake zero displacement for .d8 and .d32
suffixes.
* doc/c-i386.texi: Document .d8 suffix.
gas/testsuite/
2012-01-20 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/disp32.s: Add tests for .d8 suffix.
* gas/i386/x86-64-disp32.s: Likewise.
* gas/i386/disp32.d: Updated.
* gas/i386/x86-64-disp32.d: Likewise.
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* gas/testsuite/gas/m68k/all.exp: Run it.
* opcodes/m68k-opc.c (m68k_opcodes): Fix entries for pmove with BADx/BACx
register and move them after pmove with PSR/PCSR register.
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gas/
2012-01-13 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (cpu_arch): Add ".vmfunc".
* doc/c-i386.texi: Document vmfunc.
gas/testsuite/
2012-01-13 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Run vmfunc and x86-64-vmfunc.
* gas/i386/vmfunc.d: New.
* gas/i386/vmfunc.s: Likewise.
* gas/i386/x86-64-vmfunc.d: Likewise.
opcodes/
2012-01-13 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (mod_table): Add vmfunc.
* i386-gen.c (cpu_flag_init): Add CPU_VMFUNC_FLAGS.
(cpu_flags): CpuVMFUNC.
* i386-opc.h (CpuVMFUNC): New.
(i386_cpu_flags): Add cpuvmfunc.
* i386-opc.tbl: Add vmfunc.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
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gas:
* config/obj-macho.c (obj_mach_o_reorder_section_relocs): New.
* config/obj-macho.h (SET_SECTION_RELOCS): Define.
(obj_mach_o_reorder_section_relocs): Declare.
gas/testsuite:
* gas/all/redef2.d: Skip for Darwin.
* gas/all/redef3.d: Likewise.
* gas/all/weakref1.d: Likewise.
* gas/macros/irp.d: Likewise.
* gas/macros/repeat.d: Likewise.
* gas/macros/rept.d: Likewise.
* gas/macros/test2.d: Likewise.
* gas/macros/vararg.d: Likewise.
* gas/mach-o/macro-irp.d: New.
* gas/mach-o/macro-repeat.d: New.
* gas/mach-o/macro-rept.d: New.
* gas/mach-o/macro-test2.d: New.
* gas/mach-o/macro-vararg.d: New.
* gas/mach-o/redef2.d: New.
* gas/mach-o/redef3.d: New.
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bfd:
* mach-o.c (bfd_mach_o_build_dysymtab_command): Handle absolute
indirect symbols.
gas:
* config/obj-macho.c (obj_mach_o_set_indirect_symbols): Handle
absolute indirect symbols.
gas/testsuite:
* gas/mach-o/dysymtab-3.d: New.
* gas/mach-o/symbols-7.s: New.
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gas:
* config/obj-macho.c (obj_mach_o_set_vma_data): New type.
(obj_mach_o_set_section_vma): New.
(obj_mach_o_post_relax_hook): New.
* config/obj-macho.h (md_post_relax_hook): Define.
(obj_mach_o_post_relax_hook): Declare.
gas/testsuite:
* gas/mach-o/dysymtab-2.d: Update to include the set VMA.
* gas/mach-o/symbols-1-64.d: Likewise.
* gas/mach-o/symbols-1.d: Likewise.
* gas/mach-o/symbols-6.d: Likewise.
* gas/mach-o/zerofill-1.d: Likewise.
* gas/mach-o/zerofill-2.d: Likewise.
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bfd:
* mach-o.c (bfd_mach_o_count_indirect_symbols): New.
(bfd_mach_o_build_dysymtab_command): Populate indirect symbol table.
* mach-o.h (bfd_mach_o_asymbol): Move declaration to start of the
file. (bfd_mach_o_section): Add indirect_syms field.
gas:
* config/obj-macho.c (obj_mach_o_set_symbol_qualifier): Switch off
lazy when the symbol is private_extern.
(obj_mach_o_indirect_sym): New type.
(obj_mach_o_indirect_symbol): New.
(mach_o_pseudo_table): Use obj_mach_o_indirect_symbol.
(obj_macho_frob_label): Adjust to avoid adding bsyms for locals.
(obj_macho_frob_label): Likewise. Adjust external and comm
symbol tests.
(obj_mach_o_set_indirect_symbols): New.
(obj_mach_o_frob_file_after_relocs): New.
*config/obj-macho.h (obj_frob_file_after_relocs): Define.
(obj_mach_o_frob_file_after_relocs): Declare.
include/mach-o:
* loader.h (BFD_MACH_O_INDIRECT_SYM_LOCAL): New.
(BFD_MACH_O_INDIRECT_SYM_ABS): New
gas/testsuite:
* gas/mach-o/dysymtab-2.d: New.
* gas/mach-o/err-syms-4.s: New.
* gas/mach-o/err-syms-5.s: New.
* gas/mach-o/err-syms-6.s: New.
* gas/mach-o/symbols-6-64.d: New.
* gas/mach-o/symbols-6-64.s: New.
* gas/mach-o/symbols-6.d: New.
* gas/mach-o/symbols-6.s: New.
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bfd:
* mach-o.c (bfd_mach_o_bfd_copy_private_symbol_data): Implement.
(bfd_mach_o_write_symtab): Remove handling for indirect syms.
(bfd_mach_o_primary_symbol_sort_key): Likewise.
(bfd_mach_o_cf_symbols): Likewise.
(bfd_mach_o_sort_symbol_table): Remove.
(bfd_mach_o_mangle_symbols): Adjust arguments, remove handling
for indirect and dysymtab counts. Do the symbol sorting here.
(bfd_mach_o_build_dysymtab_command): Count the symbol types here.
Make the indirect symbols a TODO.
(bfd_mach_o_build_commands): Adjust call to bfd_mach_o_mangle_symbols.
(bfd_mach_o_make_empty_symbol): Specifically flag unset symbols with
a non-zero value.
(bfd_mach_o_read_symtab_symbol): Record the symbol index.
(bfd_mach_o_read_symtab_symbol): Adjust recording of global status.
* mach-o.h (mach_o_data_struct): Remove indirect and dysymtab entries.
(IS_MACHO_INDIRECT): Remove.
(SYM_MACHO_FIELDS_UNSET, SYM_MACHO_FIELDS_NOT_VALIDATED): New.
gas:
* config/obj-macho.c (obj_mach_o_weak): Remove.
(obj_mach_o_common_parse): Set symbol qualifiers.
(LAZY, REFE): New macros.
(obj_mach_o_symbol_type): New enum.
(obj_mach_o_set_symbol_qualifier): New.
(obj_mach_o_sym_qual): New.
(mach_o_pseudo_table): Add symbol qualifiers, set indirect_symbol to
a dummy function.
(obj_mach_o_type_for_symbol): New.
(obj_macho_frob_label): New.
(obj_macho_frob_symbol): New.
* config/obj-macho.h (S_SET_ALIGN): Amend temorary var name.
(obj_frob_label, obj_macho_frob_label): Declare.
(obj_frob_symbol, obj_macho_frob_symbol): Declare.
gas/testsuite:
* gas/mach-o/err-syms-1.s: New.
* gas/mach-o/err-syms-2.s: New.
* gas/mach-o/err-syms-3.s: New.
* gas/mach-o/symbols-2.d: New.
* gas/mach-o/symbols-2.s: New.
* gas/mach-o/symbols-3.s: New.
* gas/mach-o/symbols-4.s: New.
* gas/mach-o/symbols-5.d: New.
* gas/mach-o/symbols-5.s: New.
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* config/tc-mips.c (s_tls_rel_directive): Call mips_clear_insn_labels.
gas/testsuite/
* gas/mips/tls-relw.s, gas/mips/tls-relw.d: New test.
* gas/mips/mips.exp: Run it.
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2011-01-08 Andrew Pinski <andrew.pinski@caviumnetworks.com>
Richard Sandiford <rdsandiford@googlemail.com>
* config/tc-mips.c (mips_move_labels): Take the list of labels and
textness as parameters.
(mips_move_text_labels): New function.
(append_insn): Use it instead of mips_move_labels.
(mips_emit_delays, start_noreorder): Likewise.
(mips_align): Take the labels rather than just one label.
Move all labels to after the .align.
(s_align): Change the last argument to mips_align.
(s_cons): Likewise.
(s_float_cons): Likewise.
(s_gpword): Likewise.
(s_gpdword): Likewise.
gas/testsuite/
* gas/mips/align3.s, gas/mips/align3.d: New testcase.
* gas/mips/mips.exp: Run it.
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* gas/mach-o/zerofill-2.d: New.
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gas:
* config/obj-macho.c (obj_mach_o_segT_from_bfd_name): Tidy definition.
(obj_mach_o_get_section_names): New (split from obj_mach_o_section).
(obj_mach_o_make_or_get_sect): Likewise.
(obj_mach_o_section): Split out the functionality shared with zerofill.
(obj_mach_o_zerofill): New.
(obj_mach_o_common_parse): Ensure whitespace is skipped.
(mach_o_pseudo_table): Add .zerofill.
gas/testsuite:
* gas/mach-o/zerofill-1.d: New.
* gas/mach-o/zerofill-1.s: New.
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bfd:
* mach-o.c (bfd_mach_o_write_symtab): Fill in the string table index
as the value of an indirect symbol. Keep the string table index in
non-indirect syms for reference.
(bfd_mach_o_write_dysymtab): New.
(bfd_mach_o_primary_symbol_sort_key): New.
(bfd_mach_o_cf_symbols): New.
(bfd_mach_o_sort_symbol_table): New.
(bfd_mach_o_mangle_symbols): Return early if no symbols. Sort symbols.
If we are emitting a dysymtab, process indirect symbols and count the
number of each other kind.
(bfd_mach_o_mangle_sections): New.
(bfd_mach_o_write_contents): Split out some pre-requisite code into
the command builder. Write dysymtab if the command is present.
(bfd_mach_o_count_sections_for_seg): New.
(bfd_mach_o_build_seg_command): New.
(bfd_mach_o_build_dysymtab_command): New.
(bfd_mach_o_build_commands): Reorganize to support the fact that some
commands are optional and should not be emitted if there are no
sections or symbols.
(bfd_mach_o_set_section_contents): Amend comment.
* mach-o.h: Amend and add to comments.
(mach_o_data_struct): Add fields for dysymtab symbols counts and a
pointer to the indirects, when present.
(bfd_mach_o_should_emit_dysymtab): New macro.
(IS_MACHO_INDIRECT): Likewise.
gas/testsuite:
* gas/mach-o/dysymtab-1-64.d: New.
* gas/mach-o/dysymtab-1.d: New.
* gas/mach-o/symbols-1-64.d: New.
* gas/mach-o/symbols-1.d: New.
* gas/mach-o/symbols-base-64.s: New.
* gas/mach-o/symbols-base.s: New.
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gas:
* as.c (perform_an_assembly_pass): Do not create text, data and bss
sections for MACH-O. Do not switch to the text section.
* config/obj-macho.c (obj_mach_o_segT_from_bfd_name): Forward decl.
(mach_o_begin): Startup with only text section unless suppressed.
* config/obj-macho.h (obj_begin): define to mach_o_begin ().
gas/testsuite:
* gas/mach-o/sections-1.d: Amend to recognize that bss is not emitted
by default.
* gas/mach-o/sections-2.d: New.
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* mach-o-i386.c (bfd_mach_o_section_type_valid_for_tgt): Define NULL.
* mach-o-target.c (bfd_mach_o_backend_data): Initialize bfd_mach_o_section_type_valid_for_tgt
* mach-o-x86-64.c (bfd_mach_o_section_type_valid_for_x86_64): New.
(bfd_mach_o_section_type_valid_for_tgt): Set to bfd_mach_o_section_type_valid_for_x86_64.
* mach-o.c (bfd_mach_o_section_type_name): Reorder and eliminate dup.
(bfd_mach_o_section_attribute_name): Reorder.
(bfd_mach_o_get_section_type_from_name): If the target has defined a validator for section
types, then use it.
* mach-o.h (bfd_mach_o_get_section_type_from_name): Alter declaration to include the bfd.
gas:
* config/obj-macho.c (obj_mach_o_section): Account for target-dependent section
types. Improve error handling when wrong section types/attributes are specified.
gas/testsuite:
* gas/mach-o/err-sections-1.s: New.
* gas/mach-o/err-sections-2.s: New.
* gas/mach-o/sections-3.d: New.
* gas/mach-o/sections-3.s: New.
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